Abstract: In a display device, a driving element is disposed on a rear substrate, and a passivation layer covers the driving element. A pixel electrode is disposed on the passivation layer and is connected to the driving element. An organic emission layer is disposed on the pixel electrode and is configured to emit light toward the rear substrate. A common electrode is disposed on the organic emission layer. A touch electrode is disposed between the rear substrate and the passivation layer, and it forms a capacitive component when an external touch occurs.

Abstract: There are provided a display device capable of detecting a defect of a scan driver. The display device includes pixels positioned in regions demarcated by scan lines and data lines, a scan driver including a plurality of stages connected to the scan lines, an inspection unit connected to the stages to detect whether the stages are defective, and including first transistors turned on when a control signal is supplied, and a timing controller supplying the control signal, wherein the timing controller detects a position of a defective stage by reducing a period during which the control signal is supplied.

Abstract: A display device including a flexible substrate that includes a display part to display an image; a driving integrated chip (IC) that supplies a driving voltage to the display part; a flexible printed circuit (FPC) attached to an outer side portion of the substrate; and a printed circuit board (PCB) attached to the FPC, the PCB transferring the driving voltage to the driving IC through the FPC, wherein the FPC includes attachment parts at ends thereof, the attachment parts of the FPC being attached to pad parts at the outer side portion of the substrate and to pad parts of the PCB, and the attachment parts include slits therein.

Abstract: A display device includes: a gate electrode, a gate line, and data lines on a substrate, the data lines in a same layer as the gate line; a gate insulating layer on the gate line; a semiconductor member on the gate insulating layer; an etch stopper layer on the semiconductor member and the gate insulating layer; a first passivation layer on the etch stopper layer; a source electrode on the first passivation layer and the etch stopper layer and connected to the data lines; a drain electrode on the etch stopper layer; a common electrode on the first passivation layer and separated from the source electrode and the drain electrode; a second passivation layer on the source electrode, the drain electrode and the common electrode; and a pixel electrode on the second passivation layer and connected to the drain electrode.

Abstract: A display apparatus includes: a first gate line extending in a second direction crossing a first direction; a row line extending in the first direction and electrically connected to the first gate line; a first data line spaced from the first gate line along the first direction and extending in the second direction; a second data line adjacent to the first data line and extending in the second direction; a first sub-pixel electrically connected to the first data line; and a second sub-pixel electrically connected to the second data line.

Abstract: An organic light emitting display device includes first to third pixels arranged in a first direction, first to third gate lines respectively connected to the first to third pixels, first to third initialization control lines respectively connected to the first to third pixels, first to third light emission control lines respectively connected to the first to third pixels, a driving control signal supplying line connected to at least one of the first to third gate lines and at least one of the first to third initialization control lines, a light emission control signal supplying line connected to at least two of the first to third light emission control lines, a gate driver connected to the driving control signal supplying line, and a light emission control driver connected to the light emission control signal supplying line.

Abstract: A liquid crystal display and a method of fabricating a liquid crystal display (LCD), the LCD including a substrate; gate wiring including a gate pad, a gate electrode, and a gate line, which are formed on the substrate; a gate insulating layer disposed on the gate wiring; an electrode pattern including a connecting electrode, which is disposed on the gate insulating layer and is electrically connected to the gate pad, a source electrode and a drain electrode, which partially overlap the gate electrode; a pixel electrode, which is electrically connected to the drain electrode; a data line, which intersects the gate line; a semiconductor layer disposed on the gate electrode; first auxiliary wiring overlapping the data line and spaced from the semiconductor layer; and second auxiliary wiring overlapping the gate line.

Abstract: There are provided a display device capable of detecting a defect of a scan driver. The display device includes pixels positioned in regions demarcated by scan lines and data lines, a scan driver including a plurality of stages connected to the scan lines, an inspection unit connected to the stages to detect whether the stages are defective, and including first transistors turned on when a control signal is supplied, and a timing controller supplying the control signal, wherein the timing controller detects a position of a defective stage by reducing a period during which the control signal is supplied.

Abstract: In a display device, a driving element is disposed on a rear substrate, and a passivation layer covers the driving element. A pixel electrode is disposed on the passivation layer and is connected to the driving element. An organic emission layer is disposed on the pixel electrode and is configured to emit tight toward the rear substrate. A common electrode is disposed on the organic emission layer. A touch electrode is disposed between the rear substrate and the passivation layer, and it forms a capacitive component when an external touch occurs.

Abstract: A display device includes: a gate electrode, a gate line, and data lines on a substrate, the data lines in a same layer as the gate line; a gate insulating layer on the gate line; a semiconductor member on the gate insulating layer; an etch stopper layer on the semiconductor member and the gate insulating layer; a first passivation layer on the etch stopper layer; a source electrode on the first passivation layer and the etch stopper layer and connected to the data lines; a drain electrode on the etch stopper layer; a common electrode on the first passivation layer and separated from the source electrode and the drain electrode; a second passivation layer on the source electrode, the drain electrode and the common electrode; and a pixel electrode on the second passivation layer and connected to the drain electrode.

Abstract: A display device including a flexible substrate that includes a display part to display an image; a driving integrated chip (IC) that supplies a driving voltage to the display part; a flexible printed circuit (FPC) attached to an outer side portion of the substrate; and a printed circuit board (PCB) attached to the FPC, the PCB transferring the driving voltage to the driving IC through the FPC, wherein the FPC includes attachment parts at ends thereof, the attachment parts of the FPC being attached to pad parts at the outer side portion of the substrate and to pad parts of the PCB, and the attachment parts include slits therein.

Abstract: An organic light emitting diode display device includes a display panel and a power supply. The power supply applies a first power supply voltage and a second power supply voltage to a first power supply voltage line. The first power supply voltage line includes a first extension, a second extension, and third extension. The first extension is disposed along a first direction from the first side portion to the second side portion. The first extension has a width that gradually decreases along the first direction. The second extension is disposed along a second direction that is perpendicular to the first direction. The third extension is disposed along a third direction that is opposite to the first direction. The third extension has a width that gradually decreases along the third direction.

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract: An organic light emitting diode display device includes a display panel and a power supply. The power supply applies a first power supply voltage and a second power supply voltage to a first power supply voltage line. The first power supply voltage line includes a first extension, a second extension, and third extension. The first extension is disposed along a first direction from the first side portion to the second side portion. The first extension has a width that gradually decreases along the first direction. The second extension is disposed along a second direction that is perpendicular to the first direction. The third extension is disposed along a third direction that is opposite to the first direction. The third extension has a width that gradually decreases along the third direction.

Abstract: A display apparatus is disclosed. The display apparatus includes a display panel and a gate driving circuit. The display panel includes a base substrate and a switching transistor. The base substrate includes a display area displaying an image and a peripheral area surrounding the display area. The switching transistor includes a first gate electrode disposed on the display area, a first channel disposed on the first gate electrode, and a first source electrode and a first drain electrode being spaced apart from each other with respect to the first channel. The gate driving circuit includes a driving transistor integrated on the peripheral area of the display panel applying gate signals to the display panel.

Abstract: A thin film transistor array panel includes: a gate line including a gate electrode; a first gate insulating layer on the gate line; a semiconductor layer on the first gate insulating layer and overlapping the gate electrode; a second gate insulating layer on the semiconductor layer and the first gate insulating layer, and an opening in the second gate insulating layer and through which the semiconductor layer is exposed; drain and source electrodes on the second gate insulating and semiconductor layers and facing each other; a first field generating electrode; and a second field generating electrode connected to the drain electrode. The semiconductor layer includes an oxide semiconductor layer, and first and second auxiliary layers on the oxide semiconductor layer and separated from each other. An edge of the drain and source electrodes is disposed inside an edge of the first and second auxiliary layers, respectively.

Abstract: A liquid crystal display and a method of fabricating a liquid crystal display (LCD), the LCD including a substrate; gate wiring including a gate pad, a gate electrode, and a gate line, which are formed on the substrate; a gate insulating layer disposed on the gate wiring; an electrode pattern including a connecting electrode, which is disposed on the gate insulating layer and is electrically connected to the gate pad, a source electrode and a drain electrode, which partially overlap the gate electrode; a pixel electrode, which is electrically connected to the drain electrode; a data line, which intersects the gate line; a semiconductor layer disposed on the gate electrode; first auxiliary wiring overlapping the data line and spaced from the semiconductor layer; and second auxiliary wiring overlapping the gate line.

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract: Rather than forming a data line continuously extending in one layer of a thin film transistor substrate, spaced apart segments of a first data connection pattern are formed in a same first layer as that of the gate lines but extending in a crossing direction. Spaced apart parts of a second data connection pattern are formed in a same second layer as that of the source electrodes of the substrate and also extending in the crossing direction. The segments of the first data connection pattern are connected to successive parts of the second data connection pattern to form completed data lines. In one embodiment, the gate lines of the first layer and the spaced apart segments of a first data connection pattern include a low resistivity metal such as copper.

Abstract: A thin film transistor array panel includes: a gate line including a gate electrode; a first gate insulating layer on the gate line; a semiconductor layer on the first gate insulating layer and overlapping the gate electrode; a second gate insulating layer on the semiconductor layer and the first gate insulating layer, and an opening in the second gate insulating layer and through which the semiconductor layer is exposed; drain and source electrodes on the second gate insulating and semiconductor layers and facing each other; a first field generating electrode; and a second field generating electrode connected to the drain electrode. The semiconductor layer includes an oxide semiconductor layer, and first and second auxiliary layers on the oxide semiconductor layer and separated from each other. An edge of the drain and source electrodes is disposed inside an edge of the first and second auxiliary layers, respectively.