Patents by Inventor Kang Yeh

Kang Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Storage unit management method, memory controller and memory storage device using the same
    Patent number: 9274943
    Abstract: A storage unit management method for managing a plurality of physical units in a rewritable non-volatile memory module is provided, wherein the physical units are at least grouped into a data area and a spare area. The method includes configuring a plurality of logical units for mapping to the physical units belonging to the data area, and determining whether the rewritable non-volatile memory module contains cold data. The method further includes performing a first wear-leveling procedure on the physical units if it is determined that the rewritable non-volatile memory module does not contain any cold data, and performing a second wear-leveling procedure on the physical units if it is determined that the rewritable non-volatile memory module contains the cold data.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: March 1, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Yi-Keng Chen
  • Data management method, memory control circuit unit and memory storage apparatus
    Patent number: 9274706
    Abstract: A data management method is provided. The method includes: dividing each of physical programming units into a data bits area and a spare bits area; generating first data management information corresponding to first data according to a first write command and the first data; determining whether the first data is compressible; and generating first data compression information corresponding to the first data. The method further includes: if the first data is compressible, compressing the first data to generate first compressed data, programming the first compressed data and the first data management information corresponding to the first data into a first data bits area of a first physical programming unit among the physical programming units, and programming the first data compression information into the first spare bits area of the first physical programming unit.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: March 1, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Chang-Guang Lin, Chun-Jung Lee
  • MEMORY MANAGEMENT METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROLLING CIRCUIT UNIT
    Publication number: 20160054921
    Abstract: A memory management method, a memory storage device and a memory controlling circuit unit are provided. The method includes: defining a first data management rule for a first type physical unit and a second data management rule for a second type physical unit, and a data density of the first type physical unit is lower than the data density of the second type physical unit; if a first physical unit belongs to the first type physical unit, managing the first physical unit according to the first data management rule to make the data stored in the first physical unit conforming to a first reliability level; and if the first physical unit belongs to the second type physical unit, managing the first physical unit according to the second data management rule to make the data stored in the first physical unit conforming to a second reliability level.
    Type: Application
    Filed: October 21, 2014
    Publication date: February 25, 2016
    Inventor: Chih-Kang Yeh
  • Data management method, memory controller and memory storage apparatus
    Patent number: 9268688
    Abstract: A data management method, a memory controller and a memory storage apparatus are provided. The method includes grouping a plurality of physical units of a rewritable non-volatile memory module into at least a data area and a free area. The method also includes configuring a plurality of logical units for mapping a part of the physical units. The method further includes receiving at least two pieces of update data, which are corresponding to different logical pages of the logical units. The method further includes getting a physical unit from the physical units. The method further includes writing the at least two pieces of update data into the same one physical page of the gotten physical unit. Accordingly, the use efficiency of the physical units could be improved.
    Type: Grant
    Filed: December 25, 2014
    Date of Patent: February 23, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Detachable electronic apparatus
    Patent number: 9261911
    Abstract: A detachable electronic apparatus includes a tablet device and a base. The base includes a back plate and a rotatable supporting device pivoted on the back plate. The rotatable supporting device further includes a supporting bracket and a connector module floating connected to the supporting bracket. The connector module is protruded from an opening of the supporting bracket when the tablet device is against the back plate. The connector module is stored in the opening of the supporting bracket when the tablet device is separated from the back plate.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: February 16, 2016
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Chieh Lin, Kang-Yeh Yu, Jung-Sheng Chiang, Han-Min Chen, Chen-Yu Chung, Chin-Chi Yeh
  • DATA STORING METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE
    Publication number: 20160034343
    Abstract: A data storing method, a memory control circuit unit and a memory storage device are provided. The method includes: generating a parity according to first data. The method also includes: when programming the first data into first physical programming unit, programming at least one mark into redundancy bit area of the first physical programming unit. The method further includes: programming the parity into at least one second physical programming unit arranged after the first physical programming unit, and the at least one mark indicates that the parity is programmed into the at least one second physical programming unit.
    Type: Application
    Filed: September 22, 2014
    Publication date: February 4, 2016
    Inventor: Chih-Kang Yeh
  • DATA MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS
    Publication number: 20160034388
    Abstract: A data management method is provided, and the method includes: receiving first data and identifying a first address. The method also includes: determining whether the first data is incompressible; and, if the first data is incompressible, determining whether the first address is meeting a requirement of start address. The method further includes: if the first address is not meeting the requirement of start address, storing the padding data starting from the first address, and storing the first data starting from a following address, wherein the following address is meeting the requirement of start address.
    Type: Application
    Filed: October 9, 2014
    Publication date: February 4, 2016
    Inventor: Chih-Kang Yeh
  • DATA MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS
    Publication number: 20160011785
    Abstract: A data management method is provided. The method includes: dividing each of physical programming units into a data bits area and a spare bits area; generating first data management information corresponding to first data according to a first write command and the first data; determining whether the first data is compressible; and generating first data compression information corresponding to the first data. The method further includes: if the first data is compressible, compressing the first data to generate first compressed data, programming the first compressed data and the first data management information corresponding to the first data into a first data bits area of a first physical programming unit among the physical programming units, and programming the first data compression information into the first spare bits area of the first physical programming unit.
    Type: Application
    Filed: August 26, 2014
    Publication date: January 14, 2016
    Inventors: Chih-Kang Yeh, Chang-Guang Lin, Chun-Jung Lee
  • METHOD FOR PREVENTING READ-DISTURB ERRORS, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS
    Publication number: 20160011930
    Abstract: A method for preventing read-disturb errors, a memory storage apparatus and a memory control circuit unit are provided. The method includes counting an operation numerical value when receiving an operation command from the host system, wherein a first physical erasing unit is selected for executing the operation command. The method also includes selecting a second physical erasing unit and reading data from the second erasing unit. The method further includes determining whether a data error occurs at the second physical erasing unit according to the data read from the second physical erasing unit, and if the data error occurs, selecting a third physical erasing unit, correcting the data read from the second physical erasing unit to generate corrected data and writing the corrected data into the third physical erasing unit.
    Type: Application
    Filed: September 19, 2014
    Publication date: January 14, 2016
    Inventor: Chih-Kang Yeh
  • Memory storage device, memory controller thereof, and method for programming data thereof
    Patent number: 9235501
    Abstract: A memory storage device, a memory controller thereof, and a method for programming data thereof are provided. The memory storage device comprises a rewritable non-volatile memory chip having a plurality of rewritable non-volatile memory modules, and each rewritable non-volatile memory module comprises a plurality of physical blocks. The method includes receiving a write command from a host system, and a logical address corresponding to the write command belongs to a predetermined logical address range. The method also includes determining whether a suitable memory module has not stored any data belonging to the predetermined logical address range exists in all rewritable non-volatile memory modules. The method further includes writing a writing data corresponding to the write command into the suitable memory module if it is existent.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: January 12, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Block management method, memory controller and memory stoarge apparatus
    Patent number: 9213629
    Abstract: A block management method for a rewritable non-volatile memory module having a plurality of physical blocks, and a memory controller and memory storage apparatus using the same are provided. The method includes logically grouping the physical blocks at least into a data area, a free area and a replacement area and configuring a plurality of logical blocks for mapping to the physical blocks of the data area. The method also includes assigning bad physical blocks into the data area and marking the logical blocks mapping to the bad physical blocks as bad logical addresses, thereby forbidding the access of the logical blocks mapping to the bad physical blocks. According, the method can effectively use the rewritable non-volatile memory module having too many bad physical blocks to store data.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: December 15, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Data accessing method for flash memory storage device having data perturbation module, and storage system and controller using the same
    Patent number: 9213636
    Abstract: A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: December 15, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh
  • Data writing method, memory storage device and memory controlling circuit unit
    Patent number: 9177656
    Abstract: The writing method includes: grouping logical erasing units into a first region and an second region; determining if a first logical erasing unit which a host system intends to write belongs to the first region or the second region; if the first logical erasing unit belongs to the first region, writing data to a spare physical programming unit, wherein the physical erasing unit to which the spare physical programming belongs further stores data belonging to another logical erasing unit; if the first logical erasing unit belongs to the second region, writing data to a physical erasing unit in which all the valid data belong to the first logical erasing unit. Accordingly, a speed of sequential writing is guaranteed to be greater than a target value.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: November 3, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Data protecting method, memory storage device, and memory controller
    Patent number: 9146805
    Abstract: A data protecting method, a memory storage device, and a memory controller are provided for a rewritable non-volatile memory module. The data protecting method includes: generating a first error correcting code by using data stored in first memory cells of a plurality of memory cells. The first memory cells are located on first word lines and first bit lines. Among the memory cells located on each of the first bit lines, only one of the memory cells stores the data used to generate the first error correcting code. Accordingly, the data in the memory cells is efficiently protected.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: September 29, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Data writing method, memory controller and memory storage device
    Patent number: 9141530
    Abstract: A data writing method for controlling a rewritable non-volatile memory module having a plurality of physical erase units is provided. The method includes: receiving a write command which instructs writing data to a first logical address, wherein the first logical address is mapped to a second physical erase unit; determining whether the second physical erase unit is in a sequential writing state which represents that the physical programming units over a predetermined ratio in the second physical erasing unit have been successively written sequentially within a predetermined time; if yes, writing the data into a third physical erasing unit in a first programming mode, wherein the first programming mode represents that a plurality of upper physical programming units are non-programmable. Accordingly, the data writing rate is increased.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: September 22, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Method for giving read commands and reading data, and controller and storage system using the same
    Patent number: 9122611
    Abstract: A method for giving a read command to a flash memory chip to read data to be accessed by a host system is provided. The method includes receiving a host read command; determining whether the received host read command follows a last host read command; if yes, giving a cache read command to read data from the flash memory chip; and if no, giving a general read command and the cache read command to read data from the flash memory chip. Accordingly, the method can effectively reduce time needed for executing the host read commands by using the cache read command to combine the host read commands which access continuous physical addresses and pre-read data stored in a next physical address.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: September 1, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • METHOD FOR WRTITING DATA, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
    Publication number: 20150242122
    Abstract: A method for writing data, a memory storage device and a memory control circuit unit are provided. The method includes receiving a write command and first data corresponding to the write command, obtaining initial data transmission information of the first data and determining whether the initial data transmission information conforms to a predetermined condition, compressing the first data to second data and writing the second data into a rewritable non-violate memory module if the initial data transmission information conforms to the predetermined condition, and writing the uncompressed first data into the rewritable non-violate memory module if the initial data transmission information does not conform to the predetermined condition.
    Type: Application
    Filed: April 16, 2014
    Publication date: August 27, 2015
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Li-Chun Liang
  • Logical block management method for a flash memory and control circuit storage system using the same
    Patent number: 9098395
    Abstract: A logical block management method for managing a plurality of logical blocks of a flash memory device is provided. The logical block management method includes providing a flash memory controller, grouping the logical blocks into a plurality of logical zones, wherein each logical block maps to one of the logical zones. The logical block management method also includes counting a use count value for each logical block, and dynamically adjusting mapping relations between the logical blocks and the logical zones according to the use count values. Accordingly, the logical block management method can effectively utilizing the logical zones to determine usage patterns of the logical blocks and use different mechanisms to write data, so as to increase the performance of the flash memory storage device.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: August 4, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • DATA PROTECTING METHOD, MEMORY STORAGE APPARATUS AND MEMORY CONTROL CIRCUIT UNIT
    Publication number: 20150205715
    Abstract: A data protecting method, a memory storage apparatus and a memory control circuit unit are provided. The method includes: determining whether a first procedure being executed or about to be executed by the memory storage device is a first type procedure; and if the first procedure being executed or about to be executed by the memory storage device is the first type procedure, temporarily stopping receiving a first data corresponding to a first write command before the first procedure is finished.
    Type: Application
    Filed: April 3, 2014
    Publication date: July 23, 2015
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Data storing method, memory controller and memory storage apparatus
    Patent number: 9086954
    Abstract: A data storing method for a memory storage apparatus having a flash memory module is provided. The method includes detecting the operating temperature of the memory storage device through a thermal sensor and determining whether the operating temperature of the memory storage device is larger than a predetermined temperature. The methods further includes using a first data storing mode to access the flash memory module if the operating temperature of the memory storage device is not larger than the predetermined temperature; and using a second data storing mode to access the flash memory module if the operating temperature of the memory storage apparatus is larger than the predetermined temperature, wherein the first data storing mode is different from the second data storing mode. Accordingly, the method can effectively ensure the accuracy of the data stored into the flash memory module.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: July 21, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh