Patents by Inventor Kang Yeh

Kang Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9563498
    Abstract: A method for preventing read-disturb errors, a memory storage apparatus and a memory control circuit unit are provided. The method includes counting an operation numerical value when receiving an operation command from the host system, wherein a first physical erasing unit is selected for executing the operation command. The method also includes selecting a second physical erasing unit and reading data from the second erasing unit. The method further includes determining whether a data error occurs at the second physical erasing unit according to the data read from the second physical erasing unit, and if the data error occurs, selecting a third physical erasing unit, correcting the data read from the second physical erasing unit to generate corrected data and writing the corrected data into the third physical erasing unit.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: February 7, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Publication number: 20170024153
    Abstract: A mapping table accessing method for a rewritable non-volatile memory module is provided. The method includes: storing a mapping record corresponding to a first physical erasing unit into the first physical erasing unit, wherein the mapping record of the first physical erasing unit is a mapping relation of physical programming units in the first physical erasing unit. The method further includes: storing a mapping record corresponding to a second physical erasing unit into the second physical erasing unit, wherein the mapping record of the second physical erasing unit is a mapping relation of physical programming units in the second physical erasing unit. A size of the mapping record of the first physical erasing unit is different from a size of the mapping record of the second physical erasing unit.
    Type: Application
    Filed: August 19, 2015
    Publication date: January 26, 2017
    Inventor: Chih-Kang Yeh
  • Publication number: 20170017570
    Abstract: A mapping table updating method for a rewritable non-volatile memory module is provided. The method includes: allocating a mapping table storage area for storing a physical address-logical address mapping table in a buffer memory. The method also includes: determining whether a remaining storage space of the mapping table storage area is less than a threshold. If the remaining storage space is less than the threshold, mapping information of the physical address-logical address mapping table stored in the mapping table storage area is updated into at least one logical address-physical address mapping table, and the mapping information of the physical address-logical address mapping table stored in the mapping table storage area is cleared. The method also includes: storing updated mapping information corresponding to a programmed active physical erasing unit into the mapping table storage area.
    Type: Application
    Filed: August 19, 2015
    Publication date: January 19, 2017
    Inventors: Chih-Kang Yeh, Chang-Han Hsieh
  • Publication number: 20160364141
    Abstract: A memory management method is provided according to an exemplary embodiment. The method includes: receiving a write command and determining whether a usage status of physical units associated to a storage area conforms to a first predetermined status; storing write data corresponding to the write command to at least one of physical units associated to a temporary area if the usage status of the physical units associated to the storage area conforms to the first predetermined status; associating the at least one physical unit storing the write data to the storage area; and allocating at least one logical unit to map the at least one physical unit associated to the storage area.
    Type: Application
    Filed: July 29, 2015
    Publication date: December 15, 2016
    Inventor: Chih-Kang Yeh
  • Publication number: 20160320973
    Abstract: A data writing method for a rewritable non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same are provided. The method includes grouping physical erasing units of the rewritable non-volatile memory module into a temporary area and a storage area. The method also includes selecting a first physical erasing unit from the temporary area, copying a plurality of valid data of the first physical erasing unit to a second physical erasing unit of the temporary area, and performing an erasing operation on the first physical erasing unit. The method further includes selecting a third physical erasing unit from the temporary area, copying a plurality of valid data of the third physical erasing unit to a forth physical erasing unit of the storage area, and performing the erasing operation on the third physical erasing unit.
    Type: Application
    Filed: June 26, 2015
    Publication date: November 3, 2016
    Inventor: Chih-Kang Yeh
  • Publication number: 20160314040
    Abstract: A data accessing method for a memory storage apparatus is provided. The method includes using a first check code circuit to generate a first check code corresponding to a first data stream and generating a first data set based on the first data stream and the first check code. The method also includes using a second check code circuit to obtain the first data stream and the first check code from the first data set and check the first data stream according to the first check code. The method still includes using a third check code circuit to generate a second check code according to the checked first data stream and generating a data frame based on the checked first data stream and the second check code and thereby programming the data frame into a physical programming unit.
    Type: Application
    Filed: June 11, 2015
    Publication date: October 27, 2016
    Inventors: Chih-Kang Yeh, Chang-Guang Lin
  • Patent number: 9471421
    Abstract: A data accessing method, a memory storage device and a memory controlling circuit unit are provided. The data accessing method includes: determining whether a first physical programming unit storing first data belongs to a first type physical programming unit or a second type physical programming unit; if the first physical programming unit belongs to the first type physical programming unit, generating a first verification code corresponding to the first data and a second verification code for being combined with the first verification code, and writing the first data and the first verification code into the first physical programming unit; and if the first data is decoded unsuccessfully by using the first verification code, combining the second verification code and the first verification code to decode the first data.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: October 18, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9436547
    Abstract: A data storing method, a memory control circuit unit and a memory storage device are provided. The method includes: generating a parity according to first data. The method also includes: when programming the first data into first physical programming unit, programming at least one mark into redundancy bit area of the first physical programming unit. The method further includes: programming the parity into at least one second physical programming unit arranged after the first physical programming unit, and the at least one mark indicates that the parity is programmed into the at least one second physical programming unit.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: September 6, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9430327
    Abstract: A data access method for a rewritable non-volatile memory module is provided. The method includes: filling dummy data to first data in order to generate second data, and writing the second data and an error checking and correcting code (ECC code) corresponding to the second data into a first physical programming unit. The method also includes: reading data stream from the first physical programming unit, wherein the data stream includes third data and the ECC code. The method further includes: adjusting the third data according to a pattern of the dummy data in order to generate fourth data when the third data cannot be corrected by using the ECC code, and using the ECC code to correct the fourth data in order to obtain corrected data, wherein the corrected data is identical to the second data.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: August 30, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9367390
    Abstract: A memory controlling method, a memory storage device and a memory controlling circuit unit are provided. The method includes: providing a first clock signal to a rewritable non-volatile memory module and reading a first data in the rewritable non-volatile memory module according to the first clock signal; providing a second clock signal to the rewritable non-volatile memory module and writing a second data into the rewritable non-volatile memory module according to the second clock signal. A frequency of the second clock signal is different from a frequency of the first clock signal. Accordingly, an operation speed of the rewritable non-volatile memory module may be increased and probabilities of having errors for some operations are decreased.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: June 14, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9348693
    Abstract: A storage apparatus is provided. The controller of the storage apparatus includes an error correction module and a data disordering module. The error correction module is configured to perform an error correction procedure for a data packet to be written into a flash memory module of the storage apparatus for generating sequence data codes containing the data packet and corresponding error correcting codes, wherein the data packet includes a data area recording data to be written and a spare area recording data related to the data packet. The data disordering module is configured to convert the sequence data codes into non-sequence data codes, wherein the data of the data area and the spare area and error correcting codes are dispersed in the non-sequence data codes. Accordingly, it is possible to effectively increase the safety of the data packet.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: May 24, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Kuo-Yi Cheng, Chih-Kang Yeh
  • Publication number: 20160132387
    Abstract: A data access method for a rewritable non-volatile memory module is provided. The method includes: filling dummy data to first data in order to generate second data, and writing the second data and an error checking and correcting code (ECC code) corresponding to the second data into a first physical programming unit. The method also includes: reading data stream from the first physical programming unit, wherein the data stream includes third data and the ECC code. The method further includes: adjusting the third data according to a pattern of the dummy data in order to generate fourth data when the third data cannot be corrected by using the ECC code, and using the ECC code to correct the fourth data in order to obtain corrected data, wherein the corrected data is identical to the second data.
    Type: Application
    Filed: December 17, 2014
    Publication date: May 12, 2016
    Inventor: Chih-Kang Yeh
  • Publication number: 20160117244
    Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes: compressing data to generate first data; determining whether a data length of the first data meets a predetermined condition. The method also includes: if the data length of the first data meets the predetermined condition, writing the first data into a first physical erasing unit among a plurality of physical erasing units; if the data length of the first data does not meet the predetermined condition, generating dummy data according to a predetermined rule, padding the first data with the dummy data to generate second data and writing the second data into the first physical erasing unit. A data length of the second data meets the predetermined condition.
    Type: Application
    Filed: December 1, 2014
    Publication date: April 28, 2016
    Inventor: Chih-Kang Yeh
  • Publication number: 20160110112
    Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes: if data belongs to a first pattern, using a first compression/decompression circuit to compress the data to generate compressed data and writing the compressed data into the rewritable non-volatile memory module; and if data belongs to a second pattern, using a second compression/decompression circuit to compress the data to generate another compressed data and writing the another compressed data into the rewritable non-volatile memory module, wherein the compression speed of the first compression/decompression circuit is higher than that of the second compression/decompression circuit, and the compression rate of the first compression/decompression circuit is lower than that of the second compression/decompression circuit.
    Type: Application
    Filed: December 9, 2014
    Publication date: April 21, 2016
    Inventor: Chih-Kang Yeh
  • Patent number: 9304907
    Abstract: A data management method is provided, and the method includes: receiving first data and identifying a first address. The method also includes: determining whether the first data is incompressible; and, if the first data is incompressible, determining whether the first address is meeting a requirement of start address. The method further includes: if the first address is not meeting the requirement of start address, storing the padding data starting from the first address, and storing the first data starting from a following address, wherein the following address is meeting the requirement of start address.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: April 5, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9286986
    Abstract: A data writing method for writing data into a memory cell of a rewritable non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same area provided. The method includes recording a wear degree of the memory cell and detecting an operating temperature of the memory storage apparatus. The method further includes adjusting at least one predetermined operation parameter corresponding to the rewritable non-volatile memory module to generate at least one adjusted operation parameter corresponding to the rewritable non-volatile memory module and writing the data into the memory cell based on the at least one adjusted operation parameter if the operating temperature of the memory storage apparatus is larger than a predetermined temperature. Accordingly, the method can accurately store data into the rewritable non-volatile memory module, thereby lowing the operating temperature of the memory storage apparatus.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: March 15, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Wei Lin
  • Publication number: 20160062828
    Abstract: A data accessing method, a memory storage device and a memory controlling circuit unit are provided. The data accessing method includes: determining whether a first physical programming unit storing first data belongs to a first type physical programming unit or a second type physical programming unit; if the first physical programming unit belongs to the first type physical programming unit, generating a first verification code corresponding to the first data and a second verification code for being combined with the first verification code, and writing the first data and the first verification code into the first physical programming unit; and if the first data is decoded unsuccessfully by using the first verification code, combining the second verification code and the first verification code to decode the first data.
    Type: Application
    Filed: October 15, 2014
    Publication date: March 3, 2016
    Inventor: Chih-Kang Yeh
  • Patent number: 9274943
    Abstract: A storage unit management method for managing a plurality of physical units in a rewritable non-volatile memory module is provided, wherein the physical units are at least grouped into a data area and a spare area. The method includes configuring a plurality of logical units for mapping to the physical units belonging to the data area, and determining whether the rewritable non-volatile memory module contains cold data. The method further includes performing a first wear-leveling procedure on the physical units if it is determined that the rewritable non-volatile memory module does not contain any cold data, and performing a second wear-leveling procedure on the physical units if it is determined that the rewritable non-volatile memory module contains the cold data.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: March 1, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Yi-Keng Chen
  • Patent number: 9274706
    Abstract: A data management method is provided. The method includes: dividing each of physical programming units into a data bits area and a spare bits area; generating first data management information corresponding to first data according to a first write command and the first data; determining whether the first data is compressible; and generating first data compression information corresponding to the first data. The method further includes: if the first data is compressible, compressing the first data to generate first compressed data, programming the first compressed data and the first data management information corresponding to the first data into a first data bits area of a first physical programming unit among the physical programming units, and programming the first data compression information into the first spare bits area of the first physical programming unit.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: March 1, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Chang-Guang Lin, Chun-Jung Lee
  • Patent number: D757965
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: May 31, 2016
    Assignee: OPTRONICS INTERNATIONAL, LLC
    Inventors: Kuo-Kang Yeh, Chun-Chih Chen