Patents by Inventor Karen A. Nummy

Karen A. Nummy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12135456
    Abstract: Structures for a waveguide core and methods of fabricating such structures. The structure comprises a waveguide core including a section having a first trapezoidal portion and a second trapezoidal portion stacked with the first trapezoidal portion. The first trapezoidal portion has a first trapezoidal shape, and the second trapezoidal portion has a second trapezoidal shape different from the first trapezoidal shape.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: November 5, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Koushik Ramachandran, Karen Nummy
  • Publication number: 20240361529
    Abstract: Structures including a cavity adjacent to an edge coupler and methods of forming such structures. The structure comprises a semiconductor substrate including a cavity with a sidewall, a dielectric layer on the semiconductor substrate, and an edge coupler on the dielectric layer. The structure further comprises a fill region including a plurality of fill features adjacent to the edge coupler. The fill region includes a reference marker at least partially surrounded by the plurality of fill features, and the reference marker has a perimeter that surrounds a surface area of the dielectric layer, and the surface area overlaps with a portion of the sidewall of the cavity.
    Type: Application
    Filed: April 25, 2023
    Publication date: October 31, 2024
    Inventors: Keith Donegan, Thomas Houghton, Yusheng Bian, Karen Nummy, Kevin Dezfulian, Takako Hirokawa
  • Publication number: 20240288631
    Abstract: Structures for a waveguide escalator and methods of forming such structures. A structure comprises a first waveguide core, and a back-end-of-line stack including a first dielectric layer, a second dielectric layer on the first dielectric layer, an opening in the second dielectric layer, a second waveguide core including a section that overlaps with a section of the first waveguide core, and a plurality of third waveguide cores disposed between the section of the first waveguide core and the section of the second waveguide core. The plurality of third waveguide cores are positioned inside the opening in the second dielectric layer, the first dielectric layer comprises a first material with a first refractive index, and the second dielectric layer comprises a second material with a second refractive index different from the first refractive index.
    Type: Application
    Filed: February 28, 2023
    Publication date: August 29, 2024
    Inventors: Yusheng Bian, Kevin Dezfulian, Kenneth Giewont, Karen Nummy
  • Publication number: 20240094465
    Abstract: The disclosure relates to a PIC structure including a photonic component on a semiconductor substrate. Each of a plurality of optical guard elements are composed of a light absorbing material and are in proximity to the photonic component. The optical guard elements may mimic an outer periphery of at least a portion of the photonic component. The optical guard elements may include at least one of: a germanium body positioned at least partially in a silicon element, a silicon body having a high dopant concentration, and a polysilicon body having a high dopant concentration over the silicon body.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Inventors: Yusheng Bian, Mark D. Levy, Siva P. Adusumilli, Karen A. Nummy, Zhuojie Wu, Ramsey Hazbun
  • Patent number: 11934008
    Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure includes a waveguide core over a dielectric layer, and a back-end-of-line stack over the waveguide core and the dielectric layer. The back-end-of-line stack includes an interlayer dielectric layer, a side edge, a first feature, a second feature, and a third feature laterally arranged between the first feature and the second feature. The first feature, the second feature, and the third feature are positioned on the interlayer dielectric layer adjacent to the side edge, and the third feature has an overlapping relationship with a tapered section of the waveguide core.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: March 19, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Roderick A. Augur, Kenneth J. Giewont, Karen Nummy
  • Publication number: 20230417991
    Abstract: Structures for a waveguide core and methods of fabricating such structures. The structure comprises a waveguide core including a section having a first trapezoidal portion and a second trapezoidal portion stacked with the first trapezoidal portion. The first trapezoidal portion has a first trapezoidal shape, and the second trapezoidal portion has a second trapezoidal shape different from the first trapezoidal shape.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Yusheng Bian, Koushik Ramachandran, Karen Nummy
  • Publication number: 20230393340
    Abstract: IC chips for photonics applications are disclosed. An example IC chip includes a substrate, an optical component above the substrate, and a first connection level above the substrate. The first connection level includes the optical component and a first cladding structure, in which the optical component is covered by the first cladding structure. The IC chip also includes a second connection level on the first connection level. The second connection level includes a first interlayer dielectric material. The IC chip further includes a second cladding structure directly above the optical component. The second cladding structure has at least a section within the second connection level. The second cladding structure is on the first cladding structure. The second cladding structure is laterally adjacent to and in direct contact with the first interlayer dielectric material. The second cladding structure includes a material different from the first interlayer dielectric material.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 7, 2023
    Inventors: RYAN SPORER, KAREN NUMMY, KEITH DONEGAN, THOMAS HOUGHTON, YUSHENG BIAN, TAKAKO HIROKAWA, KENNETH GIEWONT
  • Patent number: 11837851
    Abstract: A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: December 5, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Roderick A. Augur, Michal Rakowski, Kenneth J. Giewont, Karen A. Nummy
  • Patent number: 11810870
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: November 7, 2023
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Asli Sahin, Thomas F. Houghton, Jennifer A. Oakley, Jeremy S. Alderman, Karen A. Nummy, Zhuojie Wu
  • Patent number: 11662523
    Abstract: Structures including an edge coupler and methods of forming a structure including an edge coupler. The structure includes a waveguide core over a dielectric layer and a back-end-of-line stack over the dielectric layer and the waveguide core. The back-end-of-line stack includes a side edge and a truncated layer that is overlapped with a tapered section of the waveguide core. The truncated layer has a first end surface adjacent to the side edge and a second end surface above the tapered section of the waveguide core. The truncated layer is tapered from the first end surface to the second end surface.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: May 30, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Roderick A. Augur, Kenneth J. Giewont, Karen Nummy
  • Publication number: 20230126719
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.
    Type: Application
    Filed: December 23, 2022
    Publication date: April 27, 2023
    Inventors: Asli SAHIN, Thomas F. HOUGHTON, Jennifer A. OAKLEY, Jeremy S. ALDERMAN, Karen A. NUMMY, Zhuojie WU
  • Publication number: 20230117802
    Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure includes a waveguide core over a dielectric layer, and a back-end-of-line stack over the waveguide core and the dielectric layer. The back-end-of-line stack includes an interlayer dielectric layer, a side edge, a first feature, a second feature, and a third feature laterally arranged between the first feature and the second feature. The first feature, the second feature, and the third feature are positioned on the interlayer dielectric layer adjacent to the side edge, and the third feature has an overlapping relationship with a tapered section of the waveguide core.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 20, 2023
    Inventors: Yusheng Bian, Roderick A. Augur, Kenneth J. Giewont, Karen Nummy
  • Patent number: 11587888
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: February 21, 2023
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Asli Sahin, Thomas F. Houghton, Jennifer A. Oakley, Jeremy S. Alderman, Karen A. Nummy, Zhuojie Wu
  • Patent number: 11567261
    Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure includes a waveguide core over a dielectric layer, and a back-end-of-line stack over the waveguide core and the dielectric layer. The back-end-of-line stack includes an interlayer dielectric layer, a side edge, a first feature, a second feature, and a third feature laterally arranged between the first feature and the second feature. The first feature, the second feature, and the third feature are positioned on the interlayer dielectric layer adjacent to the side edge, and the third feature has an overlapping relationship with a tapered section of the waveguide core.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: January 31, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Roderick A. Augur, Kenneth J. Giewont, Karen Nummy
  • Publication number: 20230011972
    Abstract: A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.
    Type: Application
    Filed: September 14, 2022
    Publication date: January 12, 2023
    Inventors: Yusheng Bian, Roderick A. Augur, Michal Rakowski, Kenneth J. Giewont, Karen A. Nummy
  • Patent number: 11536903
    Abstract: Structures for an edge coupler and methods of fabricating a structure for an edge coupler. A first waveguide core has a first section that has a tapered shape and a second section that is adjoined to the first section. Multiple segments are positioned with a spaced arrangement adjacent to an end surface of the second section of the first waveguide core. A slab layer is adjoined to the first section of the first waveguide core. A second waveguide core has a section that overlaps with the first section of the first waveguide core to define a layer stack. The section of the second waveguide core has a tapered shape, and the first and second waveguide cores are comprised of different materials. The first section of the first waveguide core has a first thickness, and the slab layer has a second thickness that is less than the first thickness.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: December 27, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Theodore Letavic, Yusheng Bian, Kenneth J. Giewont, Karen Nummy
  • Patent number: 11531164
    Abstract: Structures including an edge coupler and methods of fabricating a structure including an edge coupler. The structure includes a dielectric layer including an edge, a waveguide core region on the dielectric layer, and multiple segments on the dielectric layer. The waveguide core region has an end surface, and the waveguide core region is lengthwise tapered toward the end surface. The segments are positioned between the waveguide core region and the edge of the dielectric layer. A waveguide core has a section positioned over the waveguide core region in an overlapping arrangement. The waveguide core has an end surface, and the section of the waveguide core is lengthwise tapered toward the end surface.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: December 20, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Kevin K. Dezfulian, Yusheng Bian, Kenneth J. Giewont, Karen Nummy
  • Patent number: 11515685
    Abstract: A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: November 29, 2022
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Yusheng Bian, Roderick A. Augur, Michal Rakowski, Kenneth J. Giewont, Karen A. Nummy
  • Patent number: 11487059
    Abstract: A photonics integrated circuit includes a semiconductor substrate; a buried insulator layer positioned over the semiconductor substrate; and a back-end-of-line (BEOL) insulator stack over a first portion of the buried insulator layer. In addition, the PIC includes a silicon nitride (SiN) waveguide edge coupler positioned in a first region over the buried insulator layer and at least partially under the BEOL insulator stack. An oxide layer extends over a side of the BEOL insulator stack. The SiN waveguide edge coupler provides better power handling and fabrication tolerance than silicon waveguide edge couplers, despite the location under various BEOL layers. The PIC can also include silicon waveguide edger coupler(s).
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: November 1, 2022
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Asli Sahin, Karen A. Nummy, Thomas Houghton, Kevin K. Dezfulian, Kenneth J. Giewont, Yusheng Bian
  • Publication number: 20220268994
    Abstract: A photonics integrated circuit includes a semiconductor substrate; a buried insulator layer positioned over the semiconductor substrate; and a back-end-of-line (BEOL) insulator stack over a first portion of the buried insulator layer. In addition, the PIC includes a silicon nitride (SiN) waveguide edge coupler positioned in a first region over the buried insulator layer and at least partially under the BEOL insulator stack. An oxide layer extends over a side of the BEOL insulator stack. The SiN waveguide edge coupler provides better power handling and fabrication tolerance than silicon waveguide edge couplers, despite the location under various BEOL layers. The PIC can also include silicon waveguide edger coupler(s).
    Type: Application
    Filed: February 19, 2021
    Publication date: August 25, 2022
    Inventors: Asli Sahin, Karen A. Nummy, Thomas Houghton, Kevin K. Dezfulian, Kenneth J. Giewont, Yusheng Bian