Patents by Inventor Karl D. Hobart

Karl D. Hobart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10002958
    Abstract: Systems and method are provided for depositing metal on GaN transistors after gate formation using a metal nitride Schottky gate. Embodiments of the present disclosure use a “diamond last” process using thermally stable metal nitride gate electrodes to enable thicker heat spreading films and facilitate process integration. In an embodiment, the “diamond last” process with high thermal conductivity diamond is enabled by the integration of thermally stable metal-nitride gate electrodes.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: June 19, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Virginia D. Wheeler, Andrew D. Koehler, Karl D. Hobart
  • Patent number: 9991354
    Abstract: Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer to form a Schottky diode, such as a TiN gate on an AlGaN/GaN high electron mobility transistor (HEMT). Metal nitrides offer exceptional thermal stability and a lower diffusion coefficient. Technology enabled by embodiments of the present disclosure improves the reliability of GaN-based microwave power transistors.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: June 5, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Virginia D. Wheeler, David Shahin, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Marko J. Tadjer
  • Patent number: 9960266
    Abstract: Passivated AlGaN/GaN HEMTs having no plasma damage to the AlGaN surface and methods for making the same. In a first embodiment, a thin HF SiN barrier layer is deposited on the AlGaN surface after formation of the gate. A thick HF/LF SiN layer is then deposited, the thin HF SiN layer and the thick HF/LF Sin layer comprising bi-layer SiN passivation on the HEMT. In a second embodiment, a first thin HF SiN barrier layer is deposited on the AlGaN surface before formation of the gate and is annealed. Following annealing of the first SiN layer, the gate is formed, and a second HF SiN barrier layer is deposited, followed by a thick HF/LF SiN layer, the three SiN layers comprising tri-layer SiN passivation on the HEMT.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: May 1, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart
  • Publication number: 20180086625
    Abstract: Electromechanical device structures are provided, as well as methods for forming them. The device structures incorporate at least a first and second substrate separated by an interface material layer, where the first substrate comprises an anchor material structure and at least one suspended material structure, optionally a spring material structure, and optionally an electrostatic sense electrode. The device structures may be formed by methods that include providing an interface material layer on one or both of the first and second substrates, bonding the interface materials to the opposing first or second substrate or to the other interface material layer, followed by forming the suspended material structure by etching.
    Type: Application
    Filed: September 7, 2017
    Publication date: March 29, 2018
    Applicants: The Government of the United States of America, as Represented by the Secretary of the Navy, The Charles Stark Draper Laboratory, Inc.
    Inventors: Francis J. KUB, Karl D. HOBART, Eugene A. IMHOFF, Rachael L. MYERS-WARD, Eugene COOK, Jonathan BERNSTEIN, Marc WEINBERG
  • Publication number: 20180065844
    Abstract: Material structures and methods for etching hexagonal, single-crystal silicon carbide (SiC) materials are provided, which include selection of on-axis or near on-axis hexagonal single-crystal SiC material as the material to be etched. The methods include etching of SiC bulk substrate material, etching of SiC material layers bonded to a silicon oxide layer, etching of suspended SiC material layers, and etching of a SiC material layer anodically bonded to a glass layer. Plasma-etched hexagonal single-crystal SiC materials of the invention may be used to form structures that include, but are not limited to, microelectromechanical beams, microelectromechanical membranes, microelectromechanical cantilevers, microelectromechanical bridges, and microelectromechanical field effect transistor devices.
    Type: Application
    Filed: September 7, 2017
    Publication date: March 8, 2018
    Applicant: The Government of the United States of America, as Represented by the Secretary of the Navy
    Inventors: Eugene A. IMHOFF, Francis J. KUB, Karl D. HOBART, Rachael L. MYERS-WARD
  • Publication number: 20170358670
    Abstract: Systems and method are provided for depositing metal on GaN transistors after gate formation using a metal nitride Schottky gate. Embodiments of the present disclosure use a “diamond last” process using thermally stable metal nitride gate electrodes to enable thicker heat spreading films and facilitate process integration. In an embodiment, the “diamond last” process with high thermal conductivity diamond is enabled by the integration of thermally stable metal-nitride gate electrodes.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 14, 2017
    Inventors: Francis J. Kub, Travis J. Anderson, Virginia D. Wheeler, Andrew D. Koehler, Karl D. Hobart
  • Publication number: 20170338332
    Abstract: Passivated AlGaN/GaN HEMTs having no plasma damage to the AlGaN surface and methods for making the same. In a first embodiment, a thin HF SiN barrier layer is deposited on the AlGaN surface after formation of the gate. A thick HF/LF SiN layer is then deposited, the thin HF SiN layer and the thick HF/LF Sin layer comprising bi-layer SiN passivation on the HEMT. In a second embodiment, a first thin HF SiN barrier layer is deposited on the AlGaN surface before formation of the gate and is annealed. Following annealing of the first SiN layer, the gate is formed, and a second HF SiN barrier layer is deposited, followed by a thick HF/LF SiN layer, the three SiN layers comprising tri-layer SiN passivation on the HEMT.
    Type: Application
    Filed: May 11, 2017
    Publication date: November 23, 2017
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart
  • Publication number: 20170330950
    Abstract: Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer to form a Schottky diode, such as a TiN gate on an AlGaN/GaN high electron mobility transistor (HEMT). Metal nitrides offer exceptional thermal stability and a lower diffusion coefficient. Technology enabled by embodiments of the present disclosure improves the reliability of GaN-based microwave power transistors.
    Type: Application
    Filed: May 16, 2017
    Publication date: November 16, 2017
    Inventors: Travis J. Anderson, Virginia D. Wheeler, David Shahin, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Marko J. Tadjer
  • Publication number: 20170316952
    Abstract: An method of annealing by: providing a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; depositing a layer of a transition metal nitride directly on the surface; and annealing the substrate at at least 900° C. in an oxygen-free environment. An article having: a substrate having a III-nitride, sapphire, silicon, diamond, gallium arsenide, or silicon carbide surface; and a layer of a transition metal nitride directly on the surface.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 2, 2017
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Boris N. Feygelson, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Jordan Greenlee
  • Patent number: 9685513
    Abstract: Semiconductor devices that include a semiconductor structure integrated with one or more diamond material layers. A first diamond material layer is formed on a bottom surface and optionally, the side surfaces of the semiconductor structure. In some embodiments, at least a portion of the semiconductor structure is embedded in the diamond. An electrical device can be formed on a top surface of the semiconductor structure. A second diamond material layer can be formed on the top surface of the semiconductor structure. The semiconductor structure can include a III-nitride material such as GaN, which can be embedded within a the first diamond material layer or encased by the first and/or second diamond material layer.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: June 20, 2017
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Karl D. Hobart
  • Publication number: 20160341552
    Abstract: According to one aspect, embodiments herein provide a gyroscope comprising an axially symmetric structure, and a plurality of transducers, each configured to perform at least one of driving and sensing motion of the axially symmetric structure, wherein the plurality of transducers is configured to drive the axially symmetric structure in at least a first vibratory mode and a second vibratory mode, and wherein the gyroscope is implemented on a hexagonal crystal-based substrate.
    Type: Application
    Filed: May 20, 2016
    Publication date: November 24, 2016
    Inventors: Francis J. Kub, Karl D. Hobart, Eugene Imhoff, Rachael Myers-Ward, Eugene H. Cook, Marc S. Weinberg, Jonathan J. Bernstein
  • Patent number: 9490356
    Abstract: Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN HEMT by means of atomic layer epitaxy (ALE), either before or after deposition of a gate metal electrode on the AlGaN barrier layer. Depending on the gate metal and/or the passivation material used, the III-nitride passivation layer can be formed by ALE at temperatures between about 300° C. and about 85020 C. In a specific embodiment, the III-nitride passivation layer can be an AlN layer formed by ALE at about 550° C. after deposition of a Schottky metal gate electrode. The III-nitride passivation layer can be grown so as to conformally cover the entire device, providing a hermetic seal that protects the against environmental conditions.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: November 8, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart, Francis J. Kub
  • Patent number: 9466684
    Abstract: A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: October 11, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Andrew D. Koehler, Travis J. Anderson, Marko J. Tadjer, Karl D. Hobart, Tatyana I. Feygelson
  • Publication number: 20160211341
    Abstract: A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond.
    Type: Application
    Filed: March 25, 2016
    Publication date: July 21, 2016
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Andrew D. Koehler, Travis J. Anderson, Marko J. Tadjer, Karl D. Hobart, Tatyana I. Feygelson
  • Publication number: 20160204222
    Abstract: Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN HEMT by means of atomic layer epitaxy (ALE), either before or after deposition of a gate metal electrode on the AlGaN barrier layer. Depending on the gate metal and/or the passivation material used, the III-nitride passivation layer can be formed by ALE at temperatures between about 300° C. and about 85020 C. In a specific embodiment, the III-nitride passivation layer can be an AlN layer formed by ALE at about 550° C. after deposition of a Schottky metal gate electrode. The III-nitride passivation layer can be grown so as to conformally cover the entire device, providing a hermetic seal that protects the against environmental conditions.
    Type: Application
    Filed: March 25, 2016
    Publication date: July 14, 2016
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart, Francis J. Kub
  • Patent number: 9331163
    Abstract: A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: May 3, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Andrew D. Koehler, Travis J. Anderson, Marko J. Tadjer, Tatyana I. Feygelson, Karl D. Hobart
  • Patent number: 9305858
    Abstract: An array of through-silicon vias (TSVs) are formed in a silicone substrate. The vias can be tapered such that the diameter of the via at the surface of the substrate is larger than the diameter of the via at its bottom, with the diameter varying continuously along its depth. After the via is formed, it is seeded with a thin layer of nanocrystalline diamond (NCD) particles, and a NCD film is grown on the bottom and along the sidewalls of the via. The presence of the diamond-filled vias provides improved thermal management to semiconductor devices formed on the silicon substrate.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: April 5, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Marko J. Tadjer, Tatyana I. Feygelson, Bradford B. Pate, Travis J. Anderson
  • Patent number: 9275998
    Abstract: An inverted P-channel III-nitride field effect transistor with hole carriers in the channel comprising a gallium-polar III-Nitride grown epitaxially on a substrate, a barrier, a two-dimensional hole gas in the barrier layer material at the heterointerface of the first material, and wherein the gallium-polar III-Nitride material comprises III-Nitride epitaxial material layers grown in such a manner that when GaN is epitaxially grown the top surface of the epitaxial layer is gallium-polar. A method of making a P-channel III-nitride field effect transistor with hole carriers in the channel comprising selecting a face of a substrate so that the gallium-polar (0001) face is the dominant face for growth of III-Nitride epitaxial layer growth material, growing a GaN epitaxial layer, doping, growing a barrier, etching, forming a contact, performing device isolation, defining a gate opening, defining gate metal, making a contact window, and depositing and defining a thick metal.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: March 1, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Andrew D. Koehler, Karl D. Hobart
  • Patent number: 9246305
    Abstract: A light-emitting device having one or more diamond layers integrated therein and methods for forming a light-emitting device with integrated diamond layers. The diamond is grown either directly on the semiconductor material comprising the light-emitting structure, on a nucleation layer deposited on the semiconductor material, or on a dielectric layer deposited on the semiconductor material before growth of the diamond layer. The device can include a trench or thermal shunt formed in the substrate on the backside of the device, or can include a heat sink to provide additional thermal management.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: January 26, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Karl D. Hobart
  • Publication number: 20150348866
    Abstract: An array of through-silicon vias (TSVs) are formed in a silicone substrate. The vias can be tapered such that the diameter of the via at the surface of the substrate is larger than the diameter of the via at its bottom, with the diameter varying continuously along its depth. After the via is formed, it is seeded with a thin layer of nanocrystalline diamond (NCD) particles, and a NCD film is grown on the bottom and along the sidewalls of the via. The presence of the diamond-filled vias provides improved thermal management to semiconductor devices formed on the silicon substrate.
    Type: Application
    Filed: August 7, 2015
    Publication date: December 3, 2015
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Marko J. Tadjer, Tatyana I. Feygelson, Bradford B. Pate, Travis J. Anderson