Abstract: A chip (2, 3) is arranged above a top side of a flexible support (1) and mechanically decoupled from the support. Electrical connections (8, 11) of the chip are embodied using a planar connection technique. The chip can be separated from the support by an air gap or a base layer (7) composed of a soft or compressible material.

Abstract: With respect to an electronic component, in particular a power module, and in a corresponding method for producing or contact-connecting said component, the component (1) is fastened to an electrically insulating carrier film (3) having at least one first inorganic material and at least one opening (5) in which at least one electrical contact-connection (7) of the component (1) to outside the component (1) is provided. This makes it possible to provide electronic components (1), in particular power modules, for a temperature range of >175 DEG C.

Abstract: An embodiment of the present invention discloses a method for contacting at least one electrical contact surface on a surface of a substrate and/or at least one component arranged on the substrate, especially a semiconductor chip. The method includes the following steps: at least one insulating film consisting of an electrically insulating plastic material is laminated, under a vacuum, onto the surfaces of the substrate and the component including the contact surface; and the contact surface to be contacted on the surfaces is bared by opening a window in the insulating film. An embodiment of the present invention further comprises sheet contacting the bared contact surface with at least one metallisation on an insulating film.

Abstract: Disclosed is a method for producing a package. According to said method, a substrate is provided, on a surface of which one or several components are disposed, and a hermetically sealing protective layer is formed on the one or several components and on the surface of the substrate. The hermetically sealing protective layer is impermeable to gas, liquid, and electromagnetic waves, temperature-resistant, electrically insulating, and process-resistant.

Abstract: In a method for producing a semiconductor component, in particular a semiconductor structure having a surface structure or topography which is produced by means of electronic components (2) on a substrate (1), at least one electronic component (2) is applied to a substrate (1), and an isolation layer (3) is applied to the topography which is produced by means of the at least one component (2) on the substrate (1). Contact-making openings (5) are then produced in the isolation layer (3) at contact points (8, 9) for the at least one electronic component, the isolation layer (3) and the contact points (8, 9) in the contact-making openings (5) are planar-metallized, and the metallization is structured in order to produce electrical connections (4), with the isolation layer (3) having a glass coating.

Abstract: A layer of electrically insulating material is applied to a substrate and a component located thereon, in such a way that said layer follows the surface contours.

Abstract: An optoelectronic component includes a carrier element. At least two elements are arranged in an adjacent fashion on a first side of the carrier element. Each element has at least one optically active region for generating the electromagnetic radiation. The optoelectronic component has an electrically insulating protective layer arranged at least in part on a surface of the at least two adjacent elements which lies opposite the first side. The protective layer, at least in a first region arranged between the at least two adjacent elements, at least predominantly prevents a transmission of the electromagnetic radiation generated by the optically active regions.

Abstract: A semiconductor chip device including a surface on which at least one electrical contact surface is provided. A foil from an electrically insulating material is applied, especially by vacuum, to the surface and rests closely to the surface and adheres to the surface. The foil, in the area of the contact surface, is provided with a window in which the contact surface is devoid of the foil and is contacted across a large area to at least one layer from an electroconductive material. In at least one embodiment, the layer from the electroconductive material is part of a flexible contact for electrically connecting the contact surface to at least one external connecting conductor.

Abstract: In an arrangement having at least one substrate, at least one electrical component is disposed on a surface section of the substrate and is provided with an electrical contact area, and at least one electrical contact lug has an electrical connecting area electrically contacting the contact area of the component. The connecting area of the contact lug and the contact area of the component are interconnected so that at least one zone of the contact lug protrudes beyond the area of the component. The contact lug is provided with at least one electrically conducting film while the electrically conducting film is provided with the electrical connecting area of the contact lug. The arrangement is particularly useful for large-area, low-inductive contacting of power semiconductor chips, as it allows for high current density.

Abstract: One unhoused electronic component, e.g., a semiconductor power component, has at least one connecting surface disposed on a top side and/or on a bottom side for fastening and/or for electric contacting. One side of the component is attached to and/or electrically contacts a direct copper bonding ceramic substrate, at an opposing connecting surface in the region of the connecting surface. An electrically insulating carrier film is created on the substrate on the side facing the component outside the region of the connecting surface and extending beyond the bottom side. An electrically conducting conductor part is attached to and/or electrically contacts the connecting surface on the top side. A pre-formed, three dimensional structure is formed extending beyond the area of the top side, thus creating an electrically insulating mass between the carrier film and the three-dimensional structure of the conductor part.

Abstract: A substrate which has at least one component, such as a semiconductor chip, arranged on it is manufactured from a film made of plastic material laminated onto a surface of the substrate and of the at least one component, where the surface has at least one contact area. First, the film to be laminated onto the surface of the substrate and the at least one component, or a film composite including the film, is arranged in a chamber such that the chamber is split by the film or film composite into a first chamber section and a second chamber section, which is isolated from the first chamber section so as to be gastight. A higher atmospheric pressure is provided or produced in the first chamber section than in the second chamber section; and contact is made between the surface of the substrate arranged in the second chamber section and the at least one component and the film or the film composite, which contact brings about the lamination of the film onto the surface.

Abstract: An economical miniaturized assembly and connection technology for LEDs and other optoelectronic modules is provided. A manufactured item in accordance with this technology includes a substrate with an optoelectronic component contacted in a planar manner.

Abstract: A plurality of chips disposed in a wafer on a passivated main side, having at least one chip contact surface, is provided with an insulation layer. The insulation layer has openings in the area of the at least one chip contact surface of each chip. The chip contact surfaces of each chip are provided with a chip contact surface metallization of a prescribed thickness, and the chips disposed in the water are separated therefrom.

Abstract: An electrical component is placed on a substrate. At least one film comprising a plastic material is connected to the component and to the substrate in such a way that a surface contour defined by the component and the substrate is represent is represented in a surface contour of the part of the film. Said film is laminated onto the component and the substrate in such a way that the film follows the topology of the arrangement consisting of the component and the substrate. Said film is in contact with the component and the substrate in a positive and non-positive manner, and comprises a composite material containing a filler that is different to the plastic material. The processability and electrical properties of the film are influenced by the filler or the composite material obtained thereby. In this way, other functions can be integrated into the film. Said component is, for example, a power semiconductor component. An electrically insulating and thermoconductive film is used, for example.

Abstract: In a method for producing a semiconductor component, in particular a semiconductor structure having a surface structure or topography which is produced by means of electronic components (2) on a substrate (1), at least one electronic component (2) is applied to a substrate (1), and an isolation layer (3) is applied to the topography which is produced by means of the at least one component (2) on the substrate (1). Contact-making openings (5) are then produced in the isolation layer (3) at contact points (8, 9) for the at least one electronic component, the isolation layer (3) and the contact points (8, 9) in the contact-making openings (5) are planar-metallized, and the metallization is structured in order to produce electrical connections (4), with the isolation layer (3) having a glass coating.

Abstract: A circuit which is to be protected contains a substrate which includes a recoiling area is surrounded by protruding areas. A hardware protection system is provided as half-shells and includes conductor structures arranged on and/or in the substrate to detect access to the circuit which is protected.

Abstract: A method for producing a dielectric layer extending between two or more elements of an electronic component includes arranging a free-standing dielectric layer above the elements and a deformable support layer below the elements. The free-standing dielectric layer is laminated onto at least a portion of the first surface of the first element and onto at least a portion of the first surface of the second element such that a portion of the dielectric layer extends between the first surface of the first element and the first surface of the second element.

Abstract: A method for selectively producing film laminates for packaging and for insulating unpackaged electronic components and functional patterns and corresponding device. The method coat surface regions of functional patterns arranged on a substrate and/or of surface regions of semiconductor chips arranged on the substrate. An insulation is to be effectively adapted in its properties to different requirements of functional patterns and/or electronic components. Film regions are laminated on surface regions in such a way that the properties of the plastics material of the film regions are adapted to the function of the film. This adaptation is individual and selective. Various films are used. The method is suitable in particular for coating or packaging electronic components or active and passive devices.

Abstract: In one embodiment of the present invention, a method is disclosed for contacting at least one electric contact surface on a surface of a substrate and/or a surface of a semiconductor chip arranged on a substrate. According to one embodiment of the invention, a film of electrically insulating plastic material is laminated onto the surfaces. A large-area contacting of the contact surfaces, which are freely accessible via the openings in the film, with a layer of electrically conductive material is then carried out. It is the aim of a planar electric contacting method to produce openings in an insulation during a short period of processing time. In particular, openings are to be positioned at a precise position to the contact surfaces. To achieve this, openings are produced in the film of electrically insulating plastic material in the region of the contact surface to be contacted by means of laser cutting and prior to laminating. This method is suitable for all planar contacting processes.

Abstract: According to the invention, a layer made of an electrically insulating material is applied to a substrate and a component that is arranged thereupon in such way that said layer follows the surface contour formed by the substrate and the component.