Patents by Inventor Karthik Kumar
Karthik Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240386332Abstract: A method comprises collecting usage data for a plurality of automated resources integrated in a platform, computing a utilization score for one or more automated resources of the plurality of automated resources based at least in part on the usage data, and predicting a future utilization for the one or more automated resources using one or more machine learning algorithms. Integration of the one or more automated resources in the platform is controlled based at least in part on one or more of the utilization score and the future utilization.Type: ApplicationFiled: May 19, 2023Publication date: November 21, 2024Inventors: Abhijit Mishra, Madhusudhana Reddy Chilipi, Karthik K, Tousif Mohammed, Panguluru Vijaya Sekhar, Pushpa Kumar Marlapalli, Ananth Nagaraju, Bijan Kumar Mohanty, Hung Dinh, Anusha Shetty
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Publication number: 20240385884Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to estimate workload complexity. An example apparatus includes processor circuitry to perform at least one of first, second, or third operations to instantiate payload interface circuitry to extract workload objective information and service level agreement (SLA) criteria corresponding to a workload, and acceleration circuitry to select a pre-processing model based on (a) the workload objective information and (b) feedback corresponding to workload performance metrics of at least one prior workload execution iteration, execute the pre-processing model to calculate a complexity metric corresponding to the workload, and select candidate resources based on the complexity metric.Type: ApplicationFiled: December 23, 2021Publication date: November 21, 2024Inventors: Karthik Kumar, Timothy Verrall, Thomas Willhalm, Francesc Guim Bernat, Zhongyan Lu
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Publication number: 20240382463Abstract: The present disclosure provides a composition comprising a histone deacetylase (HDAC) inhibitor and an immune checkpoint inhibitor and methods for using the same in treating cancer.Type: ApplicationFiled: May 16, 2024Publication date: November 21, 2024Applicant: Avstera Therapeutics Corp.Inventors: Karthik Musunuri, Damian Kovalovsky, Dileep Kumar
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Publication number: 20240358296Abstract: Provided herein is an instrument delivery device including an instrument, a housing having a proximal end and a distal end and defining an inner volume configured to movably receive the instrument, a coupling device positioned at the distal end of the housing and including a lock configured to couple the housing to a proximal connector of the catheter assembly, and an advancement member configured to move relative to the housing to move the instrument between a first position and a second position. A scrubbing cap is engaged with the lock that includes a scrubbing insert, a housing having a connector portion configured to engage with the lock, a holder portion configured to retain the scrubbing insert therein, and a seal that seals the scrubbing insert within the holder portion. The scrubbing cap is engaged with the lock so as to be removable from the instrument delivery device.Type: ApplicationFiled: April 23, 2024Publication date: October 31, 2024Inventors: Praveen Nalawade, Manish Kumar, Karthik MR, Shishir Prasad
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Patent number: 12132825Abstract: Technologies for accelerated key caching in an edge hierarchy include multiple edge appliance devices organized in tiers. An edge appliance device receives a request for a key, such as a private key. The edge appliance device determines whether the key is included in a local key cache and, if not, requests the key from an edge appliance device included in an inner tier of the edge hierarchy. The edge appliance device may request the key from an edge appliance device included in a peer tier of the edge hierarchy. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys in the key cache for eviction. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys for pre-fetching. Those functions of the edge appliance device may be performed by an accelerator such as an FPGA. Other embodiments are described and claimed.Type: GrantFiled: December 23, 2021Date of Patent: October 29, 2024Assignee: Intel CorporationInventors: Timothy Verrall, Thomas Willhalm, Francesc Guim Bernat, Karthik Kumar, Ned M. Smith, Rajesh Poornachandran, Kapil Sood, Tarun Viswanathan, John J. Browne, Patrick Kutch
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Patent number: 12129751Abstract: Examples described herein provide a method for drilling a wellbore by a wellbore operation system into a subsurface of the earth. The wellbore operation system includes a bottom hole assembly. The method includes conveying the bottom hole assembly into the wellbore. The method further includes selecting a well plan for the wellbore. The method further includes measuring well data by at least one sensor in the wellbore operation system while the bottom hole assembly is in the wellbore. The method further includes generating, by a processing device, a steering proposal based at least in part on the well plan and the well data. The method further includes drilling, with the wellbore operation system, at least a portion of the wellbore based at least in part on the steering proposal.Type: GrantFiled: August 5, 2022Date of Patent: October 29, 2024Assignee: BAKER HUGHES OILFIELD OPERATIONS LLCInventors: Christian Hansen, Kai Karvinen, Sanjib Kumar Jena, Clemens Vanja Rene Klemme, Karthik Nageshwara Rao
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Patent number: 12130754Abstract: Examples described herein relate to a network device apparatus that includes a packet processing circuitry configured to determine if target data associated with a memory access request is stored in a different device than that identified in the memory access request and based on the target data associated with the memory access request identified as stored in a different device than that identified in the memory access request, cause transmission of the memory access request to the different device. In some examples, the memory access request comprises an identifier of a requester of the memory access request and the identifier comprises a Process Address Space identifier (PASID) and wherein the configuration that a redirection operation is permitted to be performed for a memory access request is based at least on the identifier.Type: GrantFiled: August 17, 2020Date of Patent: October 29, 2024Assignee: Intel CorporationInventors: Karthik Kumar, Francesc Guim Bernat
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Patent number: 12131456Abstract: State of art techniques mostly rely of computationally intensive, time consuming Neural Networks. Embodiments provide a method and system for identification and classification of different grain and adulterant types for grain grading analysis. The method analyzes input image of grain sample of elements to determine morphological features of elements, using dynamically determined calibration factor from reference object in the image. Variation in perimeter of elements is used to perform classification of elements into target grain size, low size adulterants and higher size adulterants. The aspect ratio of target grain determines grain variety and adulterants determine adulteration percentage. Elements are classified into grain colored and non-grain colored adulterants. Grain colored adulterants are further classified as Grain Like Impurities and non-GLI, using predefined ranges of standard deviation of perimeter metric.Type: GrantFiled: May 3, 2022Date of Patent: October 29, 2024Assignee: Tata Consultancy Services LimitedInventors: Rajatkumar Shrivastav, Swagatam Bose Choudhury, Sanat Sarangi, Karthik Srinivasan, Vaibhav Sadashiv Lonkar, Nagameena Neelakantapillai, Dinesh Kumar Singh, Srinivasu Pappula
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Patent number: 12132790Abstract: An architecture to perform resource management among multiple network nodes and associated resources is disclosed. Example resource management techniques include those relating to: proactive reservation of edge computing resources; deadline-driven resource allocation; speculative edge QoS pre-allocation; and automatic QoS migration across edge computing nodes.Type: GrantFiled: July 28, 2022Date of Patent: October 29, 2024Assignee: Intel CorporationInventors: Francesc Guim Bernat, Patrick Bohan, Kshitij Arun Doshi, Brinda Ganesh, Andrew J. Herdrich, Monica Kenguva, Karthik Kumar, Patrick G Kutch, Felipe Pastor Beneyto, Rashmin Patel, Suraj Prabhakaran, Ned M. Smith, Petar Torre, Alexander Vul
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Patent number: 12132664Abstract: Example edge gateway circuitry to schedule service requests in a network computing system includes: gateway-level hardware queue manager circuitry to: parse the service requests based on service parameters in the service requests; and schedule the service requests in a queue based on the service parameters, the service requests received from client devices; and hardware queue manager communication interface circuitry to send ones of the service requests from the queue to rack-level hardware queue manager circuitry in a physical rack, the ones of the service requests corresponding to functions as a service provided by resources in the physical rack.Type: GrantFiled: December 19, 2022Date of Patent: October 29, 2024Assignee: INTEL CORPORATIONInventors: Francesc Guim Bernat, Karthik Kumar, Suraj Prabhakaran, Ignacio Astilleros Diez, Timothy Verrall
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Patent number: 12132805Abstract: Technologies for fulfilling service requests in an edge architecture include an edge gateway device to receive a request from an edge device or an intermediate tier device of an edge network to perform a function of a service by an entity hosting the service. The edge gateway device is to identify one or more input data to fulfill the request by the service and request the one or more input data from an edge resource identified to provide the input data. The edge gateway device is to provide the input data to the entity associated with the request.Type: GrantFiled: December 3, 2021Date of Patent: October 29, 2024Assignee: Intel CorporationInventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Petar Torre, Ned Smith, Brinda Ganesh, Evan Custodio, Suraj Prabhakaran
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Publication number: 20240353915Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to perform dynamic function control. An example apparatus includes interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to parse a packet for a function directive, activate a function associated with the function directive based on a type of the function directive being associated with an activation instruction, disable the function associated with the function directive based on the type of the function directive being associated with a deactivation instruction, and publish an active function list (AFL) and a passive function list (PFL) based on the type of the function directive.Type: ApplicationFiled: July 3, 2024Publication date: October 24, 2024Inventors: Akhilesh S. Thyagaturu, Francesc Guim Bernat, Karthik Kumar, Stephen Thomas Palermo, John J. Browne
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Publication number: 20240349961Abstract: An autonomous vacuum implements a semi-waterproof waste bag capable of collecting dry waste from vacuum debris and liquid waste from mopping. The autonomous vacuum leverages a dual-roller cleaning head, one for dry cleaning and another for wet cleaning. The autonomous vacuum utilizes vacuum force to ingest both dry waste and liquid waste from the cleaning head into the semi-waterproof waste bag. The semi-waterproof waste bag includes a non-permeable portion formed of a waterproof material and a permeable portion formed of an air-permeable material. The semi-waterproof waste bag may further include a water-absorbent material, e.g., water-absorbing spherical beads.Type: ApplicationFiled: April 22, 2024Publication date: October 24, 2024Inventors: Karthik Chandrashekaraiah, Anshuman Kumar, Yu Yang Liu, Shu Yan Liu, Mehul Nariyawala, Navneet Dalal
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Publication number: 20240354390Abstract: Systems and methods are provided for intelligent driving monitoring systems, advanced driver assistance systems and autonomous driving systems, and providing one-click driver image labeling to facilitate the assignment of drive time to a driver. Various aspects of the driver and/or passengers may be determined, which may include a driver identifier previously associated with the driver, whether the driver is wearing a facial covering, whether an image of the driver is partially occluded, whether the driver is facing in the direction of the camera, and whether an image of the driver is expected to be easily recognizable to a person tasked with assigning representative driver images to driver identifiers. These determinations may be used to improve the efficacy and ease-of-use of a visual login system.Type: ApplicationFiled: July 3, 2024Publication date: October 24, 2024Applicant: NETRADYNE, INC.Inventors: Hisham Rahman, Vinay Kumar Rai, Venkata Sreekanta Reddy Annapureddy, Badugu Naveen Chakravarthy, Satinder Singh, Roshan Mathews, Suresh Kumar Yerakaraju, Karthik Dumpala, Vishal Gupta, Ankur Nigam, Suresh Babu Yanamala, Adam David Kahn, James Anthony Curtis, Shravan Kumar Motuti, Arun Valiaparambil
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Publication number: 20240355133Abstract: Examples of a computing device for text recognition is provided. The computing device comprises a processor coupled to a storage medium that stores instructions, which upon execution by the processor, cause the processor to receive a data file comprising an image, identify at least one contour in the image, partition the at least one contour into a plurality of segments, and identify a text character in each segment of the plurality of segments.Type: ApplicationFiled: April 18, 2023Publication date: October 24, 2024Inventors: Seema Chopra, Aravindan Krishnan, Vinod Kumar Reddy Bachili, Karthik Kalyan Kumar
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Publication number: 20240349962Abstract: A muffler for an autonomous vacuum includes one or more chambers and one or more noise-absorbing elements for noise reduction of air exhausted into an external environment of the autonomous vacuum. The muffler is coupled to a vacuum stack inclusive of a vacuum motor. The muffler includes a main body, a foam layer, and a sealing plate. The main body includes an inlet for air exhausted by the vacuum motor and forms the one or more chambers fluidically connected to the inlet. The foam layer is disposed within one of the chambers of the main body. The foam layer absorbs sound waves incident on the foam layer. The sealing plate is affixed to the main body and includes an outlet to exhaust air from the chambers to an external environment of the autonomous vacuum.Type: ApplicationFiled: April 22, 2024Publication date: October 24, 2024Inventors: Karthik Chandrashekaraiah, Anshuman Kumar, Zhen Bo Bian, Mehul Nariyawala, Navneet Dalal
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Publication number: 20240348130Abstract: An electric motor may include a stator assembly comprising a stator housing, and one or more rotors coupled to the stator by a rotor shaft assembly. The stator housing may include a cooling structure that has a plurality of cooling body portions and a plurality of cooling conduits defined by the plurality of cooling body portions. A method of forming a stator housing for an electric machine may include additively manufacturing a stator housing that includes a cooling structure defining a fluid domain, coupling a working fluid source to the stator housing and introducing a working fluid into the fluid domain defined by the cooling structure, and sealing the cooling structure with the working fluid contained within the fluid domain of the cooling structure.Type: ApplicationFiled: June 25, 2024Publication date: October 17, 2024Inventors: Joseph John Zierer, Brian Magann Rush, Karthik K. Bodla, Andrew Thomas Cross, Vandana Prabhakar Rallabandi, Konrad Roman Weeber, Anoop Kumar Jassal
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Patent number: 12120175Abstract: Technologies for providing selective offload of execution of an application to the edge include a device that includes circuitry to determine whether a section of an application to be executed by the device is available to be offloaded. Additionally, the circuitry is to determine one or more characteristics of an edge resource available to execute the section. Further, the circuitry is to determine, as a function of the one or more characteristics and a target performance objective associated with the section, whether to offload the section to the edge resource and offload, in response to a determination to offload the section, the section to the edge resource.Type: GrantFiled: March 7, 2022Date of Patent: October 15, 2024Assignee: Intel CorporationInventors: Francesc Guim Bernat, Ned Smith, Thomas Willhalm, Karthik Kumar, Timothy Verrall
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Patent number: 12117890Abstract: In some examples, a computing device may determine that an issue (e.g., crash, restart etc.) occurred, gather context data (e.g., logs, device profile, etc.) associated with the issue, and generate a contact address to technical support based on the context data. The computing device may upload the context data to a location accessible to a server. After a user of the computing device initiates a communication to technical support using the contact address, the server may automatically route the call, based on the contact address, to a particular technician that has experience addressing the issue. The server may retrieve the context data and use machine learning to determine recommendations to address the issue. The machine learning may prioritize the recommendations and provide the context data and the prioritized recommendations to enable the particular technician to quickly resolve the issue.Type: GrantFiled: July 20, 2020Date of Patent: October 15, 2024Assignee: Dell Products L.P.Inventors: Karthik Ranganathan, Vasudev Ka, Sathish Kumar Bikumala
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Patent number: 12120012Abstract: A device of a service coordinating entity includes communications circuitry to communicate with a plurality of access networks via a corresponding plurality of network function virtualization (NFV) instances, processing circuitry, and a memory device. The processing circuitry is to perform operations to monitor stored performance metrics for the plurality of NFV instances. Each of the NFV instances is instantiated by a corresponding scheduler of a plurality of schedulers on a virtualization infrastructure of the service coordinating entity. A plurality of stored threshold metrics is retrieved, indicating a desired level for each of the plurality of performance metrics. A threshold condition is detected for at least one of the performance metrics for an NF V instance of the plurality of NFV instances, based on the retrieved plurality of threshold metrics. A hardware resource used by the NFV instance to communicate with an access network is adjusted based on the detected threshold condition.Type: GrantFiled: August 19, 2021Date of Patent: October 15, 2024Assignee: Intel CorporationInventors: Francesc Guim Bernat, Andrew J. Herdrich, Karthik Kumar, Felipe Pastor Beneyto, Edwin Verplanke, Rashmin Patel, Monica Kenguva, Brinda Ganesh, Alexander Vul, Ned M. Smith