Abstract: A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.

Abstract: Methods for monitoring of performance parameters of one or more receive channels and/or one or more transmit channels of a radar system-on-a-chip (SOC) are provided. The radar SOC may include a loopback path coupling at least one transmit channel to at least one receive channel to provide a test signal from the at least one transmit channel to the at least one receive channel when the radar SOC is operated in test mode. In some embodiments, the loopback path includes a combiner coupled to each of one or more transmit channels, a splitter coupled to each of one or more receive channels, and a single wire coupling an output of the combiner to an input of the splitter.

Abstract: A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF) signal, and an interference monitoring component coupled to the receiver to receive the digital IF signal, in which the interference monitoring component is configured to monitor at least one sub-band in the digital IF signal for interference, in which the at least one sub-band does not include a radar signal.

Abstract: A FMCW radar system with a built-in self-test (BIST) system for monitoring includes a receiver, a transmitter, and a frequency synthesizer. A FMCW chirp timing engine controls timing of operations at least one radar component. The BIST system includes at least one switchable coupling for coupling a first plurality of different analog signals including from a first plurality of selected nodes in the receiver or transmitter that are all coupled to a second number of monitor analog-to-digital converters (ADCs). The second number is less than (<) the first plurality of different analog signals. The BIST system includes a monitor timing engine and controller operating synchronously with the chirp timing engine, that includes a software configurable monitoring architecture for generating control signals including for selecting using the switchable coupling which analog signal to forward to the monitor ADC and when the monitor ADC samples the analog signals.

Abstract: A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.

Abstract: A radar system is provided that includes a receive channel configured to receive a reflected signal and to generate a first digital intermediate frequency (IF) signal based on the reflected signal, a reference receive channel configured to receive a reflected signal and to generate a second digital IF signal based on the reflected signal, and digital mismatch compensation circuitry coupled to receive the first digital IF signal and the second digital IF signal, the digital mismatch compensation circuitry configured to process the first digital IF signal and the second digital IF signal to compensate for mismatches between the receive channel and the reference receive channel.

Abstract: A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF) signal, and an interference monitoring component coupled to the receiver to receive the digital IF signal, in which the interference monitoring component is configured to monitor at least one sub-band in the digital IF signal for interference, in which the at least one sub-band does not include a radar signal.

Abstract: A radar system is provided that includes a receive channel configured to receive a reflected signal and to generate a first digital intermediate frequency (IF) signal based on the reflected signal, a reference receive channel configured to receive a reflected signal and to generate a second digital IF signal based on the reflected signal, and digital mismatch compensation circuitry coupled to receive the first digital IF signal and the second digital IF signal, the digital mismatch compensation circuitry configured to process the first digital IF signal and the second digital IF signal to compensate for mismatches between the receive channel and the reference receive channel.

Abstract: The disclosure provides a radar apparatus for estimating a position and a velocity of a plurality of obstacles. The radar apparatus includes a slave radar chip. A master radar chip is coupled to the slave radar chip. The master radar chip includes a local oscillator that generates a transmit signal. The slave radar chip receives the transmit signal on a first path and sends the transmit signal back to the master radar chip on a second path. A delay detect circuit is coupled to the local oscillator and receives the transmit signal from the slave radar chip on the second path and the transmit signal from the local oscillator. The delay detect circuit estimates a routing delay from the transmit signal received from the slave radar chip on the second path and from the transmit signal received from the local oscillator.

Abstract: A method for calibrating a cascaded radar system includes transmitting first radar transmission signal from a radar device. First radar reflection signals corresponding to the respective first radar transmission signal reflected from calibration target are received at each of the radar devices. The first radar reflection signals are demodulated to generate first baseband signals at each of the radar devices. A second radar transmission signal is modulated with respect to the first radar transmission signal at the respective one of the radar devices. The second radar transmission signal is transmitted from the respective one of the radar devices and are received as second radar reflection signals at each of the radar devices. The second radar reflection signals are demodulated to generate second baseband signals at each of the radar devices, and each of the radar devices are calibrated based on the first and second baseband signals.

Abstract: A radar system is provided that includes transmission signal generation circuitry, a transmit channel coupled to the transmission generation circuitry to receive a continuous wave test signal, the transmit channel configurable to output a test signal based on the continuous wave signal in which a phase angle of the test signal is changed in discrete steps within a phase angle range, a receive channel coupled to the transmit channel via a feedback loop to receive the test signal, the receive channel including an in-phase (I) channel and a quadrature (Q) channel, a statistics collection module configured to collect energy measurements of the test signal output by the I channel and the test signal output by the Q channel at each phase angle, and a processor configured to estimate phase and gain imbalance of the I channel and the Q channel based on the collected energy measurements.

Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to test RADAR integrated circuits. A radar circuit comprising a local oscillator (LO), a transmitter coupled to the LO and configured to be coupled to a transmission network, a receiver configured to be coupled to the transmission network, and a controller coupled to the LO, the transmitter, and the receiver, the controller to cause the LO to generate a frequency modulated continuous waveform (FMCW), cause the transmitter to modulate the FMCW as a modulated FMCW, cause the transmitter to transmit the modulated FMCW via the transmission network and the receiver to obtain a received FMCW from the transmission network, and in response to obtaining the received FMCW from the receiver, generate a performance characteristic of the radar circuit based on the received FMCW.

Abstract: A radar system is provided that includes a radar transceiver integrated circuit (IC) configurable to transmit a first frame of chirps, and another radar transceiver IC configurable to transmit a second frame of chirps at a time delay ?T, wherein ?T=Tc/K, K?2 and Tc is an elapsed time from a start of one chirp in the first frame and the second frame and a start of a next chirp in the first frame and the second frame, wherein the radar system is configured to determine a velocity of an object in a field of view of the radar system based on first digital intermediate frequency signals generated responsive to receiving reflected chirps of the first frame and second digital IF signals generated responsive to receiving reflected chirps of the time delayed second frame, wherein the maximum measurable velocity is increased by a factor of K.

Abstract: A FMCW radar system with a built-in self-test (BIST) system for monitoring includes a receiver, a transmitter, and a frequency synthesizer. A FMCW chirp timing engine controls timing of operations at least one radar component. The BIST system includes at least one switchable coupling for coupling a first plurality of different analog signals including from a first plurality of selected nodes in the receiver or transmitter that are all coupled to a second number of monitor analog-to-digital converters (ADCs). The second number is less than (<) the first plurality of different analog signals. The BIST system includes a monitor timing engine and controller operating synchronously with the chirp timing engine, that includes a software configurable monitoring architecture for generating control signals including for selecting using the switchable coupling which analog signal to forward to the monitor ADC and when the monitor ADC samples the analog signals.

Abstract: A radar system is provided that includes transmission signal generation circuitry, a transmit channel coupled to the transmission generation circuitry to receive a continuous wave test signal, the transmit channel configurable to output a test signal based on the continuous wave signal in which a phase angle of the test signal is changed in discrete steps within a phase angle range, a receive channel coupled to the transmit channel via a feedback loop to receive the test signal, the receive channel including an in-phase (I) channel and a quadrature (Q) channel, a statistics collection module configured to collect energy measurements of the test signal output by the I channel and the test signal output by the Q channel at each phase angle, and a processor configured to estimate phase and gain imbalance of the I channel and the Q channel based on the collected energy measurements.

Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.

Abstract: Aspects of the present disclosure provide for a radar system including a radar IC including a timing engine, a local oscillator, and a modulator. The timing engine is configured to generate one or more chirp control signals. The local oscillator is configured to receive the one or more chirp control signals and generate a frame including a first sequence of chirps according to the one or more chirp control signals. The modulator is configured to modulate the first sequence of chirps to generate a second sequence of chirps so the frame includes the first sequence of chirps and the second sequence of chirps offset by a first frequency value.

Abstract: A device includes a circuit board having thereon, a controlling component, a first radar chip and a second radar chip. The first radar chip includes a first radar transmission antenna, a second radar transmission antenna and a first radar receiver antenna array. The second radar chip includes a second radar receiver antenna array. The controlling component can control the first radar chip and the second radar chip. The first radar transmission antenna can transmit a first radar transmission signal. The second radar transmission antenna can transmit a second radar transmission signal. The second radar chip is spaced from the first radar chip so as to create a virtual receiver antenna array between the first radar receiver antenna array and the second radar receiver antenna array.

Abstract: A method of measuring phase noise (PN). A PLL frequency synthesizer is provided including a first phase frequency detector (PFD) receiving a reference frequency signal coupled to a first charge pump (CP) coupled to a VCO having an output fedback to the first PFD through a feedback divider that provides a divided frequency signal to the first PFD which outputs an error signal, and PN measurement circuitry including a replica CP coupled to an output of a second PFD or the first PFD. The error signal is received at the replica CP or the divided and reference frequency signal are received at the second PFD, wherein the replica CP outputs a scaled phase error current which is current-to-voltage converted and amplified to provide an amplified phase error voltage, and digitized to provide a digital phase error signal. The digital phase error signal is frequency analyzed to generate a PN measurement.