Abstract: A circuit element includes an upper switching device, a lower switching device, an upper diode device, and a lower diode device. An upper drain is connected to a first terminal connected to a positive electrode of a power supply, and an upper source is connected to a third terminal. A lower drain is connected to a fourth terminal, and a lower source is connected to a second terminal connected to a negative electrode of the power supply. An upper anode is connected to the fourth terminal, and an upper cathode is connected to the first terminal. A lower anode is connected to the second terminal, and a lower cathode is connected to the third terminal. The third terminal and the fourth terminal are arranged so as to be able to be short-circuited outside of a package.

Abstract: The power module includes: a first metallic circuit pattern, a semiconductor device disposed on the first metallic circuit pattern; a leadframe electrically connected to the semiconductor device; and a stress buffering layer disposed on an upper surface of the semiconductor device, and capable of buffering a CTE difference between the semiconductor device and the leadframe. The leadframe is connected to the semiconductor device via the stress buffering layer, a CTE of the stress buffering layer is equal to or less than a CTE of the leadframe, and a cross-sectional shape of the stress buffering layer is L-shape. There is provided: the power module capable of realizing miniaturization and large current capacity, and reducing cost thereof by using leadframe structure, and capable of reducing a variation in welding and improving a yield without damaging a semiconductor device; and a fabrication method for such a power module.

Abstract: A power module apparatus (10) comprises: a power module (100A) comprising a package (110) configured to seal a perimeter of a semiconductor device, and a heat radiator (42) bonded to one surface of the package; a cooling device (30) comprising a coolant passage (33) through which coolant water flows, in which the heat radiator is attached to an opening (35) provided on a way of the coolant passage, wherein the heat radiator (42) of the power module (100A) is attached to the opening (35) of the cooling device (30) so that a height (ha) and a height (hb) are substantially identical to each other. The power module in which the heat radiator is attached to the opening formed at the upper surface portion of the cooling device can also be efficiently cooled, and thereby it becomes possible to reduce degradation due to overheating.

Abstract: The power module in which a plurality of switching elements connected in series between a first and second power terminals and a circuit configured to connect connecting points thereof to an output terminal are formed, the power module includes: a heat sink to which the switching elements are contacted; a package configured to seal a perimeter of the plurality of switching elements and a part of each terminal so as to expose at least one portion of the heat sink; and a protruding portion for thickness control configured to regulate a thickness of a thermally-conductive material when contacting the heat sink to the cooling apparatus facing the cooling apparatus via the thermally-conductive material, wherein each terminal is exposed from opposite side surfaces of the package, the opposite side surfaces having a height different from a height of an exposed surface of the cooling apparatus of the package.

Abstract: The power module includes: a first metallic circuit pattern, a semiconductor device disposed on the first metallic circuit pattern; a leadframe electrically connected to the semiconductor device; and a stress buffering layer disposed on an upper surface of the semiconductor device, and capable of buffering a CTE difference between the semiconductor device and the leadframe. The leadframe is connected to the semiconductor device via the stress buffering layer, a CTE of the stress buffering layer is equal to or less than a CTE of the leadframe, and a cross-sectional shape of the stress buffering layer is L-shape. There is provided: the power module capable of realizing miniaturization and large current capacity, and reducing cost thereof by using leadframe structure, and capable of reducing a variation in welding and improving a yield without damaging a semiconductor device; and a fabrication method for such a power module.

Abstract: The power module includes: a first metallic circuit pattern, a semiconductor device disposed on the first metallic circuit pattern; a leadframe electrically connected to the semiconductor device; and a stress buffering layer disposed on an upper surface of the semiconductor device, and capable of buffering a CTE difference between the semiconductor device and the leadframe. The leadframe is connected to the semiconductor device via the stress buffering layer, a CTE of the stress buffering layer is equal to or less than a CTE of the leadframe, and a cross-sectional shape of the stress buffering layer is L-shape. There is provided: the power module capable of realizing miniaturization and large current capacity, and reducing cost thereof by using leadframe structure, and capable of reducing a variation in welding and improving a yield without damaging a semiconductor device; and a fabrication method for such a power module.

Abstract: A power module includes: an insulating layer; a first metallic plate disposed on the insulating layer; a first semiconductor chip disposed on the first metallic plate; a first adhesive insulating layer and a second adhesive insulating layer disposed on the first metallic plate; a first metallic land for main electrode wiring disposed on the first adhesive insulating layer; and a first metallic land for signal wiring disposed on the second adhesive insulating layer. There can be provided a power module having reduced cost, reduced warpage of the whole of a substrate, stabilized quality, and improved reliability; and a fabrication method for such a power module.

Abstract: A circuit element includes an upper switching device, a lower switching device, an upper diode device, and a lower diode device. An upper drain is connected to a first terminal connected to a positive electrode of a power supply, and an upper source is connected to a third terminal. A lower drain is connected to a fourth terminal, and a lower source is connected to a second terminal connected to a negative electrode of the power supply. An upper anode is connected to the fourth terminal, and an upper cathode is connected to the first terminal. A lower anode is connected to the second terminal, and a lower cathode is connected to the third terminal. The third terminal and the fourth terminal are arranged so as to be able to be short-circuited outside of a package.

Abstract: A power module includes: an insulating layer; a leadframe disposed on the insulating layer; a semiconductor chip disposed on the leadframe; and a mold resin formed so as to cover the semiconductor chip and at least a part of the metal layer, wherein a groove into which a part of the insulating layer is inserted is formed on a surface of the leadframe facing the insulating layer. Accordingly, there can be provided the power module with improved reliability so that the insulating layer and the leadframe may be hardly deviated from each other even if external force is applied thereon; and a fabrication method for such a power module.

Abstract: A power module includes: an insulating layer; a leadframe (metal layer) disposed on the insulating layer; a semiconductor chip disposed on the leadframe; and a mold resin formed so as to cover the semiconductor chip, at least a part of the metal layer, and at least a part of the insulating layer, wherein the insulating layer includes a relatively-soft insulating layer disposed at a side of the leadframe and a relatively-hard insulating layer disposed at an opposite side of the leadframes. Accordingly, there can be provided the power module with improved cooling capability and improved reliability, and the fabrication method for such a power module.

Abstract: The power module includes: a ceramics substrate; a source electrode pattern, a drain electrode pattern, a source signal electrode pattern, and a gate signal electrode pattern respectively disposed on the ceramics substrate; a semiconductor device disposed on the drain electrode pattern, the semiconductor device comprising a source pad electrode and a gate pad electrode at a front surface side; a divided leadframe for source bonded to the source electrode pattern and the source pad electrode; and a divided leadframe for gate pad electrode bonded to a gate pad electrode. There is provided a power module having a simplified structure, fabricated through a simplified process, and capable of conducting a large current; and a fabrication method for such a power module.

Abstract: The power module includes: a first metallic circuit pattern, a semiconductor device disposed on the first metallic circuit pattern; a leadframe electrically connected to the semiconductor device; and a stress buffering layer disposed on an upper surface of the semiconductor device, and capable of buffering a CTE difference between the semiconductor device and the leadframe. The leadframe is connected to the semiconductor device via the stress buffering layer, a CTE of the stress buffering layer is equal to or less than a CTE of the leadframe, and a cross-sectional shape of the stress buffering layer is L-shape. There is provided: the power module capable of realizing miniaturization and large current capacity, and reducing cost thereof by using leadframe structure, and capable of reducing a variation in welding and improving a yield without damaging a semiconductor device; and a fabrication method for such a power module.

Abstract: Disclosed is a semiconductor device having a structure capable of reducing the self-inductance of internal wiring. The semiconductor device includes: a lower board having a lower conductor layer formed on the surface thereof; a switching element bonded to the lower conductor layer in an element bonding area; a terminal bonded to the lower conductor layer in a terminal bonding area; an upper board stacked on the lower board in a board bonding area between the element bonding area and the terminal bonding area, and having an upper conductor layer on the surface thereof; and a switching element connecting member which connects the switching element with the upper conductor layer.

Abstract: A power module includes: an insulating layer; a first metallic plate disposed on the insulating layer; a first semiconductor chip disposed on the first metallic plate; a first adhesive insulating layer and a second adhesive insulating layer disposed on the first metallic plate; a first metallic land for main electrode wiring disposed on the first adhesive insulating layer; and a first metallic land for signal wiring disposed on the second adhesive insulating layer. There can be provided a power module having reduced cost, reduced warpage of the whole of a substrate, stabilized quality, and improved reliability; and a fabrication method for such a power module.

Abstract: A power module includes: an insulating layer; a leadframe (metal layer) disposed on the insulating layer; a semiconductor chip disposed on the leadframe; and a mold resin formed so as to cover the semiconductor chip, at least a part of the metal layer, and at least a part of the insulating layer, wherein the insulating layer includes a relatively-soft insulating layer disposed at a side of the leadframe and a relatively-hard insulating layer disposed at an opposite side of the leadframes. Accordingly, there can be provided the power module with improved cooling capability and improved reliability, and the fabrication method for such a power module.

Abstract: A power module includes: an insulating layer; a leadframe disposed on the insulating layer; a semiconductor chip disposed on the leadframe; and a mold resin formed so as to cover the semiconductor chip and at least a part of the metal layer, wherein a groove into which a part of the insulating layer is inserted is formed on a surface of the leadframe facing the insulating layer. Accordingly, there can be provided the power module with improved reliability so that the insulating layer and the leadframe may be hardly deviated from each other even if external force is applied thereon; and a fabrication method for such a power module.

Abstract: Disclosed is a semiconductor device having a structure capable of reducing the self-inductance of internal wiring. The semiconductor device includes: a lower board having a lower conductor layer formed on the surface thereof; a switching element bonded to the lower conductor layer in an element bonding area; a terminal bonded to the lower conductor layer in a terminal bonding area; an upper board stacked on the lower board in a board bonding area between the element bonding area and the terminal bonding area, and having an upper conductor layer on the surface thereof; and a switching element connecting member which connects the switching element with the upper conductor layer.

Abstract: Disclosed is a semiconductor device having a structure capable of reducing the self-inductance of internal wiring. The semiconductor device includes: a lower board having a lower conductor layer formed on the surface thereof; a switching element bonded to the lower conductor layer in an element bonding area; a terminal bonded to the lower conductor layer in a terminal bonding area; an upper board stacked on the lower board in a board bonding area between the element bonding area and the terminal bonding area, and having an upper conductor layer on the surface thereof; and a switching element connecting member which connects the switching element with the upper conductor layer.

Abstract: A semiconductor device which can prevent a deterioration in the electrical properties by preventing sputters generated by laser welding from adhering to a circuit pattern or a semiconductor chip and a method for fabricating such a semiconductor device are provided. A connection conductor is bonded to a copper foil formed over a ceramic by a solder and resin is injected to a level lower than a top of the connection conductor. Laser welding is then performed. After that, resin is injected. This prevents sputters generated by the laser welding from adhering to a circuit pattern or a semiconductor chip. As a result, a deterioration in the electrical properties can be prevented.

Abstract: Disclosed is a semiconductor device having a structure capable of reducing the self-inductance of internal wiring. The semiconductor device includes: a lower board having a lower conductor layer formed on the surface thereof; a switching element bonded to the lower conductor layer in an element bonding area; a terminal bonded to the lower conductor layer in a terminal bonding area; an upper board stacked on the lower board in a board bonding area between the element bonding area and the terminal bonding area, and having an upper conductor layer on the surface thereof; and a switching element connecting member which connects the switching element with the upper conductor layer.