Patents by Inventor Katsuhiro Ishida

Katsuhiro Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6636187
    Abstract: A display has a panel, and first and second electrodes. The first and second electrodes define a matrix of cells on the panel. The second electrodes, which correspond to lines of the cells, are scanned to select the cell lines one by one. The first electrodes are driven to set display data for a selected one of the cell lines. The display also has a sequence setting unit for setting sequences of scanning the second electrodes, and a sequence selection unit for selecting one of the sequences that minimizes the current and power consumption of a first-electrode driver without deteriorating the quality of the displayed images.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: October 21, 2003
    Assignee: Fujitsu Limited
    Inventors: Masaya Tajima, Junichi Okayasu, Kiyoshi Takata, Katsuhiro Ishida, Takashi Fujisaki, Yoshimasa Awata, Nobuyoshi Kondo, Shinsuke Tanaka, Naoki Matsui, Fumitaka Asami
  • Patent number: 6563486
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of subfields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 throuh SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: May 13, 2003
    Assignee: Fujitsu Limited
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Patent number: 6535224
    Abstract: The present invention relates to a display device including an interface device, which can prevent from reducing a resolving power of gray scales for a dark picture signal is provided. The interface device according to the present invention is provided to prevent from decreasing a resolving power of luminance gray scales by setting a dynamic range of an analog digital converter according to a peak value of an analog picture signal. Further, a luminance control signal for determining a luminous level of the picture to be displayed is set according to the peak value of the analog picture signal. As the result, the interface device according to the present invention can generate a display signal displaying a picture having a sufficient resolving power of gray scales with a luminance (brightness) required for the darkness, even if a dark picture, of which analog picture signal is comparatively small, is generated.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: March 18, 2003
    Assignee: Fujitsu Limited
    Inventors: Hirohito Kuriyama, Katsuhiro Ishida, Akira Yamamoto, Ayahito Kojima
  • Publication number: 20020153840
    Abstract: A structure, in which the frame can be successfully fixed to the plasma display apparatus at a low cost, has been disclosed. The plasma display apparatus comprises a plasma display panel, circuit substrates having drive circuits to drive the plasma display panel, a main frame to mount the circuit substrates, and adhesive tapes to fix the plasma display panel to the main frame, and small holes are provided on the portion to which the adhesive tapes of the main frame are fixed so that they are arranged regularly at established intervals. When the adhesive tapes and the main frame are fixed, no air bubbles form between the adhesive tapes and the main frame because plural small holes are provided on the portion to which the adhesive tapes of the main frames are fixed.
    Type: Application
    Filed: November 29, 2001
    Publication date: October 24, 2002
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Hideki Isohata, Katsuhiro Ishida, Hideo Kimura
  • Publication number: 20020130826
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of subfields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 throuh SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 19, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Publication number: 20020126139
    Abstract: The present invention relates to a display device including an interface device, which can prevent from reducing a resolving power of gray scales for a dark picture signal is provided. The interface device according to the present invention is provided to prevent from decreasing a resolving power of luminance gray scales by setting a dynamic range of an analog digital converter according to a peak value of an analog picture signal. Further, a luminance control signal for determining a luminous level of the picture to be displayed is set according to the peak value of the analog picture signal. As the result, the interface device according to the present invention can generate a display signal displaying a picture having a sufficient resolving power of gray scales with a luminance (brightness) required for the darkness, even if a dark picture, of which analog picture signal is comparatively small, is generated.
    Type: Application
    Filed: December 10, 1999
    Publication date: September 12, 2002
    Inventors: HIROHITO KURIYAMA, KATSUHIRO ISHIDA, AKIRA YAMAMOTO, AYAHITO KOJIMA
  • Patent number: 6417835
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: July 9, 2002
    Assignee: Fujitsu Limited
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Patent number: 6326938
    Abstract: Power consumption control is performed that does not induce unnatural changes in brightness even when data causing an abrupt change in load ratio is input, and that can make the power consumption settle down to the desired value. The load ratio is calculated from data input to a display apparatus, and the load ratio is again calculated this time backward from the present brightness value; if the difference between the two calculated values is greater than a threshold value, a new brightness value is calculated from the load ratio, and the brightness is set to the newly calculated value. Thereafter, the brightness is controlled based on measured power consumption values.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: December 4, 2001
    Assignee: Fujitsu Limited
    Inventors: Katsuhiro Ishida, Masaya Tajima, Kiyoshi Takata, Hirohito Kuriyama
  • Publication number: 20010045923
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Application
    Filed: April 12, 2000
    Publication date: November 29, 2001
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Publication number: 20010040536
    Abstract: A display has a panel, and first and second electrodes. The first and second electrodes define a matrix of cells on the panel. The second electrodes, which correspond to lines of the cells, are scanned to select the cell lines one by one. The first electrodes are driven to set display data for a selected one of the cell lines. The display also has a sequence setting unit for setting sequences of scanning the second electrodes, and a sequence selection unit for selecting one of the sequences that minimizes the current and power consumption of a first-electrode driver without deteriorating the quality of the displayed images.
    Type: Application
    Filed: October 29, 1998
    Publication date: November 15, 2001
    Inventors: MASAYA TAJIMA, JUNICHI OKAYASU, KIYOSHI TAKATA, KATSUHIRO ISHIDA, TAKASHI FUJISAKI, YOSHIMASA AWATA, NOBUYOSHI KONDO, SHINSUKE TANAKA, NAOKI MATSUI, FUMITAKA ASAMI
  • Patent number: 6288714
    Abstract: A PDP not posing the problem that previous display data appears at the time of activation, and a wave generating circuit capable of generating a complex wave without the necessity of expanding a quantity of ROM data and of increasing a reading speed have been disclosed. A plasma display panel display comprising a plasma display panel that includes a plurality of cells to be selectively discharged to glow, a reset unit for bringing the plurality of cells to a given state, an addressing unit for setting the plurality of cells to states associated with display data, and a sustaining discharge unit for enabling the plurality of cells to glow according to the set states further comprises an operation halt factor detector for detecting the fact that a factor of halting the operation of the plasma display panel has occurred, and an initialization unit that when it is detected that the operation halt factor has occurred, initializes memory information in the plasma display panel.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: September 11, 2001
    Assignee: Fujitsu Limited
    Inventors: Akira Yamamoto, Masaya Tajima, Toshio Ueda, Hirohito Kuriyama, Katsuhiro Ishida
  • Patent number: 6278421
    Abstract: In a plasma display apparatus with power consumption control, a control method is provided that eliminates unnaturalness of images during power control and that holds power consumption to within a target value regardless of the type of image pattern displayed. Differences between power consumption PSA and target value PSET are summed to calculate power consumption sum value PSUM, and if PSUM is negative, brightness set value MCBC is set to its maximum value MCBCMAX. If PSUM is positive, the value calculated by the equation “MCBCMAX−PSUM×MCBCMAX/PSUM,MAX” is set as the MCBC.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: August 21, 2001
    Assignee: Fujitsu Limited
    Inventors: Katsuhiro Ishida, Hiroyuki Wakayama, Hirohito Kuriyama, Akira Yamamoto, Ayahito Kojima, Masaya Tajima, Kyoji Kariya
  • Publication number: 20010005202
    Abstract: A PDP not posing the problem that previous display data appears at the time of activation, and a wave generating circuit capable of generating a complex wave without the necessity of expanding a quantity of ROM data and of increasing a reading speed have been disclosed. A plasma display panel display comprising a plasma display panel that includes a plurality of cells to be selectively discharged to glow, a reset unit for bringing the plurality of cells to a given state, an addressing unit for setting the plurality of cells to states associated with display data, and a sustaining discharge unit for enabling the plurality of cells to glow according to the set states further comprises an operation halt factor detector for detecting the fact that a factor of halting the operation of the plasma display panel has occurred, and an initialization unit that when it is detected that the operation halt factor has occurred, initializes memory information in the plasma display panel.
    Type: Application
    Filed: February 17, 1999
    Publication date: June 28, 2001
    Inventors: SHIGETOSHI TOMIO, YOSHIKAZU KANAZAWA, TOMOKATSU KISHI, TETSUYA SAKAMOTO, AKIRA YAMAMOTO, MASAYA TAJIMA, TOSHIO UEDA, HIROHITO KURIYAMA, KATSUHIRO ISHIDA
  • Patent number: 6249265
    Abstract: An intraframe time-division multiplexing type display device prevents prominent image defects, such as flicker, and affords a high-quality image display. A single frame of an image is displayed while changing a gray-scale level thereof by means of a number of sub-frames, each sub-frame comprising at least an address period and a sustained discharge period; further, the sub-frames have respective, mutually different sustained discharge periods. A gray-scale level adjustment unit arbitrarily sets the selection sequence of each of the number of sub-frames within an individual frame that is to be in a sustained discharge state.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: June 19, 2001
    Assignee: Fujitsu Limited
    Inventors: Masaya Tajima, Toshio Ueda, Katsuhiro Ishida, Naoki Matsui, Kyoji Kariya, Akira Yamamoto, Hirohito Kuriyama
  • Patent number: 6222512
    Abstract: An intraframe time-division multiplexing type display device prevents prominent image defects, such as flicker, and affords a high-quality image display. A single frame of an image is displayed while changing a gray-scale level thereof by means of a number of sub-frames, each sub-frame comprising at least an address period and a sustained discharge period; further, the sub-frames have respective, mutually different sustained discharge periods. A gray-scale level adjustment unit arbitrarily sets the selection sequence of each of the number of sub-frames within an individual frame that is to be in a sustained discharge state.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: April 24, 2001
    Assignee: Fujitsu Limited
    Inventors: Masaya Tajima, Toshio Ueda, Katsuhiro Ishida, Naoki Matsui, Kyoji Kariya, Akira Yamamoto, Hirohito Kuriyama
  • Patent number: 6144364
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: November 7, 2000
    Assignee: Fujitsu Limited
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Patent number: 6104362
    Abstract: A panel display has a display panel including a plurality of cells to be selectively discharged to an address driver for setting the plurality of cells to states represented by display data. The panel display also has a display glowing driver for enabling the plurality of cells to glow according to the set states. One frame during which one screen is displayed has a plurality of sub-frames and glowing periods within the sub-frames, during which the display cells are enabled to glow by the display glowing driver. The said sub-frames are weighted in order to achieve gray-scale display. The display panel also has a display load calculating circuit for calculating a display load to be imposed on a whole display surface during each sub-frame. In addition, a corrected period calculating circuit calculates a corrected period of a glowing period, during which the display cells are enabled to glow by the display glowing driver according to display loads to be imposed during each sub-frame.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: August 15, 2000
    Assignee: Fujitsu Limited
    Inventors: Hirohito Kuriyama, Masaya Tajima, Toshio Ueda, Katsuhiro Ishida, Akira Yamamoto
  • Patent number: 6100859
    Abstract: A display panel has a plurality of cells to be selectively discharged to glow, an addressing unit for setting the plurality of cells to states represented by display data, and a display glowing unit for enabling the plurality of cells to glow according to set states. A display data quantity counter exists for each line that detects display data to be displayed line by line and counts the number of bits as a quantity of detected display data. A frequency of sustaining discharge is set line by line on the basis of the quantity of display data per line which is provided by the display data quantity counter.
    Type: Grant
    Filed: May 2, 1996
    Date of Patent: August 8, 2000
    Assignee: Fujitsu Limited
    Inventors: Hirohito Kuriyama, Masaya Tajima, Toshio Ueda, Katsuhiro Ishida, Akira Yamamoto
  • Patent number: 6072448
    Abstract: The plasma display device has a plasma display panel and a driving part for driving the plasma display panel in a subframe mode. The driving part has a circuit for calculating the length of one frame based on one period of a vertical synchronizing signal introduced along with an image signal from an external device, a circuit for calculating the total number of sustaining pulses contained in one frame based on a brightness information contained in the image signal, and a circuit for calculating the length of one driving period required for displaying one frame. The length of one frame and the length of one driving period thus obtained are then compared in a comparing circuit. If the one frame length is found to be shorter than the one driving length, the total number of sustaining pulses or the number of scan lines will be reduced so that the one frame length becomes shorter than the length of one driving period, thus avoiding an extraordinary display.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: June 6, 2000
    Assignee: Fujitsu Limited
    Inventors: Ayahito Kojima, Masaya Tajima, Hirohito Kuriyama, Katsuhiro Ishida, Akira Yamamoto
  • Patent number: 6069609
    Abstract: An image processing device has an error distribution unit, and a multiplier. The error distribution unit carries out an error distribution operation to artificially increase the number of shades to be displayed on a display. The multiplier multiplies an input signal by a multiplication coefficient, so that the input signal is separated into display data and error data along a bit boundary and the error distribution operation is carried out on the input signal. Further, a semiconductor integrated circuit has a dither pattern generator, an adder, and an error distribution unit. The dither pattern generator stores a plurality of dither patterns in advance and receives an input image signal, the adder receives the input image signal and a pattern signal from the dither pattern generator, and the error distribution unit carries out an error distribution operation on the output of the adder. Therefore, the image processing device can realize a smooth display characteristic for the entire range of input shades.
    Type: Grant
    Filed: February 28, 1996
    Date of Patent: May 30, 2000
    Assignee: Fujitsu Limited
    Inventors: Katsuhiro Ishida, Toshio Ueda, Masaya Tajima, Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka