Patents by Inventor Katsumi Okawa
Katsumi Okawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9892997Abstract: A semiconductor package includes at least one semiconductor device situated on a leadframe island, a first at least one lead protruding from a first side of the semiconductor package and configured to provide a first electrical connection to at least one terminal of the at least one semiconductor device, a second at least one lead protruding from a second side of the semiconductor package and configured to provide a second electrical connection to the at least one terminal of the at least one semiconductor device, and a continuous conductive structure configured to provide a conductive path between the first at least one lead, the second at least one lead, and the at least one terminal of the at least one semiconductor device through the leadframe island such that the at least one semiconductor device continues to function after trimming the first at least one lead.Type: GrantFiled: April 19, 2016Date of Patent: February 13, 2018Assignee: Infineon Technologies Americas Corp.Inventors: Heny Lin, Katsumi Okawa
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Publication number: 20170301613Abstract: A semiconductor package includes at least one semiconductor device situated on a leadframe island, a first at least one lead protruding from a first side of the semiconductor package and configured to provide a first electrical connection to at least one terminal of the at least one semiconductor device, a second at least one lead protruding from a second side of the semiconductor package and configured to provide a second electrical connection to the at least one terminal of the at least one semiconductor device, and a continuous conductive structure configured to provide a conductive path between the first at least one lead, the second at least one lead, and the at least one terminal of the at least one semiconductor device through the leadframe island such that the at least one semiconductor device continues to function after trimming the first at least one lead.Type: ApplicationFiled: April 19, 2016Publication date: October 19, 2017Inventors: Heny Lin, Katsumi Okawa
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Patent number: 7609498Abstract: An inverter circuit overcurrent protection device in which an overcurrent detection resistor (Rs) is incorporated in a hybrid integrated circuit, in which a detection voltage from the overcurrent detection resistor (Rs) is divided by voltage dividing resistors (R1 and R2) and is compared with a reference voltage in an overcurrent detection circuit, for carrying out an overcurrent protection, and an external resistor is connected in series or in parallel with one of the voltage dividing resistors (R1 and R2) to change a division ratio so that the level of overcurrent protection can be adjusted; and an embodiment wherein, in the vicinity of a current detection terminal, a first pad (P1) is connected to a detection voltage from the overcurrent detection resistance, a second pad (P2) is connected to a detection voltage from the amplifier, and a third pad (P3) is connected to the voltage dividing resistors, and a bonding wire (10) is connected between the current detection terminal one of said pads, to select oneType: GrantFiled: September 19, 2006Date of Patent: October 27, 2009Assignee: Sanyo Electric Co., Ltd.Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Soichi Izutani
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Patent number: 7276793Abstract: A semiconductor device is provided wherein conductive paths 40, formed of crystal that grows better along the X-Y axis than along the Z axis, are embedded in an insulating resin 44, and the back surface of the conductive path 40 is exposed through the insulating resin 44 and sealed. With this arrangement, fractures of the conductive paths 40 embedded in the insulating resin 44 are suppressed.Type: GrantFiled: February 8, 2005Date of Patent: October 2, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Patent number: 7220921Abstract: In the present invention there is formed a sheet-like board member 50 having conductive coating films, such as first pads 55 and die pads 59, formed thereon or a sheet-like board member 50 which has been half-etched by using conductive coating films such as first pads 55 and die pads 59. A hybrid IC can be manufactured by means of utilization of post-processing processes of a semiconductor manufacturer. Further, a hybrid IC can be manufactured without adoption of a support board, and hence there can be manufactured a hybrid IC which is of lower profile and has superior heat dissipation characteristics.Type: GrantFiled: October 3, 2000Date of Patent: May 22, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Patent number: 7173336Abstract: A semiconductor device is provided wherein conductive paths 40, formed of crystal that grows better along the X-Y axis than along the Z axis, are embedded in an insulating resin 44, and the back surface of the conductive path 40 is exposed through the insulating resin 44 and sealed. With this arrangement, fractures of the conductive paths 40 embedded in the insulating resin 44 are suppressed.Type: GrantFiled: January 17, 2003Date of Patent: February 6, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Publication number: 20070014065Abstract: An inverter circuit overcurrent protection device in which an overcurrent detection resistor (Rs) is incorporated in a hybrid integrated circuit, in which a detection voltage from the overcurrent detection resistor (Rs) is divided by voltage dividing resistors (R1 and R2) and is compared with a reference voltage in an overcurrent detection circuit, for carrying out an overcurrent protection, and an external resistor is connected in series or in parallel with one of the voltage dividing resistors (R1 and R2) to change a division ratio so that the level of overcurrent protection can be adjusted; and an embodiment wherein, in the vicinity of a current detection terminal, a first pad (P1) is connected to a detection voltage from the overcurrent detection resistance, a second pad (P2) is connected to a detection voltage from the amplifier, and a third pad (P3) is connected to the voltage dividing resistors, and a bonding wire (10) is connected between the current detection terminal one of said pads, to select oneType: ApplicationFiled: September 19, 2006Publication date: January 18, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Soichi Izutani
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Patent number: 7138296Abstract: A method of manufacturing a semiconductor device is described. A board that includes a flat back face, corresponding to a resin sealing area, and a front face that has projections is provided. The projections are formed of a metal that is integral with the board and include (a) a bonding pad provided in an area surrounded by an area that contacts an upper die, (b) a wiring that is integrated with the bonding pad and which extends to a semiconductor element mounting area, and (c) an electrode provided in one body with the wiring. A semiconductor element is mounted on the semiconductor element area and electrically connected to the bonding pad. The board is placed on a lower die and resin is filled into a space formed by the board and upper die. The board is divided into multiple devices such that the projections are separated by removing the board exposed at the back face of the resin.Type: GrantFiled: May 26, 2004Date of Patent: November 21, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Patent number: 7136269Abstract: An inverter circuit overcurrent protection device in which an overcurrent detection resistor (Rs) is incorporated in a hybrid integrated circuit, in which a detection voltage from the overcurrent detection resistor (Rs) is divided by voltage dividing resistors (R1 and R2) and is compared with a reference voltage in an overcurrent detection circuit, for carrying out an overcurrent protection, and an external resistor is connected in series or in parallel with one of the voltage dividing resistors (R1 and R2) to change a division ratio so that the level of overcurrent protection can be adjusted; and an embodiment wherein, in the vicinity of a current detection terminal, a first pad (P1) is connected to a detection voltage from the overcurrent detection resistance, a second pad (P2) is connected to a detection voltage from the amplifier, and a third pad (P3) is connected to the voltage dividing resistors, and a bonding wire (10) is connected between the current detection terminal one of said pads, to select oneType: GrantFiled: April 24, 2003Date of Patent: November 14, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Soichi Izutani
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Patent number: 7125798Abstract: After a trench 54 is formed in a conductive foil 60, the circuit elements are mounted, and the insulating resin is applied on the conductive foil 60 as the support substrate. After being inverted, the conductive foil 60 is polished on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 requisite for the circuit are formed, and can be prevented from slipping because of the curved structure 59 and a visor 58.Type: GrantFiled: February 24, 2003Date of Patent: October 24, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Patent number: 7091606Abstract: After a trench 54 is formed in a conductive foil 60, the circuit elements are mounted, and the insulating resin is applied on the conductive foil 60 as the support substrate. After being inverted, the conductive foil 60 is polished on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 requisite for the circuit are formed, and can be prevented from slipping because of the curved structure 59 and a visor 58.Type: GrantFiled: February 24, 2003Date of Patent: August 15, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Patent number: 7075762Abstract: In order to enable overheat protection and overcurrent protection as well as temperature detection of an inverter circuit, an inverter circuit comprises a switching circuit 9 composed of a plurality of switching elements and a control circuit 1 for generating a control signal to be inputted into a drive circuit 2 to control a load, a temperature detecting element 12 for detecting a change in temperature of the inverter circuit is provided in a temperature detection circuit 10, and a temperature detection signal which changes according to a change in temperature of said inverter circuit, an overheat abnormal signal outputted upon a rise in temperature to a predetermined temperature or more, and an overcurrent abnormal signal outputted from an overcurrent protection FET 13 are outputted via one commonly used terminal.Type: GrantFiled: June 30, 2003Date of Patent: July 11, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Soichi Izutani
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Publication number: 20060033209Abstract: In a molding process, a hybrid integrated circuit substrate is fixed the position of the substrate in a thickness direction. A leadframe is connected, with an upward inclination, to a hybrid integrated circuit substrate and transported into a mold cavity. By horizontally fixing the leadframe by mold dies, the hybrid integrated circuit substrate inclined upward is urged downward by a pushpin. This can fix the position of the hybrid integrated circuit substrate within the mold cavity and integrally transfer-molded.Type: ApplicationFiled: October 11, 2005Publication date: February 16, 2006Applicant: Sanyo Electric Co., Ltd.Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Hidefumi Saito
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Patent number: 6975024Abstract: In a manufacturing method of a hybrid integrated circuit device of the invention, transfer molding is carried put by positioning a curved surface formed in a back surface of the substrate on a lower mold die side and a burr formed in a main surface of the substrate on an upper mold die side. This utilizes the curved surface to inject thermosetting resin in an arrow direction to pour the thermosetting resin through a below of the substrate. There are no broken fragments of burr in a thermosetting resin at the below of the substrate. As a result, a required minimum resin thickness is secured at the below of the substrate, thus realizing a hybrid integrated circuit device having a high voltage resistance, an excellent heat dissipation property and a high product quality.Type: GrantFiled: June 27, 2002Date of Patent: December 13, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Yasuhiro Koike, Hidefumi Saito, Katsumi Okawa, Junichi Iimura
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Patent number: 6975022Abstract: A device containing a flat member is provided, having a pattern for a bonding pad, a wiring, and an electrode, by half-etching through the flat member.Type: GrantFiled: March 16, 2001Date of Patent: December 13, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Patent number: 6974727Abstract: In a molding process, a hybrid integrated circuit substrate is fixed the position of the substrate in a thickness direction. A leadframe is connected, with an upward inclination, to a hybrid integrated circuit substrate and transported into a mold cavity. By horizontally fixing the leadframe by mold dies, the hybrid integrated circuit substrate inclined upward is urged downward by a pushpin. This can fix the position of the hybrid integrated circuit substrate within the mold cavity and integrally transfer-molded.Type: GrantFiled: June 27, 2002Date of Patent: December 13, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Hidefumi Saito
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Publication number: 20050146052Abstract: A semiconductor device is provided wherein conductive paths 40, formed of crystal that grows better along the X-Y axis than along the Z axis, are embedded in an insulating resin 44, and the back surface of the conductive path 40 is exposed through the insulating resin 44 and sealed. With this arrangement, fractures of the conductive paths 40 embedded in the insulating resin 44 are suppressed.Type: ApplicationFiled: February 8, 2005Publication date: July 7, 2005Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Publication number: 20050056916Abstract: After a trench 54 is formed in a conductive foil 60, the circuit elements are mounted, and the insulating resin is applied on the conductive foil 60 as the support substrate. After being inverted, the conductive foil 60 is polished on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 requisite for the circuit are formed, and can be prevented from slipping because of the curved structure 59 and a visor 58.Type: ApplicationFiled: August 13, 2004Publication date: March 17, 2005Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Publication number: 20040214374Abstract: By forming a flat member 10 forming a conductive film 11 having substantially same pattern with a second bonding pad 17, a wiring 18, and an electrode 19 for taking out , or forming a flat member 30 half-etched through the conductive film 11, it is possible to manufacture a semiconductor device 23 of BGA structure using a back process of a semiconductor maker.Type: ApplicationFiled: May 26, 2004Publication date: October 28, 2004Applicant: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
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Patent number: 6756610Abstract: A light irradiating device (68) having the good radiation characteristic comprises a plurality of conductive paths (51) that are electrically separated, a photo semiconductor chips (65) fixed onto desired conductive path (51), and a resin (67) for covering the photo semiconductor chips (65) to support the conductive paths (51) integrally.Type: GrantFiled: March 12, 2003Date of Patent: June 29, 2004Assignee: Sanyo Electric Co., Ltd.Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa