Patents by Inventor Katsumi Okawa

Katsumi Okawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040008457
    Abstract: In order to enable overheat protection and overcurrent protection as well as temperature detection of an inverter circuit, an inverter circuit comprises a switching circuit 9 composed of a plurality of switching elements and a control circuit 1 for generating a control signal to be inputted into a drive circuit 2 to control a load, a temperature detecting element 12 for detecting a change in temperature of the inverter circuit is provided in a temperature detection circuit 10, and a temperature detection signal which changes according to a change in temperature of said inverter circuit, an overheat abnormal signal outputted upon a rise in temperature to a predetermined temperature or more, and an overcurrent abnormal signal outputted from an overcurrent protection FET 13 are outputted via one commonly used terminal.
    Type: Application
    Filed: June 30, 2003
    Publication date: January 15, 2004
    Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Soichi Izutani
  • Publication number: 20030227730
    Abstract: An inverter circuit overcurrent protection device in which an overcurrent detection resistor (Rs) is incorporated in a hybrid integrated circuit, in which a detection voltage from the overcurrent detection resistor (Rs) is divided by voltage dividing resistors (R1 and R2) and is compared with a reference voltage in an overcurrent detection circuit, for carrying out an overcurrent protection, and an external resistor is connected in series or in parallel with one of the voltage dividing resistors (R1 and R2) to change a division ratio so that the level of overcurrent protection can be adjusted; and an embodiment wherein, in the vicinity of a current detection terminal, a first pad (P1) is connected to a detection voltage from the overcurrent detection resistance, a second pad (P2) is connected to a detection voltage from the amplifier, and a third pad (P3) is connected to the voltage dividing resistors, and a bonding wire (10) is connected between the current detection terminal one of said pads, to select one
    Type: Application
    Filed: April 24, 2003
    Publication date: December 11, 2003
    Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Soichi Izutani
  • Publication number: 20030197199
    Abstract: A semiconductor device is provided wherein conductive paths 40, formed of crystal that grows better along the X-Y axis than along the Z axis, are embedded in an insulating resin 44, and the back surface of the conductive path 40 is exposed through the insulating resin 44 and sealed. With this arrangement, fractures of the conductive paths 40 embedded in the insulating resin 44 are suppressed.
    Type: Application
    Filed: January 17, 2003
    Publication date: October 23, 2003
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Publication number: 20030170922
    Abstract: A light irradiating device (68) having the good radiation characteristic comprises a plurality of conductive paths (51) that are electrically separated, a photo semiconductor chips (65) fixed onto desired conductive path (51), and a resin (67) for covering the photo semiconductor chips (65) to support the conductive paths (51) integrally.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 11, 2003
    Applicant: Sanyo Electric Co., Ltd., a Japan corporation
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa
  • Publication number: 20030160317
    Abstract: After a trench 54 is formed in a conductive foil 60, the circuit elements are mounted, and the insulating resin is applied on the conductive foil 60 as the support substrate. After being inverted, the conductive foil 60 is polished on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 requisite for the circuit are formed, and can be prevented from slipping because of the curved structure 59 and a visor 58.
    Type: Application
    Filed: February 24, 2003
    Publication date: August 28, 2003
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Publication number: 20030151135
    Abstract: After a trench 54 is formed in a conductive foil 60, the circuit elements are mounted, and the insulating resin is applied on the conductive foil 60 as the support substrate. After being inverted, the conductive foil 60 is polished on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 requisite for the circuit are formed, and can be prevented from slipping because of the curved structure 59 and a visor 58.
    Type: Application
    Filed: February 24, 2003
    Publication date: August 14, 2003
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Patent number: 6593169
    Abstract: In a molding process, a hybrid integrated circuit substrate is positionally fixed in a horizontal direction. By abutting the points, where particularly leads having a spacing kept constant continue with a first connection portion, against guide pins provided on a mold die, a hybrid integrated circuit substrate can be positionally fixed. Because the spacing between the particular leads is not relied upon the number of terminals of the hybrid integrated circuit substrate, the mold can be commonly used where the number of terminals is different.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: July 15, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Hidefumi Saito
  • Patent number: 6562660
    Abstract: After a trench 54 is formed in a first conductive foil 60A, the circuit elements are mounted, and the insulating resin is applied on the laminated conductive foil 60 as the support substrate. After being inverted, a second conductive foil 60B is etched on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 for the circuit are formed, and can be prevented from slipping because of the curved structure and a visor 58.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: May 13, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Patent number: 6558970
    Abstract: A light irradiating device (68) having the good radiation characteristic comprises a plurality of conductive paths (51) that are electrically separated, a photo semiconductor chips (65) fixed onto desired conductive path (51), and a resin (67) for covering the photo semiconductor chips (65) to support the conductive paths (51) integrally.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: May 6, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa
  • Patent number: 6548328
    Abstract: After a trench 54 is formed in a conductive foil 60, the circuit elements are mounted, and the insulating resin is applied on the conductive foil 60 as the support substrate. After being inverted, the conductive foil 60 is polished on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 requisite for the circuit are formed, and can be prevented from slipping because of the curved structure 59 and a visor 58.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: April 15, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Patent number: 6545364
    Abstract: After a trench 54 is formed in a conductive foil 60, a circuit element is mounted in a flip chip method. Then, an insulating resin 50 is covered on the conductive foil 60 as a support substrate. After reversion, the conductive foil 60 is polished over the insulating resin 50 as a support substrate at this time to separate the conductive paths. Accordingly, a circuit device having the conductive paths 51 and the circuit elements 52 supported by the insulating resin 50 can be produced without employing the support substrate.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: April 8, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi, Hirokazu Fukuda, Hiroki Etou
  • Patent number: 6534330
    Abstract: There are provided the steps of preparing a conductive foil and then forming a plurality of conductive paths by forming isolation trenches, which are shallower than a thickness of the conductive foil, in the conductive foil except at least areas serving as the conductive paths, fixing respective photo semiconductor chips (65) to desired conductive paths, molding a light transparent resin (67) serving as a lens to cover respective photo semiconductor chips (65) individually and to fill the isolation trenches, and removing the conductive foil on the side on which the isolation trenches are not provided. Therefore, a light irradiating device (68), in which back surfaces of the conduction paths can be connected to the outside to thus eliminate through holes and which has the good radiation characteristic, can be implemented.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: March 18, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa
  • Patent number: 6528879
    Abstract: A semiconductor device is provided wherein conductive paths 40, formed of crystal that grows better along the X-Y axis than along the Z axis, are embedded in an insulating resin 44, and the back surface of the conductive path 40 is exposed through the insulating resin 44 and sealed. With this arrangement, fractures of the conductive paths 40 embedded in the insulating resin 44 are suppressed.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: March 4, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Publication number: 20030003630
    Abstract: In a molding process, a hybrid integrated circuit substrate is positionally fixed in a horizontal direction. By abutting the points, where particularly leads having a spacing kept constant continue with a first connection portion, against guide pins provided on a mold die, a hybrid integrated circuit substrate can be positionally fixed. Because the spacing between the particular leads is not relied upon the number of terminals of the hybrid integrated circuit substrate, the mold can be commonly used where the number of terminals is different.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 2, 2003
    Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Hidefumi Saito
  • Publication number: 20030001255
    Abstract: In a molding process, a hybrid integrated circuit substrate is fixed the position of the substrate in a thickness direction. A leadframe is connected, with an upward inclination, to a hybrid integrated circuit substrate and transported into a mold cavity. By horizontally fixing the leadframe by mold dies, the hybrid integrated circuit substrate inclined upward is urged downward by a pushpin. This can fix the position of the hybrid integrated circuit substrate within the mold cavity and integrally transfer-molded.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 2, 2003
    Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Hidefumi Saito
  • Publication number: 20030003629
    Abstract: In a manufacturing method of a hybrid integrated circuit device of the invention, transfer molding is carried put by positioning a curved surface formed in a back surface of the substrate on a lower mold die side and a burr formed in a main surface of the substrate on an upper mold die side. This utilizes the curved surface to inject thermosetting resin in an arrow direction to pour the thermosetting resin through a below of the substrate. There are no broken fragments of burr in a thermosetting resin at the below of the substrate. As a result, a required minimum resin thickness is secured at the below of the substrate, thus realizing a hybrid integrated circuit device having a high voltage resistance, an excellent heat dissipation property and a high product quality.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 2, 2003
    Inventors: Yasuhiro Koike, Hidefumi Saito, Katsumi Okawa, Junichi Iimura
  • Publication number: 20020033530
    Abstract: A semiconductor device is provided wherein conductive paths 40, formed of crystal that grows better along the X-Y axis than along the Z axis, are embedded in an insulating resin 44, and the back surface of the conductive path 40 is exposed through the insulating resin 44 and sealed. With this arrangement, fractures of the conductive paths 40 embedded in the insulating resin 44 are suppressed.
    Type: Application
    Filed: March 29, 2001
    Publication date: March 21, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020027276
    Abstract: After a trench 54 is formed in a conductive foil 60, a circuit element is mounted in a flip chip method. Then, an insulating resin 50 is covered on the conductive foil 60 as a support substrate. After reversion, the conductive foil 60 is polished over the insulating resin 50 as a support substrate at this time to separate the conductive paths. Accordingly, a circuit device having the conductive paths 51 and the circuit elements 52 supported by the insulating resin 50 can be produced without employing the support substrate.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi, Hirokazu Fukuda, Hiroki Etou
  • Publication number: 20010052600
    Abstract: There are provided the steps of preparing a conductive foil and then forming a plurality of conductive paths by forming isolation trenches, which are shallower than a thickness of the conductive foil, in the conductive foil except at least areas serving as the conductive paths, fixing respective photo semiconductor chips (65) to desired conductive paths, molding a light transparent resin (67) serving as a lens to cover respective photo semiconductor chips (65) individually and to fill the isolation trenches, and removing the conductive foil on the side on which the isolation trenches are not provided. Therefore, a light irradiating device (68), in which back surfaces of the conduction paths can be connected to the outside to thus eliminate through holes and which has the good radiation characteristic, can be implemented.
    Type: Application
    Filed: May 31, 2001
    Publication date: December 20, 2001
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa
  • Publication number: 20010050370
    Abstract: A light irradiating device (68) having the good radiation characteristic comprises a plurality of conductive paths (51) that are electrically separated, a photo semiconductor chips (65) fixed onto desired conductive path (51), and a resin (67) for covering the photo semiconductor chips (65) to support the conductive paths (51) integrally.
    Type: Application
    Filed: May 31, 2001
    Publication date: December 13, 2001
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa