Patents by Inventor Katsura Hayashi

Katsura Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150037611
    Abstract: A wiring board (3) according to an embodiment of the present invention includes an inorganic insulating layer (11A); a first resin layer (12A) on one main surface of the inorganic insulating layer (11A); a second resin layer (13A) on another main surface of the inorganic insulating layer (11A); and a conductive layer (8) partially on one main surface of the second resin layer (13A), the one main surface being on an opposite side to the inorganic insulating layer (11A). The inorganic insulating layer (11A) includes a plurality of first inorganic insulating particles (14) which are bound to each other at a part of each of the first inorganic insulating particles and gaps (G) surrounded by the plurality of first inorganic insulating particles (14). A part of the first resin layer (12A) and a part of the second resin layer (13A) are located inside the gaps (G).
    Type: Application
    Filed: February 20, 2013
    Publication date: February 5, 2015
    Applicant: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Katsura Hayashi
  • Publication number: 20140226290
    Abstract: A wiring substrate for improving connection reliability with an electronic component, a component embedded substrate that incorporates an embedded component into the wiring substrate, and a package structure including an electronic component mounted on the wiring substrate or the component embedded substrate. The wiring substrate includes a metal plate, and a wiring layer including a plurality of insulating layers and a conductive layer arranged on the plurality of insulating layers arranged on at least one principal surface of the metal plate. The plurality of insulating layers includes a first insulating layer to contact the principal surface of the metal plate and has a larger thermal expansion rate in the planar direction than the metal plate and a second insulating layer which is laminated on the first insulating layer to contact the first insulating layer and has smaller thermal expansion rate in the planar direction than the metal plate.
    Type: Application
    Filed: September 29, 2012
    Publication date: August 14, 2014
    Applicant: KYOCERA CORPORATION
    Inventor: Katsura Hayashi
  • Patent number: 8802996
    Abstract: A wiring board according to an embodiment includes an inorganic insulating layer provided with a via-hole which is a penetrating hole, and a via-conductor which is a penetrating conductor disposed inside the via-hole. The inorganic insulating layer includes first inorganic insulating particles connected to each other and second inorganic insulating particles that are larger in particle size than the first inorganic insulating particles and are connected to each other via the first inorganic insulating particles, and also has, at an inner wall of the via-hole V, a protrusion including at least part of the second inorganic insulating particle. The protrusion is covered with the via-conductor.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: August 12, 2014
    Assignee: Kyocera Corporation
    Inventor: Katsura Hayashi
  • Publication number: 20130256018
    Abstract: A circuit substrate includes a resin layer; and an inorganic insulating layer including a groove portion penetrating the inorganic insulating layer in a thickness direction thereof. A part of the resin layer is in the groove portion.
    Type: Application
    Filed: May 22, 2013
    Publication date: October 3, 2013
    Inventor: Katsura HAYASHI
  • Publication number: 20130250527
    Abstract: An electronic device is provided wherein the characteristics thereof are prevented from deteriorating. The electronic device (1) is provided with: a chip component (2) having an electronic element (22); a wiring board (3) on which the chip component (2) is mounted with a space therebetween, the space for containing the electronic element (22); a resin layer (4) provided from the surface of the chip component (2) to the surface of the wiring board (3) so as to surround the space; and an inorganic insulating layer (5), which is provided at the resin layer (4) and is positioned at the side of the space. Since entry of water vapor into the space can be reduced not only by means of the resin layer (4) but also by means of the inorganic insulating layer (5), the electronic device (1) having high airtight sealing performance can be provided.
    Type: Application
    Filed: October 25, 2011
    Publication date: September 26, 2013
    Applicant: KYOCERA CORPORATION
    Inventors: Hidefumi Hatanaka, Katsura Hayashi
  • Publication number: 20130153279
    Abstract: A wiring board according to an embodiment includes an inorganic insulating layer provided with a via-hole which is a penetrating hole, and a via-conductor which is a penetrating conductor disposed inside the via-hole. The inorganic insulating layer includes first inorganic insulating particles connected to each other and second inorganic insulating particles that are larger in particle size than the first inorganic insulating particles and are connected to each other via the first inorganic insulating particles, and also has, at an inner wall of the via-hole V, a protrusion including at least part of the second inorganic insulating particle. The protrusion is covered with the via-conductor.
    Type: Application
    Filed: August 25, 2011
    Publication date: June 20, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Katsura Hayashi
  • Publication number: 20130149514
    Abstract: An insulating sheet includes a resin sheet, and an insulating layer disposed on the resin sheet, wherein the insulating layer includes an inorganic insulating layer, and the inorganic insulating layer includes first inorganic insulating particles which have a particle size of not less than 3 nm and not greater than 110 nm and which are bonded to each other.
    Type: Application
    Filed: July 26, 2011
    Publication date: June 13, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Katsura Hayashi
  • Patent number: 8461462
    Abstract: A circuit substrate includes a resin layer; and an inorganic insulating layer including a groove portion penetrating the inorganic insulating layer in a thickness direction thereof. A part of the resin layer is in the groove portion.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: June 11, 2013
    Assignee: Kyocera Corporation
    Inventor: Katsura Hayashi
  • Patent number: 8446734
    Abstract: The invention relates to a circuit board having high density circuit and excellent connection reliability and lamination reliability. A resin fabric cloth (4) is provided by arranging single fibers (4a) or fiber bundles composed of a plurality of single fibers, which single fiber has a linear thermal expansion coefficient smaller than that of silicon, at least in two directions and alternately weaving them. In the board, the resin fabric cloth is covered with a resin portion (5) made of a resin material having a linear thermal expansion coefficient larger than that of silicon.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 21, 2013
    Assignee: Kyocera Corporation
    Inventors: Katsura Hayashi, Yutaka Tsukada, Kimihiro Yamanaka, Masaharu Shirai, Isamu Kirikihira
  • Patent number: 8431832
    Abstract: A circuit board (2) includes an insulation layer (7) where a via conductor (10) is embedded. The via conductor (10) includes: a first conductor portion (10a) having an lower portion narrower than an upper portion; and a second conductor portion (10b) which is formed immediately below the first conductor portion (10a), connected to the first conductor portion (10a), and has a maximum width greater than the upper end width of the first conductor portion (10a). The insulation layer (7) has a plurality of indentations (T1a, T1b) on the surface in contact with the via conductor (10). Convex portions (T2a, T2b) of the via conductor are arranged in the indentations (T1a, T1b).
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: April 30, 2013
    Assignee: Kyocera Corporation
    Inventors: Tadashi Nagasawa, Katsura Hayashi
  • Publication number: 20130043067
    Abstract: [PROBLEM] To provide a circuit board improved in electrical reliability. [SOLUTION] A circuit board 3 comprises a plurality of first inorganic insulating particles 13a which are connected to each other via first neck structures 17a and have a particle size of 3 nm or more and 110 nm or less and a resin (third filling portions 19c) arranged in first gaps G1 among the plurality of first inorganic insulating particles 13a.
    Type: Application
    Filed: January 13, 2012
    Publication date: February 21, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Katsura HAYASHI
  • Publication number: 20130027895
    Abstract: There is provided an interposer which meets the need of improving electrical reliability of an electronic device. An interposer includes a substrate including a penetrating-hole in a thickness direction thereof, and a penetrating conductor disposed in the penetrating-hole. The substrate includes a first insulating layer and a second inorganic insulating layer which are separated from each other in the thickness direction, and a first resin layer interposed between the first inorganic insulating layer and the second inorganic insulating layer and being in contact with the first inorganic insulating layer and the second inorganic insulating layer. A coefficient of thermal expansion of the first resin layer in thickness and planar directions thereof is larger than those of the first inorganic insulating layer and the second inorganic insulating layer.
    Type: Application
    Filed: March 25, 2011
    Publication date: January 31, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Katsura Hayashi
  • Publication number: 20120189826
    Abstract: A structure for which the electrical reliability is improved is provided. A structure in accordance with one embodiment includes an inorganic insulating layer including amorphous silicon oxide and having an elastic modulus which is 45 GPa or less. A method for manufacturing a structure in accordance with one embodiment includes applying an inorganic insulating sol including inorganic insulating particles composed of amorphous silicon oxide, and forming an inorganic insulating layer including amorphous silicon oxide and having an elastic modulus which is 45 GPa or less by heating the inorganic insulating particles at a temperature lower than a crystallization onset temperature of silicon oxide to each other.
    Type: Application
    Filed: September 28, 2010
    Publication date: July 26, 2012
    Applicant: KYOCERA CORPORATION
    Inventor: Katsura Hayashi
  • Publication number: 20120189818
    Abstract: A circuit board includes an inorganic insulating layer having first inorganic insulating particles connected to each other, and second inorganic insulating particles connected to each other via the first inorganic insulating particles and having a larger particle diameter than that of the first inorganic insulating particles.
    Type: Application
    Filed: September 28, 2010
    Publication date: July 26, 2012
    Applicant: Kyocera Corporation
    Inventor: Katsura Hayashi
  • Patent number: 8045829
    Abstract: The present invention provides a method for manufacturing an optical waveguide. The inventive method includes steps of providing a transfer member comprising a transfer sheet and a first metal film. The transfer sheet and the first metal film are detachable from each other. A laminated body made of a core layer disposed between two clad layers is formed on the transfer member. The invention also relates to optical waveguides produced by the inventive process and devices incorporating the optical waveguides of the invention.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: October 25, 2011
    Assignee: Kyocera Corporation
    Inventors: Katsura Hayashi, Yutaka Tsukada
  • Publication number: 20110232953
    Abstract: According to one embodiment of the invention, a circuit board comprises an insulating layer including a resin material, a plurality of inorganic insulating particles, and a penetrating hole. The circuit board further comprises a penetrating conductor disposed in the penetrating hole. The insulating layer includes a resin insulating portion having the plurality of inorganic insulating particles dispersed in the resin material. The insulating layer further includes an inorganic insulating portion interposed between the resin insulating portion and the penetrating conductor and made of the same material as the plurality of inorganic insulating particles.
    Type: Application
    Filed: March 29, 2011
    Publication date: September 29, 2011
    Applicant: KYOCERA CORPORATION
    Inventors: Takeshi Oga, Katsura Hayashi
  • Patent number: 8012561
    Abstract: A fiber-reinforced resin is provided which includes a fiber bundle 2 comprising a plurality of monofilament layers 20, 21, and 22 being laminated, each of the monofilament layers comprising a plurality of monofilaments 23 arranged in one direction and an adhesive 3 for adhering the monofilaments 23 of the fiber bundle 2 together, and the fiber bundle 2 has a honeycomb-shaped cross section.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: September 6, 2011
    Assignee: Kyocera Corporation
    Inventors: Masaaki Harazono, Masaharu Shirai, Katsura Hayashi
  • Publication number: 20110073358
    Abstract: A circuit substrate includes a resin layer; and an inorganic insulating layer including a groove portion penetrating the inorganic insulating layer in a thickness direction thereof. A part of the resin layer is in the groove portion.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 31, 2011
    Applicant: KYOCERA CORPORATION
    Inventor: Katsura Hayashi
  • Publication number: 20110051386
    Abstract: A circuit board (2) includes an insulation layer (7) where a via conductor (10) is embedded. The via conductor (10) includes: a first conductor portion (10a) having an lower portion narrower than an upper portion; and a second conductor portion (10b) which is formed immediately below the first conductor portion (10a), connected to the first conductor portion (10a), and has a maximum width greater than the upper end width of the first conductor portion (10a). The insulation layer (7) has a plurality of indentations (T1a, T1b) on the surface in contact with the via conductor (10). Convex portions (T2a, T2b) of the via conductor are arranged in the indentations (T1a, T1b).
    Type: Application
    Filed: November 28, 2008
    Publication date: March 3, 2011
    Applicant: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Katsura Hayashi
  • Publication number: 20100259910
    Abstract: The invention relates to a circuit board having high density circuit and excellent connection reliability and lamination reliability. A resin fabric cloth (4) is provided by arranging single fibers (4a) or fiber bundles composed of a plurality of single fibers, which single fiber has a linear thermal expansion coefficient smaller than that of silicon, at least in two directions and alternately weaving them. In the board, the resin fabric cloth is covered with a resin portion (5) made of a resin material having a linear thermal expansion coefficient larger than that of silicon.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 14, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Katsura Hayashi, Yutaka Tsukada, Kimihiro Yamanaka, Masaharu Shirai, Isamu Kirikihira