Patents by Inventor Katsura Hayashi

Katsura Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100255286
    Abstract: A method for manufacturing a resin substrate includes heating a resin sheet including fibers and a resin containing incompletely polymerized molecules to a temperature lower than a polymerization initiation temperature of the resin in order to soften the resin; applying a first pressure to the resin sheet to discharge air bubbles between the fibers outside the resin sheet; decreasing the pressure applied to the resin sheet from the first pressure to a second pressure lower than the first pressure; and heating the resin sheet to the polymerization initiation temperature of the resin or higher to polymerize the molecules of the resin and to discharge a gas generated by the polymerization outside the resin sheet.
    Type: Application
    Filed: March 26, 2010
    Publication date: October 7, 2010
    Applicant: Kyocera Corporation
    Inventors: Keisaku MATSUMOTO, Katsura Hayashi
  • Publication number: 20100136284
    Abstract: A fiber-reinforced resin is provided which includes a fiber bundle 2 comprising a plurality of monofilament layers 20, 21, and 22 being laminated, each of the monofilament layers comprising a plurality of monofilaments 23 arranged in one direction and an adhesive 3 for adhering the monofilaments 23 of the fiber bundle 2 together, and the fiber bundle 2 has a honeycomb-shaped cross section.
    Type: Application
    Filed: March 26, 2008
    Publication date: June 3, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Masaaki Harazono, Masaharu Shirai, Katsura Hayashi
  • Publication number: 20100065318
    Abstract: A circuit board according to an embodiment of the present invention relates to a circuit board 2 including an insulating layer 7 and a via conductor 8 embedded in the insulating layer 7. The via conductor 8 has a narrowed portion 80 inclined with respect to a horizontal direction X.
    Type: Application
    Filed: November 27, 2007
    Publication date: March 18, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Kiyomi Hagihara, Katsura Hayashi
  • Publication number: 20100061679
    Abstract: The present invention provides a method for manufacturing an optical waveguide. The inventive method includes steps of providing a transfer member comprising a transfer sheet and a first metal film. The transfer sheet and the first metal film are detachable from each other. A laminated body made of a core layer disposed between two clad layers is formed on the transfer member. The invention also relates to optical waveguides produced by the inventive process and devices incorporating the optical waveguides of the invention.
    Type: Application
    Filed: November 27, 2006
    Publication date: March 11, 2010
    Applicant: KYOCERA Corporation
    Inventors: Katsura Hayashi, Yutaka Tsukada
  • Publication number: 20070285907
    Abstract: There is disclosed a wiring board comprising a core substrate 110, a build-up layer 130a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.
    Type: Application
    Filed: August 9, 2007
    Publication date: December 13, 2007
    Applicant: KYOCERA CORPORATION
    Inventors: Hiroyuki NISHIKAWA, Shigeo TANAHASHI, Katsura HAYASHI
  • Patent number: 7271476
    Abstract: There is disclosed a wiring board comprising a core substrate 110, a build-up layer 130a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: September 18, 2007
    Assignee: Kyocera Corporation
    Inventors: Hiroyuki Nishikawa, Shigeo Tanahashi, Katsura Hayashi
  • Patent number: 6936336
    Abstract: A transfer sheet for use in forming a conductor circuit comprises a base and a metal layer formed into a circuit pattern on the base. The metal layer is transferred onto a surface of an insulation layer. At least part of the circuit pattern of the metal layer is formed by laser-processing. Since it is possible, without using an etching process and a plating process at a minute part of the conductor circuit, to remove the metal layer by emitting laser light having a minute beam diameter, it is possible to form a minute conductor circuit which is 50 ?m or less in width and pitch, with the result that it is prevented that the conductor circuit has a break because of excessive etching and a failure of plating deposition or the conductor circuit is short-circuited because of the residue of etching and a short of plating.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: August 30, 2005
    Assignee: Kyocera Corporation
    Inventors: Takahiro Matsunaga, Katsura Hayashi
  • Publication number: 20050087850
    Abstract: There is disclosed a wiringboard comprising a core substrate 110, a build-up layer 130a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.
    Type: Application
    Filed: August 27, 2004
    Publication date: April 28, 2005
    Inventors: Hiroyuki Nishikawa, Shigeo Tanahashi, Katsura Hayashi
  • Patent number: 6866739
    Abstract: In a film with metal foil of the present invention, a metal foil is stuck to the surface of a resin film via an adhesive layer. The adhesive is formed by crosslinking an acrylic polymer obtained by the copolymerization of a (meth)acrylic acid ester with a carboxyl group-containing radically polymerizable monomer, with a polyfunctional compound having a functional group reactive with the carboxyl group. The film with metal foil is very useful for producing a multi-layer wiring board by the so-called transfer method. By using this film, there can be produced a multi-layer wiring board having a fine and highly dense wiring/circuit layer and having a very excellently flat surface.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: March 15, 2005
    Assignees: Kyocera Corporation, Sekisui Chemical Corporation
    Inventors: Akihiko Nishimoto, Katsura Hayashi, Yasuhiko Ohyama, Shigeru Danjo, Kazuhiro Shimomura
  • Patent number: 6663946
    Abstract: An object of the invention is to satisfy all of a high-density wiring package, soldering thermal resistance, an insulating property and high-frequency transmission characteristics. The invention is a multi-layer wiring substrate having a lamination of a plurality of dielectric layers which are each provided with a wiring conductor made of a metallic foil on at least one of upper and bottom surfaces of the dielectric layer, the wiring conductors between which the dielectric layer is disposed being electrically connected with each other via a through conductor formed in the dielectric layer; on this occasion, the dielectric layers each individually are composed of a liquid crystal polymer layer and cladding layers made of a polyphenyleneether-type organic substance and formed on upper and bottom surfaces of the liquid crystal polymer layer.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: December 16, 2003
    Assignee: Kyocera Corporation
    Inventors: Takuji Seri, Katsura Hayashi, Tadashi Nagasawa, Kenji Kume, Takahiro Matsunaga, Isao Miyatani
  • Publication number: 20030178227
    Abstract: A transfer sheet for use in forming a conductor circuit comprises a base and a metal layer formed into a circuit pattern on the base. The metal layer is transferred onto a surface of an insulation layer. At least part of the circuit pattern of the metal layer is formed by laser-processing. Since it is possible, without using an etching process and a plating process at a minute part of the conductor circuit, to remove the metal layer by emitting laser light having a minute beam diameter, it is possible to form a minute conductor circuit which is 50 &mgr;m or less in width and pitch, with the result that it is prevented that the conductor circuit has a break because of excessive etching and a failure of plating deposition or the conductor circuit is short-circuited because of the residue of etching and a short of plating.
    Type: Application
    Filed: March 14, 2003
    Publication date: September 25, 2003
    Applicant: KYOCERA CORPORATION
    Inventors: Takahiro Matsunaga, Katsura Hayashi
  • Publication number: 20030034125
    Abstract: In a film with metal foil of the present invention, a metal foil is stuck to the surface of a resin film via an adhesive layer. The adhesive is formed by crosslinking an acrylic polymer obtained by the copolymerization of a (meth)acrylic acid ester with a carboxyl group-containing radically polymerizable monomer, with a polyfunctional compound having a functional group reactive with the carboxyl group. The film with metal foil is very useful for producing a multi-layer wiring board by the so-called transfer method. By using this film, there can be produced a multi-layer wiring board having a fine and highly dense wiring/circuit layer and having a very excellently flat surface.
    Type: Application
    Filed: June 26, 2002
    Publication date: February 20, 2003
    Applicant: KYOCERA CORPORATION
    Inventors: Akihiko Nishimoto, Katsura Hayashi, Yasuhiko Ohyama, Shigeru Danjo, Kazuhiro Shimomura
  • Publication number: 20020172021
    Abstract: An object of the invention is to satisfy all of a high-density wiring package, soldering thermal resistance, an insulating property and high-frequency transmission characteristics. The invention is a multi-layer wiring substrate having a lamination of a plurality of dielectric layers which are each provided with a wiring conductor made of a metallic foil on at least one of upper and bottom surfaces of the dielectric layer, the wiring conductors between which the dielectric layer is disposed being electrically connected with each other via a through conductor formed in the dielectric layer; on this occasion, the dielectric layers each individually are composed of a liquid crystal polymer layer and cladding layers made of a polyphenyleneether-type organic substance and formed on upper and bottom surfaces of the liquid crystal polymer layer.
    Type: Application
    Filed: February 28, 2002
    Publication date: November 21, 2002
    Inventors: Takuji Seri, Katsura Hayashi, Tadashi Nagasawa, Kenji Kume, Takahiro Matsunaga, Isao Miyatani
  • Patent number: 6455784
    Abstract: Provided is a curable sheet for the formation of a wiring circuit layer by circuit transfer from a transfer base material, wherein the curable sheet comprises (A) a reaction product between a polyphenylene ether resin and an unsaturated carboxylic acid or acid anhydride, (B) triallyl isocyanurate and/or triallyl cyanurate, (C) a hydrogenated block copolymer obtained by hydrogenation of a block copolymer comprising at least one polymer block A mainly comprising an aromatic vinyl compound and at least one polymer block B mainly comprising a conjugated diene compound, and (D) an inorganic filler; said Component (A), Component (B) and Component (C) being contained in amounts of 45 to 55 parts by weight, 55 to 45 parts by weight, and 25 to 35 parts by weight, respectively, each based on 100 parts by weight of total of Components (A) and (B), and said Component (C) being contained in an amount of 20 to 80 vol. %.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: September 24, 2002
    Assignees: Asahi Kasei Kabushiki Kaisha, Kyocera Corporation
    Inventors: Shozo Kinoshita, Masaki Yamamoto, Katsura Hayashi, Masaaki Hori, Toshikazu Fujii
  • Patent number: 6451441
    Abstract: In a film with metal foil of the present invention, a metal foil is stuck to the surface of a resin film via an adhesive layer. The adhesive is formed by crosslinking an acrylic polymer obtained by the copolymerization of a (meth)acrylic acid ester with a carboxyl group-containing radically polymerizable monomer, with a polyfunctional compound having a functional group reactive with the carboxyl group. The film with metal foil is very useful for producing a multi-layer wiring board by the so-called transfer method. By using this film, there can be produced a multi-layer wiring board having a fine and highly dense wiring/circuit layer and having a very excellently flat surface.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: September 17, 2002
    Assignees: Kyocera Corporation, Sekisui Chemical Corporation
    Inventors: Akihiko Nishimoto, Katsura Hayashi, Yasuhiko Ohyama, Shigeru Danjo, Kazuhiro Shimomura
  • Patent number: 6413620
    Abstract: Wiring substrate including an insulating substrate made of glass ceramics and having Young's modulus of 120 GPa or less, and a wiring circuit layer made of a high-purity metal conductor in concentration of 99% by weight or more formed on the surface of the insulating substrate and/or inside thereof. This wiring substrate may be a multi-layer wiring substrate that has a plurality of wiring circuit layers. The wiring circuit layer is preferably made of a metal foil.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: July 2, 2002
    Assignee: Kyocera Corporation
    Inventors: Tetsuya Kimura, Katsuhiko Onitsuka, Katsura Hayashi, Shinya Kawai, Akihiko Nishimoto
  • Patent number: 6384151
    Abstract: The present invention discloses a process for producing a dicyclopentadiene-modified unsaturated polyester. The process includes a first step of reacting a reaction mixture of maleic anhydride (MA) and water (H2O) with dicyclopentadiene (DCPD) and a second step of reacting the reaction product obtained in the first step with a polyhydric alcohol, or a polyhydric alcohol and a polybasic acid, to obtain an unsaturated polyester modified with dicyclopentadiene. In the first step of the process, (1) a molar ratio of water to dicyclopentadiene is greater than 1 and a molar ratio of maleic anhydride to dicyclopentadiene is 1.2 or more, (2) a molar ratio of water to maleic anhydride is 1 or less, or (3) both of the features (1) and (2) are satisfied. The present invention also discloses a polyester resin composition containing the modified unsaturated polyester and a radically polymerizable monomer, and a molding material containing the resin composition as a main component.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: May 7, 2002
    Assignee: Nippon Shokubai Co., Ltd.
    Inventors: Kenji Matsukawa, Toshio Hayashiya, Koji Takabatake, Katsura Hayashi, Hironori Funaki
  • Patent number: 6370013
    Abstract: A wiring board that incorporates electric element such as capacitor. The wiring board includes a dielectric substrate having electronic components mounting surface on the surface thereof, an electric element that is embedded in the dielectric substrate, a first conductive layer and a second conductive layer formed inside of the dielectric substrate, and via hole conductors that connect the first terminal electrode and the second terminal electrode of the electric element to the first conductive layer and the second conductive layer, respectively, and extend the surface of the dielectric substrate from the first and second conductive layers. In case both the first and the second terminal electrodes are provided in plurality, all of the plurality of first terminal electrodes are connected to the first conductive layer through the via hole conductors and all of the plurality of second terminal electrodes are connected to the second conductive layer through the via hole conductors.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: April 9, 2002
    Assignee: Kyocera Corporation
    Inventors: Yuji Iino, Hiromi Iwachi, Katsura Hayashi
  • Patent number: 6359235
    Abstract: An electronic device mounting wiring board having an electronic device mounted on the surface of a wiring substrate or inside thereof is provided. The wiring substrate includes an insulation substrate made by laminating a plurality of insulation layers that include a thermosetting resin, a wiring circuit layer formed on the surface of and inside of the insulation substrate and via hole conductors. A resin layer having a glass transition temperature lower than the curing temperature of the thermosetting resin is formed between at least one of top and bottom surfaces of the electrical device and the insulation layer.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: March 19, 2002
    Assignee: Kyocera Corporation
    Inventor: Katsura Hayashi
  • Patent number: 6207259
    Abstract: A wiring board comprising an insulating substrate containing at least an organic resin, a plurality of electrically conducting wiring layers formed on the surface and/or inside of said insulting substrate, and via-hole conductors formed in said insulating substrate in order to electrically connect the plurality of electrically conducting wiring layers, wherein said via-hole conductors contain an organic binder as well as a Cu—Sn intermetallic compound as an electrically conducting component. The via-hole conductors formed in the wiring board exhibit a high electric conductivity and a large heat resistance, making it possible to very highly reliably connect the electrically conducting wiring layers together.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: March 27, 2001
    Assignee: Kyocera Corporation
    Inventors: Yuji Iino, Riichi Sasamori, Katsura Hayashi, Masaaki Hori, Hidenori Shikada, Masaaki Harazono