Abstract: An electronic component-embedded substrate includes a core substrate, a cavity penetrating the core substrate, a wiring layer formed on one surface of the core substrate, a support pattern extending over the cavity and configured to divide the cavity into a plurality of component embedding areas, an insulation wall portion arranged on a part of the support pattern in the cavity and formed of the same material as the core substrate, a plurality of electronic components each of which is mounted in each of the plurality of component embedding areas, and an insulating material filling an inside of the cavity.

Abstract: A carrier base material-added wiring substrate includes a wiring substrate and a carrier base material. The wiring substrate includes an insulation layer, a wiring layer arranged on a lower surface of the insulation layer, and a solder resist layer that covers the lower surface of the insulation layer and includes an opening that exposes a portion of the wiring layer as an external connection terminal. The carrier base material is adhered by an adhesive layer to the solder resist layer. The carrier base material includes an opening that is in communication with the opening of the solder resist layer and exposes the external connection terminal. The opening of the carrier base material has a diameter that is smaller than that of the opening of the solder resist layer.

Abstract: A carrier base material-added wiring substrate includes a wiring substrate and first to third carrier base materials. The first carrier base material is adhered by a first adhesive layer to a lower surface of the wiring substrate and includes an opening that exposes a product area of the wiring substrate. The second carrier base material is arranged in the opening of the first carrier base material and contacts the lower surface of the wiring substrate. The third carrier base material is adhered by a second adhesive layer to the first carrier base material and the second carrier base material. The third carrier base material covers the opening of the first carrier base material. The second adhesive layer is formed entirely on an upper surface of the third carrier base material.

Abstract: A wiring board includes an insulating layer including a first insulating film provided with a first surface and a second surface that is opposite to the first surface, and composed of only resin, and a second insulating film provided with a first surface and a second surface that is opposite to the first surface, including a reinforcing member and resin, in which the reinforcing member is impregnated with the resin, and stacked on the first surface of the first insulating film such that the second surface of the second insulating film contacts the first surface of the first insulating film and the second surface of the first insulating film is exposed outside; and a first wiring layer embedded in the first insulating film, a predetermined surface of the first wiring layer being exposed from the second surface of the first insulating film.

Abstract: An electronic component-embedded board includes: a core substrate; a cavity which penetrates the core substrate; a wiring layer formed on one face of the core substrate; a component mounting pattern formed of the same material as the wiring layer and laid across the cavity to partition the cavity into through holes in plan view; an electronic component mounted on the component mounting pattern and arranged inside the cavity; a first insulating layer formed on the one face of the core substrate to cover one face of the electronic component; and a second insulating layer formed on the other face of the core substrate to cover the other face of the electronic component. The cavity is filled with the first insulating layer and the second insulating layer.

Abstract: A wiring board includes an electronic component; an insulating layer containing the electronic component therein, and including a via hole that is open at one surface of the insulating layer to expose an electrode of the electronic component; a first wiring layer embedded in the insulating layer, one surface of the first wiring layer being exposed at the one surface of the insulating layer; a second wiring layer including a wiring pattern formed on the one surface of the first wiring layer, and a via wiring extended from the wiring pattern to be extended in the via hole and directly connected to an electrode of the electronic component.

Abstract: A wiring substrate is provided with a wiring pattern including a pad and a circuit pattern. The pad is formed in a mounting region where an electronic component is mounted, and the circuit pattern extends in a planar direction from the pad. An insulation layer covers a lower surface of the wiring pattern and a side surface of the wiring pattern and partially exposes an upper surface of the wiring pattern. The insulation layer includes a covering portion that continuously covers an entire peripheral portion of the upper surface of the wiring pattern. The insulation layer includes an upper surface located upward from the upper surface of the wiring pattern.

Abstract: A wiring board includes a single-layer insulating layer, and a single-layer interconnect layer embedded in the insulating layer, wherein an entirety of a first surface of the interconnect layer is exposed in a recessed position relative to a first surface of the insulating layer, and a second surface of the interconnect layer is partially exposed in a recessed position relative to a second surface of the insulating layer.

Abstract: A wiring substrate is provided with a wiring pattern including a pad and a circuit pattern. The pad is formed in a mounting region where an electronic component is mounted, and the circuit pattern extends in a planar direction from the pad. An insulation layer covers a lower surface of the wiring pattern and a side surface of the wiring pattern and partially exposes an upper surface of the wiring pattern. The insulation layer includes a covering portion that continuously covers an entire peripheral portion of the upper surface of the wiring pattern. The insulation layer includes an upper surface located upward from the upper surface of the wiring pattern.

Abstract: The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower surface and the upper surface. A first wiring layer is formed on the lower surface of the insulation layer. A second wiring layer is formed on the intermediate surface of the insulation layer. A recess is formed in the upper surface of the insulation layer. The recess overlaps, in a plan view, a first through hole that extends through the insulation layer. The first through hole is filled with a via wiring, which is formed integrally with the first wiring layer. A bump is formed integrally with the via wiring and projected into the recess. An upper end surface of the bump is located above an upper surface of the second wiring layer.

Abstract: A wiring substrate includes an insulating layer that is an outermost layer of the wiring substrate and includes an external exposed surface, a pad forming part formed on a side of the external exposed surface, and a pad that projects from the external exposed surface. The pad forming part includes a recess part recessed from the external exposed surface, and a weir part that projects from the external exposed surface and encompasses the recess part from a plan view. The pad includes a pad body formed within the recess part and the weir part, and an eave part formed on the weir part. The pad body includes an end part that projects to the weir part. The eave part projects in a horizontal direction from the end part of the pad body. The end part of the pad body includes a flat surface.

Abstract: A method of manufacturing a wiring substrate includes forming a pair of core substrates, each including a cavity; applying a film that covers the cavity to each core substrates; adhering an electronic component to the film in the cavity of each of the core substrates; arranging a support between the core substrates and a first insulator between the support and the core substrates; stacking the core substrates, the support, and the first insulators so that the first insulators form first insulation layers on the first surfaces of the core substrates, the cavities are filled with the first insulators, and the first insulators fix the corresponding electronic components to the corresponding core substrates; removing the film from the core substrates; and separating the core substrates from the support to separate the core substrates from each other.

Abstract: A circuit board includes an insulating layer including first and second insulator films, a first wiring layer embedded in the first insulator film and including pads and first wiring patterns exposed from the first insulator film, and a second wiring layer including second wiring patterns formed on the second insulator film and via wirings penetrating the insulating layer and electrically connecting the second wiring patterns to the first wiring layer. The first insulator film is made of a reinforcement-free resin that includes no reinforcing member. The second insulator film is made of a reinforcing member impregnated with a resin.

Abstract: A wiring board includes a first wiring layer including a first conductive layer and a second conductive layer coating a first surface and a side surface of the first conductive layer. A first insulating layer covers a first surface and a side surface of the second conductive layer so as to expose a second surface of the first conductive layer opposite to the first surface of the first conductive layer. A second wiring layer is stacked on a first surface of the first insulating layer and is electrically connected to the first wiring layer. The first surface and the side surface of the first conductive layer are smooth surfaces while the first surface and the side surface of the second conductive layer are roughened-surfaces.

Abstract: A wiring substrate includes a core, a first wiring layer formed on a first surface of the core, a second wiring layer formed on a second surface of the core, and an electronic component partially accommodated in the cavity and including a projected portion projected from the first opening of the core. A first insulating layer covers a side surface of the electronic component and the first surface of the core and fills a portion of the cavity. A second insulating layer covers the first insulating layer. A third insulating layer covers the second surface of the core. The remainder of the cavity that is not filled with the first insulating layer is filled with the third insulating layer.

Abstract: A wiring substrate includes a core, a first wiring layer formed on a first surface of the core, and a second wiring layer formed on a second surface of the core. The first wiring layer includes a first opening, and the second wiring layer includes a second opening. The core includes a plurality of electronic component accommodating bores that extend through the core at portions exposed from the first and second openings. An electronic component is arranged in each electronic component accommodating bore. The electronic component accommodating bores are filled with an insulating layer. The core includes a partition located between adjacent electronic component accommodating bores. The partition is formed by part of the core.

Abstract: A wiring substrate includes an insulating layer, a first pad, and a solder resist layer. The first pad is embedded in the insulating layer. The solder resist layer is provided on an upper surface of the insulating layer. The solder resist layer is formed with an opening portion through which the recess portion is exposed. An adjacent portion of the solder resist layer adjacent to a peripheral portion of the opening portion covers a peripheral portion of the upper surface of the first pad and protrudes from the peripheral portion of the upper surface of the first pad toward the center portion of the first pad so as to cover above the recess portion. Surfaces of the first pad being in contact with the insulating layer are smaller in roughness than the upper surface of the insulating layer and the peripheral portion of the upper surface of the first pad.

Abstract: A wiring substrate includes a core, first and second wiring layers formed on opposite sides of the core, an electronic component arranged in a cavity of the core, and a first insulating layer that fills the cavity and covers the one surface of the core. The electronic component is partially buried in the first insulating layer and partially projected from the cavity and exposed from the first insulating layer. A second insulating layer covers the first insulating layer. A third insulating layer covers the core and the projected and exposed portion of the electronic component. The thickness of the third insulating layer where the first wiring layer is located is equal to the total thickness of the first insulating layer and the second insulating layer where the second wiring layer is located.

Abstract: A method of manufacturing a wiring substrate includes forming a pair of core substrates, each including a cavity; applying a film that covers the cavity to each core substrates; adhering an electronic component to the film in the cavity of each of the core substrates; arranging a support between the core substrates and a first insulator between the support and the core substrates; stacking the core substrates, the support, and the first insulators so that the first insulators form first insulation layers on the first surfaces of the core substrates, the cavities are filled with the first insulators, and the first insulators fix the corresponding electronic components to the corresponding core substrates; removing the film from the core substrates; and separating the core substrates from the support to separate the core substrates from each other.

Abstract: A wiring substrate includes an insulating layer, a first pad, and a solder resist layer. The first pad is embedded in the insulating layer. The solder resist layer is provided on an upper surface of the insulating layer. The solder resist layer is formed with an opening portion through which the recess portion is exposed. An adjacent portion of the solder resist layer adjacent to a peripheral portion of the opening portion covers a peripheral portion of the upper surface of the first pad and protrudes from the peripheral portion of the upper surface of the first pad toward the center portion of the first pad so as to cover above the recess portion. Surfaces of the first pad being in contact with the insulating layer are smaller in roughness than the upper surface of the insulating layer and the peripheral portion of the upper surface of the first pad.