Patents by Inventor Katsuya Okumura

Katsuya Okumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for dry-in, dry-out polishing and washing of a semiconductor device
    Publication number: 20060009130
    Abstract: A polishing apparatus includes an arrangement of a plurality of units to deal with various operations and a robot having at least one arm. The plurality of units are disposed around the robot and include a loading unit for receiving thereon a, e.g. dry, workpiece to be polished, a polishing system including at least one polishing unit for polishing the workpiece, a washing system and a drying system at least including one washing unit for washing and drying the polished workpiece, and an unloading unit for receiving thereon a resultant clean and dry polished workpiece.
    Type: Application
    Filed: September 9, 2005
    Publication date: January 12, 2006
    Inventors: Katsuya Okumura, Riichirou Aoki, Hiromi Yajima, Seiji Ishikawa, Manabu Tsujimura
  • Device for inspecting micro structure, method for inspecting micro structure and program for inspecting micro structure
    Publication number: 20050279170
    Abstract: Test sound wave is outputted from a speaker. A movable part of a three-axis acceleration sensor, which is a micro structure of a chip to be tested TP, moves due to the arrival of the test sound wave which is compression wave outputted from the speaker, that is, due to air vibrations. A change in the resistance value that changes in accordance with this movement is measured on the basis of an output voltage that is provided via a probe needles. A control part determines the property of the three-axis acceleration sensor on the basis of the measured property values, that is, measured data.
    Type: Application
    Filed: June 10, 2005
    Publication date: December 22, 2005
    Inventors: Katsuya Okumura, Toshiyuki Matsumoto, Naoki Ikeuchi, Masami Yakabe
  • Semiconductor device using damascene technique and manufacturing method therefor
    Patent number: 6977228
    Abstract: A gate insulation film is formed on a semiconductor substrate, gate electrodes are formed on the gate insulation film, and source/drain diffusion layers are formed. A silicon nitride films is formed on a side wall of the gate electrodes, a silicon oxide film is formed on the overall surface, and the silicon oxide film is etched back to have the same height as that of the gate electrodes so that the surface is flattened, and then the surface of the gate electrodes are etched by a predetermined thickness to form a first stepped portion from the silicon oxide film, the first stepped portion is filled up by a tungsten film, the surface of the tungsten film is etched by a predetermined thickness so that a second stepped portion is formed, and then the second stepped portion is filled by a silicon nitride films.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: December 20, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Kohyama, Nobuo Hayasaka, Katsuya Okumura
  • Plasma processing apparatus, electrode plate for plasma processing apparatus, and electrode plate manufacturing method
    Publication number: 20050276928
    Abstract: A plasma processing apparatus for performing a plasma process on a target substrate includes a process container configured to accommodate the target substrate and to reduce pressure therein. A first electrode is disposed within the process container. A supply system is configured to supply a process gas into the process container. An electric field formation system is configured to form an RF electric field within the process container so as to generate plasma of the process gas. A number of protrusions are discretely disposed on a main surface of the first electrode and protrude toward a space where the plasma is generated.
    Type: Application
    Filed: August 3, 2005
    Publication date: December 15, 2005
    Applicants: Octec Inc., TOKYO ELECTRON LIMITED
    Inventors: Katsuya Okumura, Shinji Himori, Kazuya Nagaseki, Hiroki Matsumaru, Shoichiro Matsuyama, Toshiki Takahashi
  • Polishing apparatus and method
    Publication number: 20050260933
    Abstract: A polishing apparatus and method has a function of polishing a surface of a film formed on a substrate to a flat mirror finish and a function of polishing unnecessary metal film such as copper film deposited on an outer peripheral portion of the substrate to remove such unnecessary metal film. The polishing apparatus comprises a surface polishing mechanism comprising a polishing table having a polishing surface and a top ring for holding the substrate and pressing the substrate against the polishing surface of the polishing table to thereby polish a surface of the substrate, and an outer periphery polishing mechanism for polishing an outer peripheral portion of the substrate.
    Type: Application
    Filed: July 25, 2005
    Publication date: November 24, 2005
    Inventors: Norio Kimura, Mitsuhiko Shirakashi, Katsuya Okumura, You Ishii, Junji Kunisawa, Hiroyuki Yano
  • Method and apparatus for dry-in, dry-out polishing and washing of a semiconductor device
    Patent number: 6966821
    Abstract: A polishing apparatus includes an arrangement of a plurality of units to deal with various operations and a robot having at least one arm. The plurality of units are disposed around the robot and include a loading unit for receiving thereon a, e.g. dry, workpiece to be polished, a polishing system including at least one polishing unit for polishing the workpiece, a washing system and a drying system at least including one washing unit for washing and drying the polished workpiece, and an unloading unit for receiving thereon a resultant clean and dry polished workpiece.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: November 22, 2005
    Assignees: Kabushiki Kaisha Toshiba, Ebara Corporation
    Inventors: Katsuya Okumura, Riichirou Aoki, Hiromi Yajima, Seiji Ishikawa, Manabu Tsujimura
  • Method for manufacturing semiconductor device and polishing apparatus
    Publication number: 20050250423
    Abstract: In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
    Type: Application
    Filed: July 12, 2005
    Publication date: November 10, 2005
    Inventors: Kenro Nakamura, Naoto Miyashita, Takashi Yoda, Katsuya Okumura
  • Apparatus and method for inspecting pattern on object
    Publication number: 20050244049
    Abstract: In a pattern inspection apparatus (1), an electron beam emission part (31) emits an electron beam onto a substrate (9) and an image acquisition part (33) detects electrons from the substrate (9) to acquire a grayscale inspection image of the substrate (9). A binary reference image generated from design data (81) is multivalued by a grayscale image generator (52) on the basis of a histogram of pixel values in the inspection image to generate a grayscale reference image. A comparator (53) compares the inspection image with the reference image. The pattern inspection apparatus (1) can thereby perform an inspection of a very small pattern on the substrate (9) on the basis of the design data (81).
    Type: Application
    Filed: April 4, 2005
    Publication date: November 3, 2005
    Inventors: Hiroyuki Onishi, Yasushi Sasa, Manabu Tsujimura, Toshifumi Kinba, Katsuya Okumura
  • Film formation method, semiconductor element and method thereof, and method of manufacturing a disk-shaped storage medium
    Patent number: 6960540
    Abstract: Relative movement occurs between the in-process substrate and the dropping section. While the substrate is rotated, the dropping section is relatively moved from an approximate center of the substrate toward an outer periphery thereof. While the dropping section relatively moves from the approximate center of the in-process substrate toward the outer periphery, the rotational frequency w for the substrate is decreased so that the solution film should not move due to the centrifugal force applied to a dropped solution film. Concurrently, feed rate v for the liquid from the dropping section is increased to form a solution film on the in-process substrate.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: November 1, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Ito, Katsuya Okumura
  • Plating method
    Publication number: 20050211560
    Abstract: A cathode potential is applied to a conductive layer formed on a substrate having a depression pattern. A plating solution in electrical contact with an anode is supplied to the conductive layer to form a plating film on the conductive layer. At this time, the plating solution is supplied by causing an impregnated member containing the plating solution to face the conductive layer. Since the plating solution stays in the depression, a larger amount of plating solution is supplied than on the upper surface of the substrate, and the plating rate of the plating film in the depression increases. Consequently, the plating film can be preferentially formed in the depression such as a groove or hole.
    Type: Application
    Filed: May 24, 2005
    Publication date: September 29, 2005
    Inventors: Tetsuo Matsuda, Hisashi Kaneko, Katsuya Okumura
  • Semiconductor device and method for manufacturing the same
    Patent number: 6946387
    Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: September 20, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junichi Wada, Atsuko Sakata, Tomio Katata, Takamasa Usui, Masahiko Hasunuma, Hideki Shibata, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura
  • Pattern forming method
    Patent number: 6941008
    Abstract: To achieve down-sizing and improvements of throughputs, light exposure and charge beam exposure are sometimes used together. In case of performing exposure of a desired pattern in a plurality of stages, a positional displacement of each of exposure patterns in the stages leads to a decrease in exposure accuracy. According to the present invention, in case of forming a fine pattern by exposure after exposure of a rough pattern, the exposure position of the rough pattern is adjusted, based on a latent image of the rough pattern which has been subjected to exposure. As a result, a positional-displacement between rough and fine patterns is reduced so that a desired pattern can be formed with high accuracy.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: September 6, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Ando, Kazuyoshi Sugihara, Katsuya Okumura, Tetsuro Nakasugi
  • Polishing apparatus and method
    Patent number: 6935932
    Abstract: A polishing apparatus and method has a function of polishing a surface of a film formed on a substrate to a flat mirror finish and a function of polishing unnecessary metal film such as copper film deposited on an outer peripheral portion of the substrate to remove such unnecessary metal film. The polishing apparatus comprises a surface polishing mechanism comprising a polishing table having a polishing surface and a top ring for holding the substrate and pressing the substrate against the polishing surface of the polishing table to thereby polish a surface of the substrate, and an outer periphery polishing mechanism for polishing an outer peripheral portion of the substrate.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: August 30, 2005
    Assignees: Ebara Corporation, Kabushiki Kaisha Toshiba
    Inventors: Norio Kimura, Mitsuhiko Shirakashi, Katsuya Okumura, You Ishii, Junji Kunisawa, Hiroyuki Yano
  • Method for manufacturing semiconductor device and polishing apparatus
    Patent number: 6933234
    Abstract: In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: August 23, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenro Nakamura, Naoto Miyashita, Takashi Yoda, Katsuya Okumura
  • Integrated circuit device and method of manufacturing the same
    Patent number: 6933205
    Abstract: The present invention provides an integrated circuit, comprising a semiconductor substrate, an active element formed on the side of one main surface of the semiconductor substrate, an insulating region formed on the side of the main surface of the semiconductor substrate by burying an insulating material in a groove having a depth of at least 20 ?m, and a passive element formed directly or indirectly on the insulating region. It is desirable for the passive element to be an inductor.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: August 23, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mie Matsuo, Nobuo Hayasaka, Noriaki Matsunaga, Katsuya Okumura
  • Fine particle film forming apparatus and method and semiconductor device and manufacturing method for the same
    Patent number: 6933216
    Abstract: After a barrier film is formed on a pad electrode, Ni particles having a diameter of 2 ?m or less are selectively deposited on the barrier film, thereby forming a Ni fine particle film. Then, a bump electrode made of a solder ball is provided on the pad electrode through the Ni fine particle film. Thereafter, the bump electrode is melted by a heat treatment to join the Ni fine particle film to the bump electrode. Thus, a bump electrode structure is finished.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: August 23, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Sakata, Keiichi Sasaki, Nobuo Hayasaka, Katsuya Okumura, Hirotaka Nishino
  • Electronic optical lens barrel and production method therefor
    Publication number: 20050173649
    Abstract: The present invention provides an electron optical lens column suitable for miniaturization, and provides the manufacturing method thereof. The column unit (1) comprises an inner column (11) and an outer column (12). The column unit is, as a whole, structured from a high-resistance electrically conductive ceramic. Electrostatic lenses (21, 22, 23, and 24) are affixed to the inner surface (111) of the inner column using a means such as plating or vapor deposition. Of the electrodes or electrode parts (211-213, 221, 231, 232, and 241-243) from which the lens is structured, those that share the same electric potential are connected by shared interconnections. This makes it possible to connect all of the electrodes or electrode parts with shared electric potentials as a group to the external interconnections.
    Type: Application
    Filed: June 10, 2003
    Publication date: August 11, 2005
    Inventors: Katsuya Okumura, Motosuke Miyoshi
  • Manufacturing method of semiconductor device
    Patent number: 6924236
    Abstract: The present invention provides a method of manufacturing a semiconductor device, comprising the step of selectively grinding or polishing the peripheral portion and the beveled portion of a target substrate including a semiconductor substrate. The grinding or polishing of the target substrate is performed after the dry etching step for forming a trench in the target substrate, or after the depositing step of a copper layer providing a source of contamination of the process apparatus in forming a Cu-buried wiring. By grinding or polishing the peripheral portion and the beveled portion of the target substrate, the uneven portion in the peripheral portion and the beveled portion can be removed and copper is prevented from being exposed to the outside, thereby avoiding the particle generation and contamination of the process apparatus.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Yano, Katsuya Okumura
  • Probe method, prober, and electrode reducing/plasma-etching processing mechanism
    Publication number: 20050151549
    Abstract: A probe method of this invention includes a step of reducing an electrode of a wafer by using a forming gas, and a step of bringing the electrode and a probe pin into contact with each other in a dry atmosphere. The probe method further includes, prior to a reducing process of an electrode of the object to be tested, placing the object to be tested in an inert gas atmosphere and heating the object to be tested. The reducing process is performed by bringing a reducing gas into contact with the electrode of the object to be tested under atmospheric pressure.
    Type: Application
    Filed: March 2, 2005
    Publication date: July 14, 2005
    Inventors: Katsuya Okumura, Shigekazu Komatsu, Yuichi Abe, Kunihiro Furuya, Vincent Vezin, Kenichi Kubo
  • Polishing apparatus
    Patent number: 6913513
    Abstract: A polishing apparatus comprises a polishing table having a polishing surface, a top ring for holding a substrate and pressing a surface of the substrate against the polishing surface to polish the surface of the substrate, and at least one optical measuring device disposed adjacent to the outer peripheral portion of the polishing table and below the polishing surface of the polishing table for measuring the thickness of a layer formed on the surface of the substrate. The polishing apparatus further comprises at least one notch formed in the peripheral portion of the polishing table. The notch allows light emitted from the optical measuring device to pass therethrough and be incident on the surface of the substrate and allows light reflected from the surface of the substrate to pass therethrough and be incident on the optical measuring device.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: July 5, 2005
    Assignees: Ebara Corporation, Kabushiki Kaisha Toshiba
    Inventors: Norio Kimura, Katsuya Okumura, Hiroyuki Yano