Patents by Inventor Katsuya Tanaka

Katsuya Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10402361
    Abstract: Efficient communication between storage controllers can be performed. A storage system includes one or more backend switches that connect a first processor, a second processor, and one or more storage devices to each other. Each backend switch identifies a destination of a frame by referring to the frame received from the first processor. In a case where the destination of the frame is the second processor, each backend switch translates a first address, included in the frame, for specifying a location on the second memory in an address space of the first processor, into a second address for specifying the location on the second memory in an address space of the second processor, and transfers the frame including the second address to the second storage controller.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: September 3, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Kentaro Shimada, Akira Yamamoto, Sadahiro Sugimoto
  • Patent number: 10229062
    Abstract: A storage system includes a plurality of controllers each including a processor module and a memory, and a relay unit to relay a communication between the processor modules. The relay unit executes assignment determination to determine one of the processor module of a first controller and the processor module of a second controller is a processor module processing a command stored in the memory. The first controller includes memory storing the command, and the second controller is any of the controllers other than the first controller. When the relay unit determines the command of the processor module of the first controller, the relay unit notifies storage location information of the command to the processor module of the first controller, and when the relay unit determines the command to be processed by the processor module of the second controller, the relay unit transfer the command to the second controller.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: March 12, 2019
    Assignee: HITACHI, LTD.
    Inventors: Makio Mizuno, Norio Shimozono, Katsuya Tanaka
  • Publication number: 20180314666
    Abstract: Efficient communication between storage controllers can be performed. A storage system includes one or more backend switches that connect a first processor, a second processor, and one or more storage devices to each other. Each backend switch identifies a destination of a frame by referring to the frame received from the first processor. In a case where the destination of the frame is the second processor, each backend switch translates a first address, included in the frame, for specifying a location on the second memory in an address space of the first processor, into a second address for specifying the location on the second memory in an address space of the second processor, and transfers the frame including the second address to the second storage controller.
    Type: Application
    Filed: April 23, 2018
    Publication date: November 1, 2018
    Inventors: Katsuya TANAKA, Kentaro SHIMADA, Akira YAMAMOTO, Sadahiro SUGIMOTO
  • Patent number: 10090921
    Abstract: A light modulation device detects a power of the modulated optical signal modulated by each of an I-component optical modulator and a Q-component optical modulator, synchronously-detects a component of a frequency fd from the power of the modulated optical signal, outputs a dither signal of a frequency fd/n (where n is a positive integer equal to or larger than 1) applied to a first bias voltage or a second bias voltage when adjusting the first bias voltage or the second bias voltage, outputs two dither signals having a frequency fd/m (where m is a positive integer equal to or larger than 1, where n<m), which are mutually orthogonal to each other, applied to the first and second bias voltages when adjusting a third bias voltage, and adjusting bias voltages by increasing or decreasing bias voltages based on a synchronous detection result.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: October 2, 2018
    Assignees: Nippon Telegraph And Telephone Corporation, NTT Electronics Corporation
    Inventors: Mikio Yoneyama, Hiroto Kawakami, Takashi Ono, Akihiko Matsuura, Tomoyoshi Kataoka, Katsuya Tanaka, Masahiro Tachibana, Yuya Oyama
  • Publication number: 20180011763
    Abstract: A storage device according to an embodiment of the present invention has a plurality of storage nodes, each of which has a plurality of logical ports having send and receive queues for a communication request and an identification number, and an internal network for connecting the plurality of storage nodes with one another. The storage nodes each have, as the logical ports, a data communication logical port used for data communication with other storage nodes and an error communication logical port used to notify the other storage nodes of a state of the data communication logical port. When detecting an occurrence of transition of the data communication logical port to an error state, the storage node uses the error communication logical port to notify the other storage nodes of the identification number and the state of the data communication logical port.
    Type: Application
    Filed: February 26, 2015
    Publication date: January 11, 2018
    Inventors: Katsuya TANAKA, Makio MIZUNO
  • Patent number: 9703744
    Abstract: In a storage subsystem adopting HDD and PCIe-SSD as storage media, as a method for preventing the complication of having to select a removal method while considering the drive type inserted to the drive slot since the method for removing the HDD differs from the method for removing the PCIe-SSD according to the prior art, the present invention provides an LED for displaying whether it is possible to remove the HDD or the PCIe-SSD inserted to the slot of a drive enclosure, wherein when an HDD is inserted in the drive slot, the LED displays that removal of the HDD is enabled when power supply to the HDD is stopped, and when PCIe-SSD is inserted to the drive slot, the LED displays that removal of the SSD is enabled when Downstream Port Containment (DPC) is triggered in the downstream port of the PCIe switch to which the SSD is connected.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: July 11, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Masanori Takada, Naoya Okada
  • Publication number: 20170177485
    Abstract: A storage system includes a plurality of controllers each including a processor module and a memory, and a relay unit to relay a communication between the processor modules. The relay unit executes assignment determination to determine one of the processor module of a first controller and the processor module of a second controller is a processor module processing a command stored in the memory. The first controller includes memory storing the command, and the second controller is any of the controllers other than the first controller. When the relay unit determines the command of the processor module of the first controller, the relay unit notifies storage location information of the command to the processor module of the first controller, and when the relay unit determines the command to be processed by the processor module of the second controller, the relay unit transfer the command to the second controller.
    Type: Application
    Filed: July 11, 2014
    Publication date: June 22, 2017
    Applicant: HITACHI, LTD.
    Inventors: Makio MIZUNO, Norio SHIMOZONO, Katsuya TANAKA
  • Publication number: 20170117961
    Abstract: A light modulation device detects a power of the modulated optical signal modulated by each of an I-component optical modulator and a Q-component optical modulator, synchronously-detects a component of a frequency fd from the power of the modulated optical signal, outputs a dither signal of a frequency fd/n (where n is a positive integer equal to or larger than 1) applied to a first bias voltage or a second bias voltage when adjusting the first bias voltage or the second bias voltage, outputs two dither signals having a frequency fd/m (where m is a positive integer equal to or larger than 1, where n<m), which are mutually orthogonal to each other, applied to the first and second bias voltages when adjusting a third bias voltage, and adjusting bias voltages by increasing or decreasing bias voltages based on a synchronous detection result.
    Type: Application
    Filed: April 10, 2015
    Publication date: April 27, 2017
    Applicants: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, NTT Electronics Corporation
    Inventors: Mikio YONEYAMA, Hiroto KAWAKAMI, Takashi ONO, Akihiko MATSUURA, Tomoyoshi KATAOKA, Katsuya TANAKA, Masahiro TACHIBANA, Yuya OYAMA
  • Patent number: 9575919
    Abstract: In a storage device applying PCIe to a back-end network connection, in order to be capable of allocating bus numbers and making a PCIe switch expanded afterwards usable, it is necessary to once reset all PCIe switches. To dissolve this necessity, PCIe switches of the back-end network of the storage device are connected in series, a range of continuous bus numbers that are managed and stored in bus number management table is allocated for the back-end network connection, and when expanding the PCIe switch, the bus numbers are allocated in ascending order from a minimum value of the allocatable bus numbers to each of a link between the PCIe switches and to a virtual PCI bus within the PCIe switch, and the bus numbers are allocated in descending order from a maximum value of the allocatable bus numbers to the link between the PCIe switch and a drive.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: February 21, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Hirotoshi Akaike, Katsuya Tanaka, Makio Mizuno
  • Publication number: 20160117281
    Abstract: In a storage device applying PCIe to a back-end network connection, in order to be capable of allocating bus numbers and making a PCIe switch expanded afterwards usable, it is necessary to once reset all PCIe switches. To dissolve this necessity, PCIe switches of the back-end network of the storage device are connected in series, a range of continuous bus numbers that are managed and stored in bus number management table is allocated for the back-end network connection, and when expanding the PCIe switch, the bus numbers are allocated in ascending order from a minimum value of the allocatable bus numbers to each of a link between the PCIe switches and to a virtual PCI bus within the PCIe switch, and the bus numbers are allocated in descending order from a maximum value of the allocatable bus numbers to the link between the PCIe switch and a drive.
    Type: Application
    Filed: September 25, 2013
    Publication date: April 28, 2016
    Inventors: Hirotoshi AKAIKE, Katsuya TANAKA, Makio MIZUNO
  • Patent number: 9286210
    Abstract: A system including flash memory modules and a system controller. Each flash memory module includes flash memory chips and a memory controller to manage a plurality of blocks in the plurality of flash memory chips. The blocks are units for erasing data stored in the flash memory chips. The system controller performs wear leveling by exchanging data between a first flash memory module and a second flash memory module of the flash memory modules.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: March 15, 2016
    Assignee: HITACHI, LTD.
    Inventors: Katsuya Tanaka, Kentaro Shimada
  • Patent number: 9253257
    Abstract: The present invention provides a storage subsystem capable of realizing a backend network enabling SSDs arranged in a small number of rows to be shared among controllers, and capable of having a large number of HDDs loaded thereto, according to which the performance of the storage is enhanced. In a topology of the backend network, the respective controllers 102 and 152 and the enclosure expanders are respectively connected via top expanders 110 and 160, the top expanders 110 and 160 are connected via a central expander 140, expanders 119, 120 and 121 for connecting SSDs to the top expander 110 are mutually connected in parallel, expanders 169, 170 and 171 for connecting SSDs to the top expander 160 are mutually connected in parallel, expanders 122, 123 and 124 for connecting HDDs to the top expander 110 are connected in series, and expanders 172, 173 and 174 for connecting HDDs to the top expander 160 are connected in series.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: February 2, 2016
    Assignee: HITACHI, LTD.
    Inventors: Hirotoshi Akaike, Katsuya Tanaka, Makio Mizuno, Akira Yamamoto
  • Publication number: 20150350322
    Abstract: The present invention provides a storage subsystem capable of realizing a backend network enabling SSDs arranged in a small number of rows to be shared among controllers, and capable of having a large number of HDDs loaded thereto, according to which the performance of the storage is enhanced. In a topology of the backend network, the respective controllers 102 and 152 and the enclosure expanders are respectively connected via top expanders 110 and 160, the top expanders 110 and 160 are connected via a central expander 140, expanders 119, 120 and 121 for connecting SSDs to the top expander 110 are mutually connected in parallel, expanders 169, 170 and 171 for connecting SSDs to the top expander 160 are mutually connected in parallel, expanders 122, 123 and 124 for connecting HDDs to the top expander 110 are connected in series, and expanders 172, 173 and 174 for connecting HDDs to the top expander 160 are connected in series.
    Type: Application
    Filed: March 11, 2014
    Publication date: December 3, 2015
    Applicant: HITACHI, LTD.
    Inventors: Hirotoshi AKAIKE, Katsuya TANAKA, Makio MIZUNO, Akira YAMAMOTO
  • Publication number: 20150317272
    Abstract: In a storage subsystem adopting HDD and PCIe-SSD as storage media, as a method for preventing the complication of having to select a removal method while considering the drive type inserted to the drive slot since the method for removing the HDD differs from the method for removing the PCIe-SSD according to the prior art, the present invention provides an LED for displaying whether it is possible to remove the HDD or the PCIe-SSD inserted to the slot of a drive enclosure, wherein when an HDD is inserted in the drive slot, the LED displays that removal of the HDD is enabled when power supply to the HDD is stopped, and when PCIe-SSD is inserted to the drive slot, the LED displays that removal of the SSD is enabled when Downstream Port Containment (DPC) is triggered in the downstream port of the PCIe switch to which the SSD is connected.
    Type: Application
    Filed: January 23, 2013
    Publication date: November 5, 2015
    Inventors: Katsuya TANAKA, Masanori TAKADA, Naoya OKADA
  • Patent number: 9015111
    Abstract: Data transfer between storage apparatuses is reduced, and performance of data access of a storage system is improved. In a case where a processor of a first storage apparatus receives a write request from a host computer as a request for data access to a virtual volume and a cache memory of any of the storage apparatuses is not allocated to a virtual storage area in the virtual volume designated by the data access request, the processor of the first storage apparatus selects a second storage apparatus and a third storage apparatus among candidates satisfying a predetermined state condition among the storage apparatuses based on connection information indicating connection between the storage apparatuses through a communication line.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: April 21, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Hirotoshi Akaike, Kazuhisa Fujimoto, Kohei Tatara, Katsuya Tanaka, Makio Mizuno
  • Publication number: 20150067204
    Abstract: For a printing system, a printing device and an information terminal are connected by communication. The printing device includes a wired communication unit configured to communicate by USB, a connection confirmation unit configured to confirm the connection to the information terminal, and a boot application determination unit configured to notify the information terminal of the application to be booted at the information terminal. The information terminal includes a wired communication unit configured to communicate by USB, a wireless communication unit configured to communicate with a server, an application existence determination unit configured to determine installation, a download site determination unit configured to determine a server, an install unit configured to acquire the application from the server and install, and an application boot unit configured to boot the application.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 5, 2015
    Inventors: Naoki HORIE, Shoji HOSHINA, Katsuya TANAKA, Shinichiro FUJITA
  • Publication number: 20150052176
    Abstract: Data transfer between storage apparatuses is reduced, and performance of data access of a storage system is improved. In a case where a processor of a first storage apparatus receives a write request from a host computer as a request for data access to a virtual volume and a cache memory of any of the storage apparatuses is not allocated to a virtual storage area in the virtual volume designated by the data access request, the processor of the first storage apparatus selects a second storage apparatus and a third storage apparatus among candidates satisfying a predetermined state condition among the storage apparatuses based on connection information indicating connection between the storage apparatuses through a communication line.
    Type: Application
    Filed: April 5, 2013
    Publication date: February 19, 2015
    Inventors: Hirotoshi Akaike, Kazuhisa Fujimoto, Kohei Tatara, Katsuya Tanaka, Makio Mizuno
  • Patent number: 8899374
    Abstract: A speaker unit mounting structure includes a provisionally fastening mechanism for fastening a speaker unit to a ceiling with a cabinet section of the speaker unit inserted in a mounting hole of the ceiling. The provisionally fastening mechanism includes a provisionally fastening tab formed of resilient metal, fixed to the outer peripheral side surface of the cabinet section and having a stepped engaging section engageable with the inner peripheral edge portion of the mounting hole. Engagement of the engaging section with the inner peripheral edge portion of the mounting hole can be canceled by a human operator pressing, from the face side of the ceiling, an operating section of the tab, exposed to a gap between the front side and a flange portion of the speaker unit, to thereby resiliently deform the operating section.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: December 2, 2014
    Assignee: Yamaha Corporation
    Inventors: Katsuya Tanaka, Kotaro Mizuno
  • Publication number: 20140325127
    Abstract: A storage system using flash memories includes a storage controller and plural flash memory modules as storage media. Each flash memory module includes at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip. The storage controller combines the plural flash memory modules into a first logical group, translates a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and combines the plural first logical groups into a second logical group.
    Type: Application
    Filed: July 8, 2014
    Publication date: October 30, 2014
    Inventors: Katsuya Tanaka, Kentaro Shimada
  • Patent number: 8788745
    Abstract: A storage system using flash memories includes a storage controller and plural flash memory modules as storage media. Each flash memory module includes at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip. The storage controller combines the plural flash memory modules into a first logical group, translates a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and combines the plural first logical groups into a second logical group.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: July 22, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Kentaro Shimada