Abstract: First, a low-concentration impurity layer is formed by obliquely implanting an n-type impurity at a prescribed angle with respect to the surface of a p-type semiconductor substrate, using a gate electrode formed on the semiconductor substrate as a mask. Thereafter a sidewall spacer is formed on the sidewall of the gate electrode, and then a medium-concentration impurity layer is formed by obliquely implanting an n-type impurity to the surface of the semiconductor substrate. Thereafter a high-concentration impurity layer is formed by substantially perpendicularly implanting an n-type impurity with respect to the surface of the semiconductor substrate. According to this method, the low-concentration impurity layer in source and drain regions having triple diffusion structures can be accurately overlapped with the gate electrode, with no requirement for heat treatment for thermal diffusion.

Abstract: A MOS FET comprises a pair of source and drain impurity regions, a gate oxide film and a gate electrode. The source and drain regions have an LDD structure in which high concentration impurity regions and low concentration impurity regions are set off. The gate electrode is formed to extend over the channel region and contains sidewalls overlying the low concentration impurity regions. In addition, portions of the gate oxide film located between the sidewalls of the gate electrode and the respective low concentration impurity regions are formed to have a film thickness larger than that of the portion located between the gate electrode and the channel region. The thick portion of the oxide film underlying the gate sidewalls form a charge storage layer which reduces the resistance of the low impurity concentration region while minimizing the gate capacitance. In another example, conductive sidewall spacers are formed on sidewalls of a gate electrode through an insulating film.

Abstract: In an MIS transistor of a type having LDD and salicide structures, the location of the boundary between the high and low impurity density source/drain regions and the positions of the salicide layers on the source/drain regions are independently controlled during fabrication using a double gate sidewall structure. An MIS transistor improved thereby has its boundary between the high and low impurity density source/drain regions at or displaced toward the control gate electrode with respect to the interface of the double gate sidewall structure.

Abstract: A method of and an apparatus for removing a naturally grown oxide film and contaminants on the surface of a semiconductor substrate and then forming a thin film on the cleaned surface. The semiconductor substrate is placed in a pretreatment chamber and then hydrogen chloride gas is introduced into the chamber. Then, the semiconductor substrate is heated at a temperature between 200.degree..about.700.degree. C. and the surface of the semiconductor substrate is irradiated with ultraviolet rays, whereby the naturally grown oxide film and other contaminants on the semiconductor substrate can be removed. Then, a thin film is formed on the cleaned surface of the semiconductor substrate by a CVD method or a sputter method. According to this method, the naturally oxide film and other contaminants can be removed from the surface of the semiconductor substrate at a low temperature and the thin film can be formed on the cleaned surface.

Abstract: A MOS FET comprises a pair of source and drain impurity regions, a gate oxide film and a gate electrode. The source and drain regions have an LDD structure in which high concentration impurity regions and low concentration impurity regions are set off. The gate electrode is formed to extend over the channel region and contains sidewalls overlying the low concentration impurity regions. In addition, portions of the gate oxide film located between the sidewalls of the gate electrode and the respective low concentration impurity regions are formed to have a film thickness larger than that of the portion located between the gate electrode and the channel region. The thick portion of the oxide film underlying the gate sidewalls form a charge storage layer which reduces the resistance of the low impurity concentration region while minimizing the gate capacitance. In another example, conductive sidewall spacers are formed on sidewalls of a gate electrode through an insulating film.

Abstract: In an MIS transistor of a type having LDD and salicide structures, the location of the boundary between the high and low impurity density source/drain regions and the positions of the salicide layers on the source/drain regions are independently controlled during fabrication using a double gate sidewall structure. An MIS transistor improved thereby has its boundary between the high and low impurity density source/drain regions at or displaced toward the control gate electrode with respect to the interface of the double gate sidewall structure.

Abstract: A conductive resist film is used as a mask in ion implantation. A portion of the conductive resist film is electrically connected to a semiconductor substrate. The charge of ions which enter the conductive resist film in ion implantation flows into the semiconductor substrate and dissipates therein.