Patents by Inventor Katsuyoshi Yamamoto

Katsuyoshi Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7593047
    Abstract: The present invention is an image sensor having a pixel array, which arranges pixels having photoelectric conversion circuits in rows and columns; and a pixel selecting circuit for selecting each pixel, wherein the pixel selecting circuit selects pixels of all rows and/or pixels of all columns, and selects a pixel signal at every plural pixels among the selected pixel signals, and pixels selected from a pixel block of a plurality of rows and columns within the pixel array are dispersed within this pixel block.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: September 22, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto
  • Patent number: 7522199
    Abstract: An imaging device provided with a read circuit in which a light-shielding region is formed in a part of an image region where a plurality of optical/electrical conversion devices is two-dimensionally arrayed in the row and column directions and which converts a optically detected signal outputted from each of the optical/electrical conversion devices for each of the column into a digital signal, comprises a storage device for storing the outputted digital signal outputted in relation with the optical/electrical conversion device in the light-shielding region and a difference calculation device for calculating a difference between the outputted digital signal in relation with the optical/electrical conversion device in a light-receiving region except the light-shielding region and a value stored in the storage device.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: April 21, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto, Asao Kokubo, Toshitaka Mizuguchi, Tsuyoshi Higuchi
  • Patent number: 7477299
    Abstract: A second source follower circuit of a reference voltage generator includes a transistor having the same characteristics as a first source follower circuit of a pixel. Accordingly, the second source follower circuit can generate a second reference voltage according to the change in characteristics of the first source follower circuit. A noise voltage switching circuit outputs a first voltage as a noise voltage to a pixel signal generator when the noise voltage is equal to or lower than the second reference voltage. In a reset state, the noise voltage and the second reference voltage always have a predetermined voltage difference. Therefore, deterioration in image quality can be prevented even when capturing a subject having high brightness. Since a trimming circuit or the like selecting any one of a plurality of reference voltages according to characteristics of a formed transistor becomes unnecessary, the cost of an imaging device can be reduced.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: January 13, 2009
    Assignee: Fujitsu Limited
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Publication number: 20090009822
    Abstract: A solid-state image pickup device and image pickup method eliminate a dark-current component by adjusting the black level appropriately even if the dark-current component varies among horizontal lines. A pixel array includes light-receiving pixel elements and light-blocking pixel elements disposed such that horizontal lines include the light-blocking pixel elements individually. A readout circuit block reads pixel signals of each of the horizontal lines from the pixel array, inputs the pixel signals to ADC circuits (column ADC circuit block), and outputs the pixel signals of the light-blocking pixel elements. A ramp signal generation circuit obtains the pixel signals of the light-blocking pixel elements output from the readout circuit block, generates a ramp signal by using a reference level of AD conversion adjusted for each of the horizontal lines in accordance with the obtained pixel signals of the light-blocking pixel elements, and inputs the ramp signal to the ADC circuits.
    Type: Application
    Filed: September 16, 2008
    Publication date: January 8, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Toshitaka MIZUGUCHI, Katsuyoshi Yamamoto, Jun Funakoshi, Tsuyoshi Higuchi
  • Publication number: 20080281564
    Abstract: An automated system and method for predicting a future resource utilization tendency by analyzing a change in resource usage on the basis of a real operation condition in a computer system. A CPU utilization estimating unit acquires a resource log and a transaction log, and estimates utilization for each transaction, and information on the number of executions for each transaction, a processing amount predicting unit performs a statistical time-series analysis on the basis of time-series data of the number of executions for each transaction included in the transaction log and predicts an amount of processing for each type of a transaction, and a resource utilization predicting unit predicts the computer resource utilization or demand on from the estimated resource utilization for each transaction and the future predicted amount of processing for each transaction.
    Type: Application
    Filed: May 16, 2008
    Publication date: November 13, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yasuhiro Suzuki, Katsuyoshi Yamamoto, Naoya Yamamoto
  • Patent number: 7417273
    Abstract: An image sensor in which a plurality of pixels having at least a photodiode, a reset transistor, and source follower transistor are formed, wherein each pixel comprises an electrical-charge transfer gate transistor between the photodiode and reset transistor, and a floating diffusion region constituting a node connecting the reset transistor and transfer gate transistor is connected to the gate of the source follower transistor. Further, a photodiode region is embedded below a well region in which the reset transistor and source follower transistor of each pixel are formed. In addition, the photo diode region is not formed below at least a partial region of the floating diffusion region.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: August 26, 2008
    Assignee: Fujitsu Limited
    Inventors: Tadao Inoue, Katsuyoshi Yamamoto, Narumi Ohkawa
  • Patent number: 7415453
    Abstract: An automated system and method for predicting a future resource utilization tendency by analyzing a change in resource usage on the basis of a real operation condition in a computer system. A CPU utilization estimating unit acquires a resource log and a transaction log, and estimates utilization for each transaction, and information on the number of executions for each transaction, a processing amount predicting unit performs a statistical time-series analysis on the basis of time-series data of the number of executions for each transaction included in the transaction log and predicts an amount of processing for each type of a transaction, and a resource utilization predicting unit predicts the computer resource utilization or demand on from the estimated resource utilization for each transaction and the future predicted amount of processing for each transaction.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: August 19, 2008
    Assignee: International Business Machines Corporation
    Inventors: Yasuhiro Suzuki, Katsuyoshi Yamamoto, Naoya Yamamoto
  • Patent number: 7369170
    Abstract: A method for controlling a solid-state imaging apparatus, which includes a plurality of pixels, includes selecting a resetting element of one of the pixels, resetting a detecting unit connected to the pixel, transmitting to a detecting unit, an electric charge accumulated after photoelectric conversion performed by a photoelectric converting element of the pixel, and providing control to set a second end of a transmitting control signal line to an open state.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: May 6, 2008
    Assignee: Fujitsu Limited
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Publication number: 20080077657
    Abstract: To provide transaction processing for continuing processing without returning an error to a requestor and to make a system flexible by programmably configuring rollback and reprocessing, a system includes a request proxy device for transferring a request sent from a requestor terminal to a first server, a request information management device for receiving terminal request information from the request proxy device and storing the terminal request information, and a connection proxy device for relaying a processing request sent from the first server to a backend server or another external device to manage connection information. The request proxy device detects a server failure, reads out the terminal request information from the request information management device, and sends the terminal request information to second servers.
    Type: Application
    Filed: July 12, 2007
    Publication date: March 27, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Masatoshi Tagami, Katsuyoshi Yamamoto
  • Publication number: 20080029788
    Abstract: First diffusion region constituting a photodiode in each pixel stores carriers generated according to incident light. Second diffusion region is formed at a surface of the first diffusion region to cover a peripheral part of the first diffusion region. In the peripheral part of the first diffusion region, crystal defects tend to occur by a process of forming an isolation region and a gate electrode, so that dark current noise tends to occur. The second diffusion region functioning as a protection layer prevents crystal defects in a manufacturing process. The second diffusion region isn't formed on a center of the surface of the first diffusion region where crystal defects don't tend to occur. In the first diffusion region where the second diffusion region isn't formed, the thickness of a depletion layer increases, which improves light detection sensitivity. This improves detection sensitivity of the photodiode without increasing the dark current noise.
    Type: Application
    Filed: September 26, 2007
    Publication date: February 7, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Tadao INOUE, Katsuyoshi YAMAMOTO, Hiroshi KOBAYASHI
  • Publication number: 20080002043
    Abstract: A solid-state image pickup apparatus comprises a pixel unit consisting of a plurality of pixels; a pixel control unit for controlling the plurality of pixels; a readout unit for reading a signal of each pixel output from the pixel unit; a shutter unit for establishing a state of a light incident to the pixel unit and that of shielding the pixel unit from the light; and a control unit, comprising an exposure mode changeover unit for changing over an exposure mode to either a first exposure mode performing a simultaneous exposure for all pixels or a second exposure mode performing an exposure for each of a predetermined unit of pixels, for controlling the pixel control unit, readout unit and shutter unit according to an exposure mode changed over by the exposure mode changeover unit.
    Type: Application
    Filed: October 11, 2006
    Publication date: January 3, 2008
    Inventors: Tadao Inoue, Katsuyoshi Yamamoto
  • Publication number: 20080001192
    Abstract: A CMOS image sensor with an effectively increased aperture ratio and moreover with improved optical sensitivity, and a method of manufacture of such a CMOS image sensor is provided a first aspect of the invention is an image sensor, has a pixel region 10 in which are formed a plurality of pixels each having at least a photodiode, a reset transistor, and a source-follower transistor; and a peripheral circuit region 12 in which are formed peripheral circuits which process read-out signals read out from the pixel region, a well region PW2 in the pixel region PW1 is formed to be more shallow than a well region in the peripheral circuit region. Also, reset transistors or source-follower transistors are formed in the shallow well region PW2 of the pixel region 10, and a photodiode region PHD2 is embedded below the transistor well region PW2.
    Type: Application
    Filed: September 10, 2007
    Publication date: January 3, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Tadao INOUE, Katsuyoshi YAMAMOTO, Narumi OHKAWA
  • Patent number: 7301487
    Abstract: An image sensor includes: a pixel unit that outputs a first signal including an offset voltage inherent to a pixel; a CDS unit that performs correlated double sampling of a second signal that is obtained from the first signal by canceling the offset voltage inherent to the pixel, and outputs the second signal after the correlated double sampling as a third signal including an offset voltage due to the CDS unit; and an ADC unit that performs analog-to-digital conversion of a fourth signal that is obtained from the third signal by canceling the offset voltage due to the CDS unit.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: November 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Jun Funakoshi, Toshitaka Mizuguchi, Tsuyoshi Higuchi, Katsuyoshi Yamamoto
  • Publication number: 20070052564
    Abstract: An image sensor includes: a pixel unit that outputs a first signal including an offset voltage inherent to a pixel; a CDS unit that performs correlated double sampling of a second signal that is obtained from the first signal by canceling the offset voltage inherent to the pixel, and outputs the second signal after the correlated double sampling as a third signal including an offset voltage due to the CDS unit; and an ADC unit that performs analog-to-digital conversion of a fourth signal that is obtained from the third signal by canceling the offset voltage due to the CDS unit.
    Type: Application
    Filed: May 8, 2006
    Publication date: March 8, 2007
    Inventors: Jun Funakoshi, Toshitaka Mizuguchi, Tsuyoshi Higuchi, Katsuyoshi Yamamoto
  • Publication number: 20060214195
    Abstract: A solid-state imaging device has a substrate in which are formed a pixel array portion having a plurality of pixels, and a peripheral circuitry portion. The device is characterized in that a first multilevel metallization structure is formed over the peripheral circuitry portion, and a second multilevel metallization structure thinner than the first multilevel metallization structure is formed over the pixel array portion.
    Type: Application
    Filed: October 14, 2005
    Publication date: September 28, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Kobayashi, Katsuyoshi Yamamoto, Tadao Inoue, Toshitaka Mizuguchi
  • Publication number: 20060208285
    Abstract: An image sensor in which a plurality of pixels having at least a photodiode, a reset transistor, and source follower transistor are formed, wherein each pixel comprises an electrical-charge transfer gate transistor between the photodiode and reset transistor, and a floating diffusion region constituting a node connecting the reset transistor and transfer gate transistor is connected to the gate of the source follower transistor. Further, a photodiode region is embedded below a well region in which the reset transistor and source follower transistor of each pixel are formed. In addition, the photodiode region is not formed below at least a partial region of the floating diffusion region.
    Type: Application
    Filed: October 13, 2005
    Publication date: September 21, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Tadao Inoue, Katsuyoshi Yamamoto, Narumi Ohkawa
  • Patent number: 7106912
    Abstract: A circuit for correction of white pixel defects capable of complementing white pixel faults without using a storage device for holding white pixel fault spots, and an image sensor using the circuit for correction of white pixel defects. Pixels constituting a pixel section are sequentially subjected to white pixel fault complementation process. A nearby pixel data holding section acquires pixel data from a readout circuit and holds the data. A comparison-determination section compares lightness of a target pixel with that of a nearby pixel and determines, based on the comparison result, whether or not the target pixel is associated with a white pixel fault having a lightness higher than that of the nearby pixel by a predetermined value or more.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: September 12, 2006
    Assignee: Fujitsu Limited
    Inventors: Asao Kokubo, Jun Funakoshi, Katsuyoshi Yamamoto
  • Publication number: 20060170795
    Abstract: A differential amplifier has a first input terminal to which a voltage of a noise signal of the solid-state imaging device is supplied and a second input terminal to which a voltage of a temporary data signal having the noise signal of the solid-state imaging device superposed thereon is supplied. The differential amplifier inverts an output signal when a magnitude relationship in voltage between the first and second input terminals becomes reverse. A measurement circuit measures a variation amount of a voltage of the second input terminal from when the voltage of the second input terminal begins to vary in a direction to reverse the magnitude relationship to when the output signal of the differential amplifier is inverted, and outputs a measurement result as a digital value indicating a voltage of a real data signal obtained by removing the noise signal from the temporary data signal.
    Type: Application
    Filed: May 27, 2005
    Publication date: August 3, 2006
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Publication number: 20060170794
    Abstract: A second source follower circuit of a reference voltage generator includes a transistor having the same characteristics as a first source follower circuit of a pixel. Accordingly, the second source follower circuit can generate a second reference voltage according to the change in characteristics of the first source follower circuit. A noise voltage switching circuit outputs a first voltage as a noise voltage to a pixel signal generator when the noise voltage is equal to or lower than the second reference voltage. In a reset state, the noise voltage and the second reference voltage always have a predetermined voltage difference. Therefore, deterioration in image quality can be prevented even when capturing a subject having high brightness. Since a trimming circuit or the like selecting any one of a plurality of reference voltages according to characteristics of a formed transistor becomes unnecessary, the cost of an imaging device can be reduced.
    Type: Application
    Filed: May 20, 2005
    Publication date: August 3, 2006
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Publication number: 20060010101
    Abstract: An automated system and method for predicting a future resource utilization tendency by analyzing a change in resource usage on the basis of a real operation condition in a computer system. A CPU utilization estimating unit acquires a resource log and a transaction log, and estimates utilization for each transaction, and information on the number of executions for each transaction, a processing amount predicting unit performs a statistical time-series analysis on the basis of time-series data of the number of executions for each transaction included in the transaction log and predicts an amount of processing for each type of a transaction, and a resource utilization predicting unit predicts the computer resource utilization or demand on from the estimated resource utilization for each transaction and the future predicted amount of processing for each transaction.
    Type: Application
    Filed: July 5, 2005
    Publication date: January 12, 2006
    Inventors: Yasuhiro Suzuki, Katsuyoshi Yamamoto, Naoya Yamamoto