Patents by Inventor Katsuyoshi Yamamoto

Katsuyoshi Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060001749
    Abstract: A method for controlling a solid-state imaging apparatus, which includes a plurality of pixels, includes selecting a resetting element of one of the pixels, resetting a detecting unit connected to the pixel, transmitting to a detecting unit, an electric charge accumulated after photoelectric conversion performed by a photoelectric converting element of the pixel, and providing control to set a second end of a transmitting control signal line to an open state.
    Type: Application
    Filed: November 30, 2004
    Publication date: January 5, 2006
    Inventors: Tsuyoshi Higuchi, Jun Funakoshi, Seiji Yamagata, Toshitaka Mizuguchi, Katsuyoshi Yamamoto
  • Publication number: 20060001753
    Abstract: An imaging device provided with a read circuit in which a light-shielding region is formed in a part of an image region where a plurality of optical/electrical conversion devices is two-dimensionally arrayed in the row and column directions and which converts a optically detected signal outputted from each of the optical/electrical conversion devices for each of the column into a digital signal, comprises a storage device for storing the outputted digital signal outputted in relation with the optical/electrical conversion device in the light-shielding region and a difference calculation device for calculating a difference between the outputted digital signal in relation with the optical/electrical conversion device in a light-receiving region except the light-shielding region and a value stored in the storage device.
    Type: Application
    Filed: November 24, 2004
    Publication date: January 5, 2006
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto, Asao Kokubo, Toshitaka Mizuguchi, Tsuyoshi Higuchi
  • Patent number: 6974944
    Abstract: An image sensor, includes: a plurality of pixel circuits, each of which comprises a photoelectric conversion element, a first transistor controlled by a detection signal generated by the photoelectric conversion element, and a second transistor connected to the first transistor and controlled by a select line; and a common amplifier circuit, which is provided commonly to the plurality of pixel circuits, and which has a third transistor connected in parallel to the first transistor, and a current circuit for supplying current to the first and third transistors, wherein an amplifying circuit, which amplifies the detection signal, is formed by the first transistor in a pixel circuit selected by the select line, and by the third transistor in th common amplifier circuit.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: December 13, 2005
    Assignee: Fujitsu Limited
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto, Toshitaka Mizuguchi
  • Publication number: 20050264664
    Abstract: A shift register outputs a selection signal for selection of a horizontal sequence of pixels of a two-dimensional pixel array, and includes a vertical shift register for applying a selection signal to the pixel array from either the outer left side or the outer right side of the pixel array, and a voltage applying device for applying a power supply voltage for reading data for a horizontal sequence of pixels from an opposite side of a supply of the selection signal to the pixel array after the selection signal is output.
    Type: Application
    Filed: September 22, 2004
    Publication date: December 1, 2005
    Inventors: Makoto Yanagisawa, Tadao Inoue, Katsuyoshi Yamamoto
  • Publication number: 20050072901
    Abstract: An image sensor, includes: a plurality of pixel circuits, each of which comprises a photoelectric conversion element, a first transistor controlled by a detection signal generated by the photoelectric conversion element, and a second transistor connected to the first transistor and controlled by a select line; and a common amplifier circuit, which is provided commonly to the plurality of pixel circuits, and which has a third transistor connected in parallel to the first transistor, and a current circuit for supplying current to the first and third transistors, wherein an amplifying circuit, which amplifies the detection signal, is formed by the first transistor in a pixel circuit selected by the select line, and by the third transistor in th common amplifier circuit.
    Type: Application
    Filed: February 10, 2003
    Publication date: April 7, 2005
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto, Toshitaka Mizuguchi
  • Publication number: 20040220950
    Abstract: The present invention provides a technique for measuring the efficiency of components in a computer. An echo server is provided which comprises several units. A socket generation unit generates a receiving server socket on the basis of information on a correspondence between a plurality of components in a computer. And generates a client socket that is a dedicated socket inheriting information of the receiving server socket when data is transmitted. A stream acquisition unit acquires a transmission path for acquiring data transmitted and received between components. A thread generation unit generates a transmission path by coupling streams. A transfer execution unit transfers data acquired via a thread to an original destination component. Using these units, the technique monitors and running verifies behavior by observing data running on the network.
    Type: Application
    Filed: January 30, 2004
    Publication date: November 4, 2004
    Applicant: International Business Machines Corporation
    Inventors: Kohsuke Okamoto, Katsuyoshi Yamamoto, Hiroyuki Ogura
  • Publication number: 20040047773
    Abstract: A sodium carbonate supply device is provided that supplies sodium carbonate to flue gas at the outlet of a boiler 1, and an SO3 separation device 10 is provided that decreases the SO3 concentration in the flue gas while also separating and removing SO3 fraction from the flue gas at the inlet of a wet desulfurization device 7. The SO3 separation device is provided with a shell and tube type of heat exchanger that cools flue gas to below the dew point of H2SO4 gas by allowing flue gas to pass through the shell side and allowing boiler supply water to pass through the tube side. The SO3 component present in the flue gas is lowered in temperature and reacts with moisture in the flue gas to form H2SO4 gas, after which the H2SO4 gas condenses and adheres to the surface of the tubes. By then washing the liquid H2SO4 adhered to the tube surfaces with water, the SO3 component can be removed from the flue gas.
    Type: Application
    Filed: July 25, 2003
    Publication date: March 11, 2004
    Inventors: Masaya Kato, Hiroyuki Katayama, Katsutoshi Yata, Hachiro Hirano, Yoichi Mori, Katsuyoshi Yamamoto
  • Publication number: 20030151682
    Abstract: A circuit for correction of white pixel defects capable of complementing white pixel faults without using a storage device for holding white pixel fault spots, and an image sensor using the circuit for correction of white pixel defects. Pixels constituting a pixel section are sequentially subjected to white pixel fault complementation process. A nearby pixel data holding section acquires pixel data from a readout circuit and holds the data. A comparison-determination section compares lightness of a target pixel with that of a nearby pixel and determines, based on the comparison result, whether or not the target pixel is associated with a white pixel fault having a lightness higher than that of the nearby pixel by a predetermined value or more.
    Type: Application
    Filed: February 5, 2003
    Publication date: August 14, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Asao Kokubo, Jun Funakoshi, Katsuyoshi Yamamoto
  • Publication number: 20020154347
    Abstract: The present invention is an image sensor having a pixel array, which arranges pixels having photoelectric conversion circuits in rows and columns; and a pixel selecting circuit for selecting each pixel, wherein the pixel selecting circuit selects pixels of all rows and/or pixels of all columns, and selects a pixel signal at every plural pixels among the selected pixel signals, and pixels selected from a pixel block of a plurality of rows and columns within the pixel array are dispersed within this pixel block.
    Type: Application
    Filed: September 26, 2001
    Publication date: October 24, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Jun Funakoshi, Katsuyoshi Yamamoto
  • Patent number: 6407690
    Abstract: A reference voltage generator circuit generates a stable reference voltage that may be used by other circuits, such as an A/D converter and a D/A converter. The reference voltage generator circuit includes a rough resistor bank having a pair of first resistors connected in series between a low potential reference voltage and a high potential reference voltage. A first fine resistor bank is connected in shunt with one of the resistors in the rough resistor bank and a second fine resistor bank is also connected in shunt with the same resistor in the rough resistor bank. Switches are connected between nodes between the resistors in the fine resistor banks and another circuit or system, such as an A/D converter.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: June 18, 2002
    Assignee: Fujitsu Limited
    Inventors: Katsuyoshi Yamamoto, Toshitaka Mizuguchi
  • Patent number: 6388599
    Abstract: A reference voltage generator circuit generates a stable reference voltage that may be used by other circuits, such as an A/D converter and a D/A converter. The reference voltage generator circuit includes a rough resistor bank having a pair of first resistors connected in series between a low potential reference voltage and a high potential reference voltage. A first fine resistor bank is connected in shunt with one of the resistors in the rough resistor bank and a second fine resistor bank is also connected in shunt with the same resistor in the rough resistor bank. Switches are connected between nodes between the resistors in the fine resistor banks and another circuit or system, such as an A/D converter.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: May 14, 2002
    Assignee: Fujitsu Limited
    Inventors: Katsuyoshi Yamamoto, Toshitaka Mizuguchi
  • Publication number: 20020047794
    Abstract: A reference voltage generator circuit generates a stable reference voltage that may be used by other circuits, such as an A/D converter and a D/A converter. The reference voltage generator circuit includes a rough resistor bank having a pair of first resistors connected in series between a low potential reference voltage and a high potential reference voltage. A first fine resistor bank is connected in shunt with one of the resistors in the rough resistor bank and a second fine resistor bank is also connected in shunt with the same resistor in the rough resistor bank. Switches are connected between nodes between the resistors in the fine resistor banks and another circuit or system, such as an A/D converter.
    Type: Application
    Filed: December 20, 2001
    Publication date: April 25, 2002
    Applicant: Fujitsu Limited
    Inventors: Katsuyoshi Yamamoto, Toshitaka Mizuguchi
  • Publication number: 20010002820
    Abstract: A reference voltage generator circuit generates a stable reference voltage that may be used by other circuits, such as an A/D converter and a D/A converter. The reference voltage generator circuit includes a rough resistor bank having a pair of first resistors connected in series between a low potential reference voltage and a high potential reference voltage. A first fine resistor bank is connected in shunt with one of the resistors in the rough resistor bank and a second fine resistor bank is also connected in shunt with the same resistor in the rough resistor bank. Switches are connected between nodes between the resistors in the fine resistor banks and another circuit or system, such as an A/D converter.
    Type: Application
    Filed: January 24, 2001
    Publication date: June 7, 2001
    Applicant: Fujitsu Limited
    Inventors: Katsuyoshi Yamamoto, Toshitaka Mizuguchi
  • Patent number: 6204791
    Abstract: A reference voltage generator circuit generates a stable reference voltage that may be used by other circuits, such as an A/D converter and a D/A converter. The reference voltage generator circuit includes a rough resistor bank having a pair of first resistors connected in series between a low potential reference voltage and a high potential reference voltage. A first fine resistor bank is connected in shunt with one of the resistors in the rough resistor bank and a second fine resistor bank is also connected in shunt with the same resistor in the rough resistor bank. Switches are connected between nodes between the resistors in the fine resistor banks and another circuit or system, such as an A/D converter.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: March 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Katsuyoshi Yamamoto, Toshitaka Mizuguchi
  • Patent number: 4520505
    Abstract: In a system for identifying hand-written characters, the read character is binary-coded with a high threshold value and a low threshold value, picture elements whose density levels are between the high and low threshold values are subjected to thinning, and the picture elements of the thinned character pattern having density levels lower than the high threshold level are redetermined as to black or white levels from the contrast of each picture element with respect to the surrounding picture elements, so that noise can be eliminated without cutting blurred portions of the character or collapsing portions of the character.
    Type: Grant
    Filed: December 8, 1982
    Date of Patent: May 28, 1985
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuyoshi Yamamoto, Haruo Mizukami, Hajime Nambu