Abstract: A water- and oil-repellent includes, as an active ingredient, a fluorine-containing copolymer including as a copolymer unit (A) at least one of perfluoroalkylalkyl acrylates and corresponding methacrylates, (B) benzyl acrylate or benzyl methacrylate represented by the general formula: CnF2n+1CmH2mOCOCR?CH2 (wherein R represents a hydrogen atom or a methyl group; n represents 4, 5, or 6; and m represents 1, 2, 3, or 4), (C) a fluorine-free polymerizable monomer other than benzyl acrylate and benzyl methacrylate, and (D) a cross-linkable group-containing polymerizable monomer.

Abstract: There is provided a content reproduction apparatus including a reproduction request receiving unit that receives from a first external device conforming to a first communication standard a request to reproduce content data selected by the first external device, a content data obtaining unit that obtains from a second external device conforming to the first communication standard, which stores the content data selected by the first external device, the content data in response to the received request, a content reproduction unit that reproduces the obtained content data, and a data converting unit that converts data which can be transmitted according to the first communication standard into data which can be transmitted according to a second communication standard different than the first communication standard.

Abstract: A polyfluoroalkyl alcohol, or a (meth)acrylic acid derivative thereof, represented by the following general formula: CnF2n+1(CH2CF2)a(CF2CF2)b(CH2CH2)cOR (R:H or (meth)acrylic acid group; n: 1-6; a: 1-4; b: 1-3; and c: 1-3). Polyfluoroalkyl alcohol (R: hydrogen atom) can be produced by reaction of fluoroalkyl iodide represented by the following general formula: CnF2n+1(CH2CF2)a(CF2CF2)b(CH2CH2)cI with N-methyl formamide, followed by hydrolysis in the presence of an acid catalyst, whereas polyfluoroalkyl alcohol (meth)acrylic acid derivative (R: (meth)acrylic acid group) can be produced by reaction of the polyfluoroalkyl alcohol with (meth)acrylic acid.

Abstract: A polyfluoroalkyl alcohol, or a (meth)acrylic acid derivative thereof, represented by the following general formula: CnF2n+1(CH2CF2)a(CF2CF2)b(CH2CH2)cOR (R:H or (meth)acrylic acid group; n: 1-6; a: 1-4; b: 1-3; and c: 1-3). Polyfluoroalkyl alcohol (R: hydrogen atom) can be produced by reaction of fluoroalkyl iodide represented by the following general formula: CnF2n+1(CH2CF2)a(CF2CF2)b(CH2CH2)cI with N-methyl formamide, followed by hydrolysis in the presence of an acid catalyst, whereas polyfluoroalkyl alcohol (meth)acrylic acid derivative (R: (meth)acrylic acid group) can be produced by reaction of the polyfluoroalkyl alcohol with (meth)acrylic acid.

Abstract: A terminally iodized polyfluoroalkane oligomer represented by the following general formula: CnF2n+1(CH2CF2)s+p(CF2CF2)t+rI??[I] (wherein n is an integer of 1 to 6, s+p is an integer of 1 to 4, showing the number of vinylidene fluoride skeleton, and t+r is an integer of 1 to 6, showing the number of tetrafluoroethylene skeleton, the adjacent group to the CnF2n+1 group being the CH2CF2 group) can be produced by reaction of a terminally iodized polyfluoroalkane, represented by the following general formula: CnF2n+1(CH2CF2)s+p(CF2CF2)tI with tetrafluoroethylene in the presence of a peroxide initiator.

Abstract: A polyfluoroalkyl ester of unsaturated carboxylic acid is produced in high yield in a more simple reactor and with much more reduction in the waste than the conventional process based on esterification reaction by subjecting a polyfluoroalkanol represented by the following general formula: Rf—R—OH where Rf is a polyfluoroalkyl group having 1–6 carbon atoms and R is an alkylene group having 1–6 carbon atoms, and an unsaturated carboxylic acid to dehydration reaction in a fluorine-containing solvent in the presence of an acid catalyst and a polymerization inhibitor.

Abstract: A polyfluoroalkyl ester of unsaturated carboxylic acid is produced in high yield in a more simple reactor and with much more reduction in the waste than the conventional process based on esterification reaction by subjecting a polyfluoroalkanol represented by the following general formula: Rf-R—OH , where Rf is a polyfluoroalkyl group having 1-6 carbon atoms and R is an alkylene group having 1-6 carbon atoms, and an unsaturated carboxylic acid to dehydration reaction in a fluorine-containing solvent in the presence of an acid catalyst and a polymerization inhibitor.

Abstract: A surface mounting quartz crystal oscillator has an IC chip containing an oscillator circuit, and a quartz crystal unit which are sealed in a container body by a metal cover, wherein stray capacitances C1, C2 are equivalently in parallel with oscillation capacitors Ca, Cb connected to one and the other ends of the crystal unit, respectively. A gap between the IC chip and a crystal blank of the crystal unit, and a gap between the crystal blank and metal cover are set in accordance with a changing amount of the oscillation frequency due to a change in the stray capacitances C1, C2 in a direction in which a change in equivalent series capacitance is reduced, as viewed from the crystal unit, while maintaining a spacing between the IC chip and metal cover.

Abstract: A surface mounting quartz crystal oscillator has an IC chip containing an oscillator circuit, and a quartz crystal unit which are sealed in a container body by a metal cover, wherein stray capacitances C1, C2 are equivalently in parallel with oscillation capacitors Ca, Cb connected to one and the other ends of the crystal unit, respectively. A gap between the IC chip and a crystal blank of the crystal unit, and a gap between the crystal blank and metal cover are set in accordance with a changing amount of the oscillation frequency due to a change in the stray capacitances C1, C2 in a direction in which a change in equivalent series capacitance is reduced, as viewed from the crystal unit, while maintaining a spacing between the IC chip and metal cover.

Abstract: A dubbing system for inhibiting, for a predetermined length of time, a high-speed dubbing operation for a program for which a high-speed dubbing operation was executed within the predetermined length of time. When the power supply to a volatile memory in which high-speed dubbing permission and inhibition information for each program is stored is reset, the high-speed dubbing immediately after the restarting of the power supply to this volatile memory is forcibly inhibited for the predetermined length of time.

Abstract: A dubbing system for inhibiting, for a predetermined length of time, a high-speed dubbing operation for a program for which a high-speed dubbing operation was executed within the predetermined length of time. When the power supply to a volatile memory in which high-speed dubbing permission and inhibition information for each program is stored is reset, the high-speed dubbing immediately after the restarting of the power supply to this volatile memory is forcibly inhibited for the predetermined length of time.

Abstract: A period pulse corresponding to the shortest information retention time of those of dynamic memory cells is counted to form a refresh address to be assigned to a plurality of word lines. A carry signal outputted from the refresh address counter is divided by a divider. For each of said plurality of word lines assigned with the refresh address, one of a short period corresponding to an output pulse of a timer or a long period corresponding to the divided pulse from the divider is stored in a storage circuit as refresh time setting information. A memory cell refresh operation to be performed by the refresh address is made valid or invalid for each word line according to the refresh time setting information stored in the storage circuit and the refresh time setting information itself is made invalid by the output pulse of the divider.

Abstract: A semiconductor memory, such as, of a dual-port type includes dynamic RAM cells, such as of the single-transistor, single-capacitor type in which each such cell is coupled to one data line of a corresponding pair of data lines and a word line. The memory has a plurality of sense amplifiers which are coupled to a plurality of data line pairs, respectively, a plurality of pairs of switching MOSFETs respectively coupled between the plurality of data line pairs and a common data line pair for providing either selective or simultaneous connection of the plurality of data line pairs to the common data line during a first write mode and a second write mode, respectively.

Abstract: A multiport memory is provided which permits both random access and serial access. In order to reduce parasitic capacitance and improve operating speed, the serial input/output lines are each divided into two parts at their middle points. Sense amplifiers for the serial input/output lines are provided at upper and lower ends of the serial access memory elements to respectively amplify signals from the divided lines. Additional features are provided for improving both the serial and random operation. For example, during the serial read mode, the column selector for random access is simultaneously operated, and read data passing through the random access column selector is used as head data for the serial output operation to be delivered through the serial output circuit. Also, a serial selector can be controlled by a select signal formed by a Gray Code counter to improve operating speed.

Abstract: The semiconductor memory is facilitated with control circuitry for effecting plural self-refresh modes having respectively different refresh periods. The plural self-refresh modes are typified by a PS (pseudo) refresh mode which is applied when the memory is in the nonselected state for a comparatively long period of time, such as in the state in which memory backup is being facilitated, and by a VS (virtual) refresh mode in which the refreshing operation of the memory cells is effected intermittently during the intervals of memory accessings. The pseudo refresh mode has a longer refresh time period than the virtual refresh mode. The control circuitry also has counter circuits for the generating of refresh address signals in accordance with a first timing signal indicative of a pseudo refresh mode and a second timing signal indicative of a virtual refresh mode, the latter timing signal being a higher frequency signal.

Abstract: In an electronic circuit system unit having a semiconductor integrated circuit unit on a wafer scale, a semiconductor wafer (a semiconductor integrated circuit unit on a wafer scale) and a print wiring substrate are laid to overlap each other and semiconductor pellets are mounted on the print wiring substrate in the overlapping area of the print wiring substrate and the semiconductor wafer. In said electronic circuit system unit, an area being a part of the periphery of the semiconductor wafer is protruded from the periphery of the print wiring substrate being placed to overlap the semiconductor wafer, and the semiconductor wafer and the print wiring substrate are electrically connected to each other in an area being a part of the protruded part through wires.

Abstract: A multiport memory is provided which permits both random access and serial access. In order to reduce parasitic capacitance and improve operating speed, the serial input/output lines are each divided into two parts at their middle points. Sense amplifiers for the serial input/output lines are provided at upper and lower ends of the serial access memory elements to respectively amplify signals from the divided lines. Additional features are provided for improving both the serial and random operation. For example, during the serial read mode, the column selector for random access is simultaneously operated, and read data passing through the random access column selector is used as head data for the serial output operation to be delivered through the serial output circuit. Also, a serial selector can be controlled by a select signal formed by a Gray Code counter to improve operating speed.

Abstract: In LSI circuit devices having a plurality of subchips packaged therein and having specific functions, capacitance cutting buffer circuits are employed in conjunction with respective terminals of the subchips, and a driver is disposed at respective points where relatively long wiring lines are respectively sub-divided into a corresponding plurality of lines. As a result, signal transmission delay can be significantly reduced. The terminals of the subchips are also provided with a probing pad to test the operations of the subchips independently of one another. The subchips employ circuit blocks which are to operate simultaneously and in conjunction with the wirings of the subchips, power supply lines are disposed correspondingly to the distributively arranged circuit blocks. Bus lines also controllably transmit addresses as well as data signals in a time sharing manner. Furthermore, each of the subchips has a fault test circuit.

Abstract: A semiconductor memory, such as, of a dual-port type includes dynamic RAM cells, such as of the single-transistor, single-capacitor type in which each such cell is coupled to one data line of a corresponding pair of data lines and a word line. The memory has a plurality of sense amplifiers which are coupled to a the plurality of data line pairs, respectively, a plurality of switches respectively coupled between the plurality of data lines and a common data line for providing either a selective or simultaneous connection of the plurality of pairs of data lines to the common data line during a first write mode and a second write mode, respectively.

Abstract: A dynamic RAM is arranged such that a common data line in each of the non-selected ones of the divided memory arrays is connected to a pair of common source lines of a sense amplifier corresponding to the memory array concerned, whereby the potential of the common data line is set at a medium level which is substantially equal to the potential of the data lines by utilizing the medium potential of the pair of common source lines and a relatively large parasitic capacity thereof, thereby maintaining the data lines at the half-precharge level. The pair of common source lines are shorted to each other during the non-select period of the memory arrays, so that the common source lines have a medium level which is substantially equal to the half-precharge level of the data lines.