Patents by Inventor Kaushal K. Singh
Kaushal K. Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11881411Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.Type: GrantFiled: May 4, 2021Date of Patent: January 23, 2024Assignee: Applied Materials, Inc.Inventors: Kaushal K. Singh, Mei-Yee Shek, Srinivas D. Nemani, Ellie Y. Yieh
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Publication number: 20210257221Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.Type: ApplicationFiled: May 4, 2021Publication date: August 19, 2021Inventors: Kaushal K. SINGH, Mei-Yee SHEK, Srinivas D. NEMANI, Ellie Y. YIEH
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Patent number: 10998200Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.Type: GrantFiled: January 30, 2019Date of Patent: May 4, 2021Assignee: Applied Materials, Inc.Inventors: Kaushal K. Singh, Mei-Yee Shek, Srinivas D. Nemani, Ellie Y. Yieh
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Patent number: 10930472Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: GrantFiled: January 17, 2019Date of Patent: February 23, 2021Assignee: Applied Materials, Inc.Inventors: Bencherki Mebarki, Annamalai Lakshmanan, Kaushal K. Singh, Andrew Cockburn, Ludovic Godet, Paul F. Ma, Mehul B. Naik
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Patent number: 10879177Abstract: The present disclosure provides a film stack structure formed on a substrate and methods for forming the film stack structure on the substrate. In one embodiment, the method for forming a film stack structure on a substrate includes depositing a first adhesion layer on an oxide layer formed on the substrate and depositing a metal layer on the first adhesion layer, wherein the first adhesion layer and the metal layer form a stress neutral structure.Type: GrantFiled: June 19, 2015Date of Patent: December 29, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Minrui Yu, Kai Ma, Thomas Kwon, Kaushal K. Singh, Er-Xuan Ping
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Patent number: 10593592Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.Type: GrantFiled: December 18, 2015Date of Patent: March 17, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Bencherki Mebarki, Annamalai Lakshmanan, Kaushal K. Singh, Paul F. Ma, Mehul B. Naik, Andrew Cockburn, Ludovic Godet
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Publication number: 20190279879Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.Type: ApplicationFiled: January 30, 2019Publication date: September 12, 2019Inventors: Kaushal K. SINGH, Mei-Yee SHEK, Srinivas D. NEMANI, Ellie Y. YIEH
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Publication number: 20190172686Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: ApplicationFiled: January 17, 2019Publication date: June 6, 2019Inventors: Bencherki MEBARKI, Annamalai LAKSHMANAN, Kaushal K. SINGH, Andrew COCKBURN, Ludovic GODET, Paul F. MA, Mehul B. NAIK
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Patent number: 10204764Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: GrantFiled: October 28, 2014Date of Patent: February 12, 2019Assignee: Applied Materials, Inc.Inventors: Bencherki Mebarki, Annamalai Lakshmanan, Kaushal K. Singh, Andrew Cockburn, Ludovic Godet, Paul F. Ma, Mehul Naik
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Patent number: 9905723Abstract: The present disclosure generally provides a method for forming a photovoltaic device including evaporating a source material to form a large molecule processing gas and flowing the large molecule processing gas through a gas distribution showerhead and into a processing area of a processing chamber having a substrate therein. The method includes generating a small molecule processing gas, and reacting the small molecule processing gas with a film already deposited on a substrate surface to form a semiconductor film. Additionally, apparatuses that may use the methods are also provided to enable continuous inline CIGS type solar cell formation.Type: GrantFiled: September 16, 2016Date of Patent: February 27, 2018Assignee: APPLIED MATERIALS, INC.Inventors: Byung-sung Kwak, Kaushal K. Singh, Stefan Bangert, Nety M. Krishna
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Patent number: 9879341Abstract: Embodiments described herein provide a remote plasma system utilizing a microwave source. Additionally, generation and deposition techniques for 2D transition metal chalcogenides with large area uniformity utilizing microwave assisted generation of radicals is disclosed. Plasma may be generated remotely utilizing the microwave source. A processing platform configured to deposit 2D transition metal chalcogenides is also disclosed.Type: GrantFiled: June 21, 2016Date of Patent: January 30, 2018Assignee: Applied Materials, Inc.Inventors: Kaushal K. Singh, Deepak Jadhav, Ashutosh Agarwal, Ashish Goel, Vijay Parihar, Er-Xuan Ping, Randhir P. S. Thakur
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Patent number: 9812328Abstract: Embodiments described herein generally relate to methods for forming silicide materials. Silicide materials formed according to the embodiments described herein may be utilized as contact and/or interconnect structures and may provide advantages over conventional silicide formation methods. In one embodiment, a one or more transition metal and aluminum layers may be deposited on a silicon containing substrate and a transition metal layer may be deposited on the one or more transition metal and aluminum layers. An annealing process may be performed to form a metal silicide material.Type: GrantFiled: June 22, 2016Date of Patent: November 7, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Kaushal K. Singh, Er-Xuan Ping, Xianmin Tang, Sundar Ramamurthy, Randhir Thakur
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Patent number: 9780223Abstract: Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.Type: GrantFiled: July 14, 2016Date of Patent: October 3, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Kaushal K. Singh, Robert Jan Visser, Bhaskar Kumar
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Patent number: 9613859Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.Type: GrantFiled: December 18, 2015Date of Patent: April 4, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Annamalai Lakshmanan, Bencherki Mebarki, Kaushal K. Singh, Paul F. Ma, Mehul B. Naik, Andrew Cockburn, Ludovic Godet
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Publication number: 20170005221Abstract: The present disclosure generally provides a method for forming a photovoltaic device including evaporating a source material to form a large molecule processing gas and flowing the large molecule processing gas through a gas distribution showerhead and into a processing area of a processing chamber having a substrate therein. The method includes generating a small molecule processing gas, and reacting the small molecule processing gas with a film already deposited on a substrate surface to form a semiconductor film. Additionally, apparatuses that may use the methods are also provided to enable continuous inline CIGS type solar cell formation.Type: ApplicationFiled: September 16, 2016Publication date: January 5, 2017Inventors: Byung-sung KWAK, Kaushal K. SINGH, Stefan BANGERT, Nety M. KRISHNA
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Publication number: 20160372371Abstract: Embodiments described herein generally relate to methods for forming silicide materials. Silicide materials formed according to the embodiments described herein may be utilized as contact and/or interconnect structures and may provide advantages over conventional silicide formation methods. In one embodiment, a one or more transition metal and aluminum layers may be deposited on a silicon containing substrate and a transition metal layer may be deposited on the one or more transition metal and aluminum layers. An annealing process may be performed to form a metal silicide material.Type: ApplicationFiled: June 22, 2016Publication date: December 22, 2016Inventors: Kaushal K. SINGH, Er-Xuan PING, Xianmin TANG, Sundar RAMAMURTHY, Randhir THAKUR
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Publication number: 20160372351Abstract: Embodiments described herein provide a remote plasma system utilizing a microwave source. Additionally, generation and deposition techniques for 2D transition metal chalcogenides with large area uniformity utilizing microwave assisted generation of radicals is disclosed. Plasma may be generated remotely utilizing the microwave source. A processing platform configured to deposit 2D transition metal chalcogenides is also disclosed.Type: ApplicationFiled: June 21, 2016Publication date: December 22, 2016Inventors: Kaushal K. SINGH, Deepak JADHAV, Ashutosh AGARWAL, Ashish GOEL, Vijay PARIHAR, Er-Xuan PING, Randhir P.S. THAKUR
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Publication number: 20160372330Abstract: The present disclosure provides a film stack structure formed on a substrate and methods for forming the film stack structure on the substrate. In one embodiment, the method for forming a film stack structure on a substrate includes depositing a first adhesion layer on an oxide layer formed on the substrate and depositing a metal layer on the first adhesion layer, wherein the first adhesion layer and the metal layer form a stress neutral structure.Type: ApplicationFiled: June 19, 2015Publication date: December 22, 2016Inventors: Minrui YU, Kai MA, Thomas KWON, Kaushal K. SINGH, Er-Xuan PING
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Publication number: 20160322509Abstract: Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.Type: ApplicationFiled: July 14, 2016Publication date: November 3, 2016Inventors: Kaushal K. SINGH, Robert Jan VISSER, Bhaskar KUMAR
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Patent number: 9450135Abstract: The present invention generally provides a method for forming a photovoltaic device including evaporating a source material to form a large molecule processing gas and flowing the large molecule processing gas through a gas distribution showerhead and into a processing area of a processing chamber having a substrate therein. The method includes generating a small molecule processing gas, and reacting the small molecule processing gas with a film already deposited on a substrate surface to form a semiconductor film. Additionally, apparatuses that may use the methods are also provided to enable continuous inline CIGS type solar cell formation.Type: GrantFiled: June 3, 2014Date of Patent: September 20, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Byung-sung Kwak, Kaushal K. Singh, Stefan Bangert, Nety M. Krishna