Patents by Inventor Kaushal K. Singh
Kaushal K. Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160204029Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.Type: ApplicationFiled: December 18, 2015Publication date: July 14, 2016Inventors: Bencherki MEBARKI, Annamalai LAKSHMANAN, Kaushal K. SINGH, Paul F. MA, Mehul B. NAIK, Andrew COCKBURN, Ludovic GODET
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Publication number: 20160204027Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.Type: ApplicationFiled: December 18, 2015Publication date: July 14, 2016Inventors: Annamalai LAKSHMANAN, Bencherki MEBARKI, Kaushal K. SINGH, Paul F. MA, Mehul B. NAIK, Andrew COCKBURN, Ludovic GODET
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Patent number: 9373516Abstract: Provided are methods and apparatus for functionalizing a substrate surface used as the channel in a gate stack. Silicon, germanium and silicon germanium substrates surfaces are functionalized with one or more of sulfur and selenium by plasma processing.Type: GrantFiled: August 30, 2013Date of Patent: June 21, 2016Assignee: Applied Materials, Inc.Inventors: Khaled Z. Ahmed, Steven Hung, Kaushal K. Singh, Sundar Ramamurthy
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Publication number: 20160118260Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: ApplicationFiled: October 28, 2014Publication date: April 28, 2016Inventors: Bencherki MEBARKI, Annamalai LAKSHMANAN, Kaushal K. SINGH, Andrew COCKBURN, Ludovic GODET, Paul F. MA, Mehul NAIK
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Patent number: 8846437Abstract: Embodiments of the invention provide a method of forming a doped gallium arsenide based (GaAs) layer from a solution based precursor. The doped gallium arsenide based (GaAs) layer formed from the solution based precursor may assist solar cell devices to improve light absorption and conversion efficiency. In one embodiment, a method of forming a solar cell device includes forming a first layer with a first type of dopants doped therein over a surface of a substrate, forming a GaAs based layer on the first layer, and forming a second layer with a second type of dopants doped therein on the GaAs based layer.Type: GrantFiled: September 30, 2011Date of Patent: September 30, 2014Assignee: Applied Materials, Inc.Inventors: Kaushal K. Singh, Robert Jan Visser, Srikant Rao, Bhaskar Kumar, Claire J. Carmalt, Ranga Rao Arnepalli, Omkaram Nalamasu, Gaurav Saraf, Sanjayan Sathasivam, Christopher Stuart Blackman
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Publication number: 20140287550Abstract: The present invention generally provides a method for forming a photovoltaic device including evaporating a source material to form a large molecule processing gas and flowing the large molecule processing gas through a gas distribution showerhead and into a processing area of a processing chamber having a substrate therein. The method includes generating a small molecule processing gas, and reacting the small molecule processing gas with a film already deposited on a substrate surface to form a semiconductor film. Additionally, apparatuses that may use the methods are also provided to enable continuous inline CIGS type solar cell formation.Type: ApplicationFiled: June 3, 2014Publication date: September 25, 2014Inventors: Byung-sung KWAK, Kaushal K. SINGH, Stefan BANGERT, Nety M. KRISHNA
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Patent number: 8822259Abstract: Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.Type: GrantFiled: April 15, 2011Date of Patent: September 2, 2014Assignee: Applied Materials, Inc.Inventors: Kaushal K. Singh, Robert Visser, Vijay Parihar, Randhir P. S. Thakur
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Patent number: 8747942Abstract: Solar cells are provided with carbon nanotubes (CNTs) which are used: to define a micron/sub-micron geometry of the solar cells; and/or as charge transporters for efficiently removing charge carriers from the absorber layer to reduce the rate of electron-hole recombination in the absorber layer. A solar cell may comprise: a substrate; a multiplicity of areas of metal catalyst on the surface of the substrate; a multiplicity of carbon nanotube bundles formed on the multiplicity of areas of metal catalyst, each bundle including carbon nanotubes aligned roughly perpendicular to the surface of the substrate; and a photoactive solar cell layer formed over the carbon nanotube bundles and exposed surfaces of the substrate, wherein the photoactive solar cell layer is continuous over the carbon nanotube bundles and the exposed surfaces of the substrate.Type: GrantFiled: June 9, 2010Date of Patent: June 10, 2014Assignee: Applied Materials, Inc.Inventors: Omkaram Nalamasu, Charles Gay, Victor L. Pushparaj, Kaushal K. Singh, Robert J. Visser, Majeed A. Foad, Ralf Hofmann
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Patent number: 8736947Abstract: The present invention generally relates to electrochromic (EC) devices, such as used in electrochromic windows (ECWs), and their manufacture. The EC devices may comprise a transparent substrate; a first transparent conductive layer; a doped coloration layer, wherein the coloration layer dopants provide structural stability to the arrangement of atoms in the coloration layer; an electrolyte layer; a doped anode layer over said electrolyte layer, wherein the anode layer dopant provides increased electrically conductivity in the doped anode layer; and a second transparent conductive layer. A method of fabricating an electrochromic device may comprise depositing on a substrate, in sequence, a first transparent conductive layer, a doped coloration layer, an electrolyte layer, a doped anode layer, and a second transparent conductive layer, wherein at least one of the doped coloration layer, the electrolyte layer and the doped anode layer is sputter deposited using a combinatorial plasma deposition process.Type: GrantFiled: October 22, 2010Date of Patent: May 27, 2014Assignee: Applied Materials, Inc.Inventors: Byung-Sung Leo Kwak, Kaushal K. Singh, Joseph G. Gordon, II, Omkaram Nalamasu
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Publication number: 20140065798Abstract: Provided are methods and apparatus for functionalizing a substrate surface used as the channel in a gate stack. Silicon, germanium and silicon germanium substrates surfaces are functionalized with one or more of sulfur and selenium by plasma processing.Type: ApplicationFiled: August 30, 2013Publication date: March 6, 2014Inventors: Khaled Z. Ahmed, Steven Hung, Kaushal K. Singh, Sundar Ramamurthy
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Patent number: 8415556Abstract: Methods for fabrication of copper delafossite materials include a low temperature sol-gel process for synthesizing CuBO2 powders, and a pulsed laser deposition (PLD) process for forming thin films of CuBO2, using targets made of the CuBO2 powders. The CuBO2 thin films are optically transparent p-type semiconductor oxide thin films. Devices with CuBO2 thin films include p-type transparent thin film transistors (TTFT) comprising thin film CuBO2 as a channel layer and thin film solar cells with CuBO2 p-layers. Solid state dye sensitized solar cells (SS-DSSC) comprising CuBO2 in various forms, including “core-shell” and “nano-couple” particles, and methods of manufacture, are also described.Type: GrantFiled: December 21, 2009Date of Patent: April 9, 2013Assignee: Applied Materials, Inc.Inventors: Kaushal K. Singh, Omkaram Nalamasu, Nety Krishna, Michael Snure, Ashutosh Tiwari
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Patent number: 8387557Abstract: Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes.Type: GrantFiled: October 13, 2009Date of Patent: March 5, 2013Assignee: Applied MaterialsInventors: Kaushal K. Singh, Joseph M. Ranish
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Publication number: 20120218621Abstract: The present invention generally relates to electrochromic (EC) devices, such as used in electrochromic windows (ECWs), and their manufacture. The EC devices may comprise a transparent substrate; a first transparent conductive layer; a doped coloration layer, wherein the coloration layer dopants provide structural stability to the arrangement of atoms in the coloration layer; an electrolyte layer; a doped anode layer over said electrolyte layer, wherein the anode layer dopant provides increased electrically conductivity in the doped anode layer; and a second transparent conductive layer. A method of fabricating an electrochromic device may comprise depositing on a substrate, in sequence, a first transparent conductive layer, a doped coloration layer, an electrolyte layer, a doped anode layer, and a second transparent conductive layer, wherein at least one of the doped coloration layer, the electrolyte layer and the doped anode layer is sputter deposited using a combinatorial plasma deposition process.Type: ApplicationFiled: October 22, 2010Publication date: August 30, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Byung Sung Leo Kwak, Kaushal K. Singh, Joseph G. Gordon, II, Omkaram Nalamasu
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Publication number: 20120080753Abstract: Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.Type: ApplicationFiled: September 30, 2011Publication date: April 5, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Kaushal K. Singh, Robert Jan Visser, Bhaskar Kumar
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Publication number: 20120080092Abstract: Embodiments of the invention provide a method of forming a doped gallium arsenide based (GaAs) layer from a solution based precursor. The doped gallium arsenide based (GaAs) layer formed from the solution based precursor may assist solar cell devices to improve light absorption and conversion efficiency. In one embodiment, a method of forming a solar cell device includes forming a first layer with a first type of dopants doped therein over a surface of a substrate, forming a GaAs based layer on the first layer, and forming a second layer with a second type of dopants doped therein on the GaAs based layer.Type: ApplicationFiled: September 30, 2011Publication date: April 5, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Kaushal K. Singh, Robert Jan Visser, Srikant Rao, Bhaskar Kumar, Claire J. Carmalt, Ranga Rao Arnepalli, Omkaram Nalamasu, Gaurav Saraf, Sanjayan Sathasivam, Christopher Stuart Blackman
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Publication number: 20110315186Abstract: Embodiments of the invention provide a thin single crystalline silicon film solar cell and methods of forming the same. The method includes forming a thin single crystalline silicon layer on a silicon growth substrate, followed by forming front or rear solar cell structures on and/or in the thin single crystalline silicon film. The method also includes attaching the thin single crystalline silicon film to a mechanical carrier and then separating the growth substrate from the thin single crystalline silicon film along a cleavage plane formed between the growth substrate and the thin single crystalline silicon film. Front or rear solar cell structures are then formed on and/or in the thin single crystalline silicon film opposite the mechanical carrier to complete formation of the solar cell.Type: ApplicationFiled: May 12, 2011Publication date: December 29, 2011Applicant: APPLIED MATERIALS, INC.Inventors: James M. Gee, Nag B. Patibandla, Kaushal K. Singh, Omkaram Nalamasu
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Publication number: 20110263068Abstract: Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.Type: ApplicationFiled: April 15, 2011Publication date: October 27, 2011Applicant: APPLIED MATERIALS, INC.Inventors: KAUSHAL K. SINGH, Robert Visser, Vijay Parihar, Randhir P. S. Thakur
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Publication number: 20110088762Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a barrier layer disposed on a substrate, a TCO layer disposed on the barrier layer, and a p-i-n junction cell formed on the TCO layer. In another embodiment, a method for forming a photovoltaic device includes providing a substrate having a surface, forming a barrier layer on the surface of the substrate, forming a TCO layer on a top surface of the barrier layer, and forming a p-i-n junction cell on the TCO layer.Type: ApplicationFiled: September 10, 2010Publication date: April 21, 2011Applicant: APPLIED MATERIALS, INC.Inventors: Kaushal K. Singh, Deepak Pingalay, Suresh Shrauti
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Publication number: 20100313951Abstract: Solar cells are provided with carbon nanotubes (CNTs) which are used: to define a micron/sub-micron geometry of the solar cells; and/or as charge transporters for efficiently removing charge carriers from the absorber layer to reduce the rate of electron-hole recombination in the absorber layer. A solar cell may comprise: a substrate; a multiplicity of areas of metal catalyst on the surface of the substrate; a multiplicity of carbon nanotube bundles formed on the multiplicity of areas of metal catalyst, each bundle including carbon nanotubes aligned roughly perpendicular to the surface of the substrate; and a photoactive solar cell layer formed over the carbon nanotube bundles and exposed surfaces of the substrate, wherein the photoactive solar cell layer is continuous over the carbon nanotube bundles and the exposed surfaces of the substrate.Type: ApplicationFiled: June 9, 2010Publication date: December 16, 2010Applicant: APPLIED MATERIALS, INC.Inventors: Omkaram Nalamasu, Charles Gay, Victor L. Pushparaj, Kaushal K. Singh, Robert J. Visser, Majeed A. Foad, Ralf Hofmann
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Publication number: 20100267191Abstract: The present invention generally provides a method for forming a photovoltaic device including evaporating a source material to form a large molecule processing gas and flowing the large molecule processing gas through a gas distribution showerhead and into a processing area of a processing chamber having a substrate therein. The method includes generating a small molecule processing gas, and reacting the small molecule processing gas with a film already deposited on a substrate surface to form a semiconductor film. Additionally, apparatuses that may use the methods are also provided to enable continuous inline CIGS type solar cell formation.Type: ApplicationFiled: April 20, 2010Publication date: October 21, 2010Applicant: APPLIED MATERIALS, INC.Inventors: Byung-Sung Kwak, Kaushal K. Singh, Stefan Bangert, Nety M. Krishna