Patents by Inventor Kazuaki Kurihara

Kazuaki Kurihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7567145
    Abstract: A superconducting tunable filter is disclosed that has a center frequency and a bandwidth able to be adjusted separately. The superconducting tunable filter includes a superconducting resonator filter pattern formed on a dielectric substrate; a dielectric or magnetic plate above the resonator filter pattern and having a through-hole; a dielectric or magnetic rod inserted in the through-hole; and a position controller which separately controls the position of the dielectric or magnetic plate and the position of the dielectric or magnetic rod relative to the resonator filter pattern.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: July 28, 2009
    Assignee: Fujitsu Limited
    Inventors: Akihiko Akasegawa, Kazuaki Kurihara, Kazunori Yamanaka, Shigetoshi Ohshima, Atsushi Saito
  • Patent number: 7565188
    Abstract: A superconducting filter device is disclosed that is able to prevent current concentration and improve electrical surface resistance. The superconducting filter device includes a first dielectric substrate, and a bulk superconducting resonator that is embedded in the first dielectric substrate and is formed from a bulk superconducting material.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: July 21, 2009
    Assignee: Fujitsu Limited
    Inventors: Akihiko Akasegawa, Kazuaki Kurihara, Kazunori Yamanaka, Shigetoshi Ohshima, Atsushi Saito
  • Publication number: 20090167460
    Abstract: A superconducting tunable filter is disclosed that has a center frequency and a bandwidth able to be adjusted separately. The superconducting tunable filter includes a superconducting resonator filter pattern formed on a dielectric substrate; a dielectric or magnetic plate above the resonator filter pattern and having a through-hole; a dielectric or magnetic rod inserted in the through-hole; and a position controller which separately controls the position of the dielectric or magnetic plate and the position of the dielectric or magnetic rod relative to the resonator filter pattern.
    Type: Application
    Filed: November 30, 2006
    Publication date: July 2, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Akihiko Akasegawa, Kazuaki Kurihara, Kazunori Yamanaka, Shigetoshi Ohshima, Atsushi Saito
  • Publication number: 20090080119
    Abstract: According to an aspect of an embodiment, a head slider includes: a slider substrate; and an operating unit arranged on the slider substrate, the operating unit having a pair of electrodes and a piezoelectric component arranged between the pair of electrodes, the pair of electrodes being constituted by a first electrode and a second electrode, in which the product of the Young's modulus and the thickness of the first electrode in the direction from the first electrode to the second electrode is larger than the product of the Young's modulus and the thickness of the second electrode in the direction from the first electrode to the second electrode. The head slider further includes a magnetic head arranged on the slider substrate with the operating unit, opposite to the slider substrate.
    Type: Application
    Filed: September 16, 2008
    Publication date: March 26, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Kazuaki KURIHARA, Tsuyoshi AOKI
  • Patent number: 7501740
    Abstract: A microscale driving unit includes first and second elongated piezoelectric actuators extending in antiparallel directions. The base ends of the actuators are fixed to a support member. The tip ends of the actuators are fixed to a driven member. First and second electrically conductive members connect the base end of the first or second elongated piezoelectric actuator to the tip end of the second or first elongated piezoelectric actuator. The microscale driving unit allows utilization of a common single wiring pattern connected to both the base end of the first elongated piezoelectric actuator and the tip end of the second elongated piezoelectric actuator when a driving current is supplied to the first and second elongated piezoelectric actuators. Only a smaller area should be required to locate the wiring pattern. A sufficient planar space can be obtained on the surface of the support member.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: March 10, 2009
    Assignee: Fujitsu Limited
    Inventors: Masaharu Hida, Tsuyoshi Mita, Kazuaki Kurihara
  • Publication number: 20090059545
    Abstract: A semiconductor device includes a semiconductor element, a supporting substrate where the semiconductor element is mounted, and a capacitor provided on the semiconductor element and coupled to the supporting substrate via an outside connection terminal. The capacitor includes a valve metal part, an anodic oxide film formed on a surface of the valve metal part, and a conductive part formed on the anodic oxide film and made of a conductive material.
    Type: Application
    Filed: May 2, 2008
    Publication date: March 5, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi SHIOGA, Kazuaki KURIHARA
  • Publication number: 20090057827
    Abstract: As for electrode pads for a semiconductor integrated circuit element, some of electrode pads for signal transmission are coupled to Ti films. Others of the electrode pads for signal transmission are coupled to electrode pads through wiring routed in multilayer wiring. Electrode pads for power supply are coupled to electrode pads to which power lines at potentials different from each other are coupled through wiring. The electrode pads are also coupled to Al foils (anodes). Electrode pads for grounding are coupled to electrode pads to which ground lines are coupled through wiring. The electrode pads are also coupled to conductive polymer films (cathodes).
    Type: Application
    Filed: May 30, 2008
    Publication date: March 5, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi SHIOGA, Masataka MIZUKOSHI, Kazuaki KURIHARA
  • Patent number: 7491996
    Abstract: A capacitive element includes a base member 10, an underlying insulating film 11 formed on the base member 10, a capacitor Q constructed by forming a lower electrode 13, a capacitor dielectric film 14, and an upper electrode 15 sequentially on the underlying insulating film 11, a lower protection insulating film 16a formed on the upper electrode 15 to cover at least a part of the capacitor Q, and an upper protection insulating film 16b formed on the lower protection insulating film 16a and having a wider energy band gap than the lower protection insulating film 16a.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: February 17, 2009
    Assignee: Fujitsu Limited
    Inventors: John David Baniecki, Takeshi Shioga, Kazuaki Kurihara
  • Publication number: 20090007405
    Abstract: A capacitor device includes a capacitor Q constituted by a lower electrode (12) formed on a substrate (10), a dielectric film (14), and an upper electrode (16); an insulating film (18) covering the capacitor Q; a first contact hole (18a) formed in the insulating film (18) on a connection portion (16a) of the upper electrode (16); an electrode pad (20) for preventing a diffusion of solder, formed in the first contact hole (18a); and a solder bump (22) electrically connected to the electrode pad (20), and the upper electrode (16) has a protrusion portion (16a) protruding from the dielectric film (14), and is connected to the first contact hole (18a) on the protrusion portion (16a).
    Type: Application
    Filed: April 27, 2007
    Publication date: January 8, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi Shioga, John David Baniecki, Kazuaki Kurihara
  • Publication number: 20080315358
    Abstract: A capacitive element is characterized by including: a base (12); a lower barrier layer (13) formed on the base (12); capacitors (Q1 and Q2) made by forming a lower electrode (14a), capacitor dielectric layers (15a), and upper electrodes (16a) in this order on the lower barrier layer (13); and an upper barrier layer (20) covering at least the capacitor dielectric layers (15a) and the lower barrier layer (13).
    Type: Application
    Filed: August 15, 2008
    Publication date: December 25, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi Shioga, John David Baniecki, Kazuaki Kurihara
  • Patent number: 7466152
    Abstract: A probe card including probes, a build-up interconnection layer having a multilayer interconnection structure therein and carrying the probes on a top surface in electrical connection with the multilayer interconnection structure, and a capacitor provided on the build-up interconnection layer in electrical connection with one of the probes via the multilayer interconnection structure, wherein the multilayer interconnection structure includes an inner via-contact in the vicinity of the probe and the capacitor is embedded in a resin insulation layer constituting the build-up layer.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: December 16, 2008
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, John David Baniecki, Kazuaki Kurihara
  • Publication number: 20080305607
    Abstract: A thin film capacitor comprising a top electrode, a bottom electrode, and a dielectric film held between the top and bottom electrodes. The dielectric film is composed of at least cations Ba, Sr, and Ti and anion O. The concentration of Sr, Ti, and O ions are uniform along the growth direction of the dielectric film while the concentration of the Ba cation is non-uniform along the growth direction such that a reduced Ba-I region in which the average concentration of perovskite type Ba cations (Ba-I) is less than the average concentration of non-perovskite type Ba cations (Ba-II) exists at or near the boundary between at least one of the top and bottom electrodes, with ratio R=(atm % Ba-I)/[(atm % Ba-I)+(atm % Ba-II)] within a range of 0.1<R<0.2.
    Type: Application
    Filed: July 24, 2008
    Publication date: December 11, 2008
    Applicant: FUJITSU LIMITED
    Inventors: John David Baniecki, Takeshi Shioga, Kazuaki Kurihara
  • Patent number: 7456078
    Abstract: The thin-film capacitor comprises a capacitor part 20 formed over a base substrate 10 and including a first capacitor electrode 14, a capacitor dielectric film 16 formed over the first capacitor electrode 14, and a second capacitor electrode 18 formed over the capacitor dielectric film 16; leading-out electrodes 26a, 26b lead from the first capacitor electrode 14 or the second capacitor electrode 18 and formed of a conducting barrier film which prevents the diffusion of hydrogen or water; and outside connection electrodes 34a, 34b for connecting to outside and connected to the leading-out electrodes 26a, 26b.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: November 25, 2008
    Assignee: Fujitsu Limited
    Inventors: Kazuaki Kurihara, Takeshi Shioga, John David Baniecki, Masatoshi Ishii
  • Publication number: 20080258191
    Abstract: A capacitor device includes a dielectric layer configured to have a composition represented as (Ba1-x, Srx)Ti1-zScyO3+? (0<x<1, 0.01<z<0.3, 0.005<y<0.02, ?0.5<?<0.5) and an in-plane deformation ? of crystal that satisfies ?0.4<<0.4, an upper electrode and a lower electrode that are placed on respective sides of the dielectric layer, and a substrate on which the upper electrode, the lower electrode, and the dielectric layer are disposed.
    Type: Application
    Filed: February 25, 2008
    Publication date: October 23, 2008
    Applicant: FUJITSU LIMITED
    Inventors: John D. Baniecki, Masatoshi Ishii, Kazuaki Kurihara
  • Publication number: 20080257487
    Abstract: An interposer 2 comprising a base 10 formed of a plurality of resin layers 26, 34, 42, 52, 56; a thin-film capacitor 12 buried in the base 10, including a lower electrode 20, a capacitor dielectric film 22 and an upper electrode 24; a first through-electrode 14b formed through the base 10 and electrically connected to the upper electrode 24 of the thin-film capacitor 12; and a second through-electrode 14a formed through the base 10 and electrically connected to the lower electrode 20 of the thin-film capacitor 12, further comprising: an interconnection 48 buried in the base 10 and electrically connected to the respective upper electrodes 24 of a plurality of the thin-film capacitors 12, a plurality of the first through-electrodes 14b being electrically connected to the upper electrodes 24 of said plurality of the thin-film capacitors 12 via the interconnection 48, and said plurality of the first through-electrodes 14b being electrically interconnected by the interconnections 48.
    Type: Application
    Filed: June 18, 2008
    Publication date: October 23, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi Shioga, Yoshikatsu Ishizuki, John David Baniecki, Kazuaki Kurihara
  • Patent number: 7439199
    Abstract: A capacitive element is characterized by including: a base (12); a lower barrier layer (13) formed on the base (12); capacitors (Q1 and Q2) made by forming a lower electrode (14a), capacitor dielectric layers (15a), and upper electrodes (16a) in this order on the lower barrier layer (13); and an upper barrier layer (20) covering at least the capacitor dielectric layers (15a) and the lower barrier layer (13).
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: October 21, 2008
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, John David Baniecki, Kazuaki Kurihara
  • Publication number: 20080242549
    Abstract: A superconducting filter device is disclosed that includes a dielectric base substrate; a patch-type resonator pattern formed of a superconducting material on the base substrate; and a feeder extending in the vicinity of the resonator pattern. The feeder includes a transmission line part for signal inputting or signal outputting, the transmission line part extending toward the resonator pattern; a facing part bent from the transmission line part to face the resonator pattern; and an end part bent from the facing part in a direction away from the resonator pattern.
    Type: Application
    Filed: March 24, 2008
    Publication date: October 2, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kazunori YAMANAKA, Akihiko AKASEGAWA, Kazuaki KURIHARA
  • Patent number: 7427515
    Abstract: A laminated film structure, method of manufacturing, and a preferable electronic element using the structure. The effective polarization into the electric field can be realized in the direction of crystal axis by enhancing the crystal property and alignment property of the ferroelectric substance film formed through epitaxial growth with reference to the plane alignment of semiconductor substrate. After the yttrium stabilized zirconium film and a film of the rock salt structure are sequentially formed with epitaxial growth on a semiconductor substrate, the ferroelectric substance film of simple Perovskite structure is also formed with epitaxial growth. The ferroelectric substance film can improve the crystal property and alignment property thereof by rotating the plane for 45 degrees within the plane for the crystal axis of the yttrium stabilized zirconium.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: September 23, 2008
    Assignee: Fujitsu Limited
    Inventors: Masao Kondo, Kazuaki Kurihara
  • Publication number: 20080217706
    Abstract: There is provided a method of manufacturing a semiconductor device, including forming a structure including a first layer containing Si and a metal oxide layer in contact with the first layer, the metal oxide layer having a dielectric constant higher than that of silicon oxide, and heating the structure in an atmosphere containing He and/or Ne.
    Type: Application
    Filed: May 16, 2008
    Publication date: September 11, 2008
    Inventors: Kouichi MURAOKA, Kazuaki Kurihara
  • Patent number: 7422953
    Abstract: There is provided a method of manufacturing a semiconductor device, including forming a structure including a first layer containing Si and a metal oxide layer in contact with the first layer, the metal oxide layer having a dielectric constant higher than that of silicon oxide, and heating the structure in an atmosphere containing He and/or Ne.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: September 9, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kouichi Muraoka, Kazuaki Kurihara