Abstract: The interposer comprises a base 8 formed of a plurality of resin layers 68, 20, 32, 48; thin-film capacitors 18a, 18b buried between a first resin layer 68 of said plurality of resin layers and a second resin layer 20 of said plurality of resin layers, which include first capacitor electrodes 12a, 12b, second capacitor electrodes 16 opposed to the first capacitor electrode 12a, 12b and the second capacitor electrode 16, and a capacitor dielectric film 14 of a relative dielectric constant of 200 or above formed between the first capacitor electrode 12a, 12b and the second capacitor electrode 16; a first through-electrode 77a formed through the base 8 and electrically connected to the first capacitor electrode 12a, 12b; and a second through-electrode 77b formed through the base 8 and electrically connected to the second capacitor electrode 16.

Abstract: An optical element is constituted by providing an optical waveguide formed with a piezoelectric material, a photonic crystal structure provided within the optical waveguide, a pair of control electrodes, which are provided so as to sandwich the upper and lower surfaces of the optical waveguide, for applying a voltage to the optical waveguide and supporting parts formed at the both ends of the lower control electrode.

Abstract: An interposer 2 comprising a base 10 formed of a plurality of resin layers 26, 34, 42, 52, 56; a thin-film capacitor 12 buried in the base 10, including a lower electrode 20, a capacitor dielectric film 22 and an upper electrode 24; a first through-electrode 14b formed through the base 10 and electrically connected to the upper electrode 24 of the thin-film capacitor 12; and a second through-electrode 14a formed through the base 10 and electrically connected to the lower electrode 20 of the thin-film capacitor 12, further comprising: an interconnection 48 buried in the base 10 and electrically connected to the respective upper electrodes 24 of a plurality of the thin-film capacitors 12, a plurality of the first through-electrodes 14b being electrically connected to the upper electrodes 24 of said plurality of the thin-film capacitors 12 via the interconnection 48, and said plurality of the first through-electrodes 14b being electrically interconnected by the interconnections 48.

Abstract: A photonic crystal structural body has a structure that a second mediums whose refractive index changes with an external field is periodically distributed in a first medium whose refractive index changes with the external field. An external field generator applies the external field to the photonic crystal structural body. It is possible to increase a change amount of a photonic band gap.

Abstract: An ink-jet recording head having no piezoelectric element in a part where no piezoelectric element is required and including an individual electrode lead-out part having such a cross section that allows smooth power supply is provided. The ink-jet recording head includes an individual electrode having an individual electrode main body formed at a position corresponding to an ink chamber and an individual electrode lead-out part for supplying power, a piezoelectric element formed to contact the individual electrode, and a diaphragm formed to contact the piezoelectric element. The individual electrode lead-out part is connected to the individual electrode main body from a position offset from a face including an electrode face of the individual electrode main body, and the piezoelectric element is formed into a shape corresponding to the individual electrode main body.

Abstract: The capacitor according to the present invention comprises a lower electrode 18 formed on a base substrate 14, a dielectric film 20 formed on the lower electrode 18, and an upper electrode 28 formed on the dielectric film 20 and including a polycrystalline conduction film 22, and a amorphous conduction film 24 formed on the polycrystalline conduction film 22. Because of the amorphous conduction film 24 included in the upper electrode 28, which can shut off hydrogen and water, hydrogen and water can be prohibited from arriving at the dielectric film 20. Accordingly, the dielectric film 20 of an oxide is prevented from being reduced with hydrogen, and the capacitor can have good electric characteristics.

Abstract: A capacitive element is characterized by including: a base (12); a lower barrier layer (13) formed on the base (12); capacitors (Q1 and Q2) made by forming a lower electrode (14a), capacitor dielectric layers (15a), and upper electrodes (16a) in this order on the lower barrier layer (13); and an upper barrier layer (20) covering at least the capacitor dielectric layers (15a) and the lower barrier layer (13).

Abstract: The present invention comprises the steps of (a) forming a first electrode on a substrate via an adhesion enhancing layer, (b) forming a capacitor insulating film containing a laminated film, in which an amorphous dielectric film and a polycrystalline dielectric film are laminated via a wave-like interface, by forming sequentially and successively the amorphous dielectric film and the polycrystalline dielectric film made of same material on the first electrode, (c) forming a second electrode on the capacitor insulating film, and (d) a step of annealing the capacitor insulating film in an oxygen atmosphere.

Abstract: A thin film capacitor comprising an insulating substrate, a capacitor structure located on the substrate, the capacitor structure having a dielectric layer sandwiched between a lower electrode layer and an upper electrode layer, and conductor members respectively connected to the lower electrode layer and the upper electrode layer, wherein at least the dielectric layer has a side face having a sufficient slope for preventing the short circuit of the upper electrode layer with the lower electrode layer through the conductor member. A method of manufacturing such a thin film capacitor is also disclosed.

Abstract: A method of manufacturing an ink-jet recording head includes an individual electrode having an individual electrode main body formed at a position corresponding to an ink chamber and an individual electrode lead-out part for supplying power, a piezoelectric element formed to contact the individual electrode, and a diaphragm formed to contact the piezoelectric element. The individual electrode lead-out part is connected to the individual electrode main body from a position offset from a face including an electrode face of the individual electrode main body, and the piezoelectric element is formed into a shape corresponding to the individual electrode main body.

Abstract: A capacitive element which includes: a silicon substrate (base material) 1; a base insulating film 2 formed on the silicon substrate 1; and a capacitor Q constituted by forming a bottom electrode 4a, a capacitor dielectric film 5a and a top electrode 6a on the base insulating film 2. The capacitive element is characterized in that the capacitor dielectric film 5a is composed of a material with the formula (Ba1?y,Sry)mYpTiQO3+?, where 0<p/(p+m+Q)?0.015, ?0.5<?<0.5.

Abstract: In one aspect of the invention, in a thin layer capacitor element comprising a capacitor having a dielectric layer made of a metal oxide and a protective insulating layer made of a resin material, a barrier layer made of a non-conductive inorganic material is provided between the capacitor and the protective insulating layer. In another aspect of the invention, a thin layer capacitor element is constituted so that a capacitor structure is covered with at least one protective insulating layer composed of a cured resin, the cured resin being formed from at least one resin precursor selected from the group consisting of thermosetting resins, photosetting resins and thermoplastic resins.

Abstract: A probe card including probes, a build-up interconnection layer having a multilayer interconnection structure therein and carrying the probes on a top surface in electrical connection with the multilayer interconnection structure, and a capacitor provided on the build-up interconnection layer in electrical connection with one of the probes via the multilayer interconnection structure, wherein the multilayer interconnection structure includes an inner via-contact in the vicinity of the probe and the capacitor is embedded in a resin insulation layer constituting the build-up layer.

Abstract: In one aspect of the invention, in a thin layer capacitor element comprising a capacitor having a dielectric layer made of a metal oxide and a protective insulating layer made of a resin material, a barrier layer made of a non-conductive inorganic material is provided between the capacitor and the protective insulating layer. In another aspect of the invention, a thin layer capacitor element is constituted so that a capacitor structure is covered with at least one protective insulating layer composed of a cured resin, the cured resin being formed from at least one resin precursor selected from the group consisting of thermosetting resins, photosetting resins and thermoplastic resins.

Abstract: A magnetic disk is produced with improved yield by forming a DLC protective film by a d.c. magnetron sputtering process conducted in a sputtering atmosphere containing oxygen. The magnetic disk carries a lubricating film on the DLC film wherein a fluorocarbon resin constituting the lubricating film contains photocrosslinking groups. A lubricating film having non-polar end groups is also disclosed.

Abstract: A thin-film capacitor element has at least a lower electrode, a ferroelectric layer, and an upper electrode. The upper electrode adds a compressive stress of 10 MPa to 5 GPa to the ferroelectric layer. The upper electrode includes at least one oxide selected from PtOx, IrOx, RuOx, SrRuOy, and LaNiOy.

Abstract: To provide a thin-film capacitor and a semiconductor device capable of preventing a reduction in the dielectric constant due to a residual tensile stress in a ferroelectric layer in a thin-film capacitor using the ferroelectric substance, and increasing the dielectric constant and increasing an electric capacity. In a thin-film capacitor 10 having a lower electrode 2, a ferroelectric layer 3, and an upper electrode 4 on a substrate 1, the thin-film capacitor 10 has the upper electrode 4 that adds a compressive stress to the ferroelectric layer 3, and a residual compressive stress in the upper electrode 4 is within a range from 108 to 6×1011 dyne/cm2.

Abstract: A capacitive element includes a base member 10, an underlying insulating film 11 formed on the base member 10, a capacitor Q constructed by forming a lower electrode 13, a capacitor dielectric film 14, and an upper electrode 15 sequentially on the underlying insulating film 11, a lower protection insulating film 16a formed on the upper electrode 15 to cover at least a part of the capacitor Q, and an upper protection insulating film 16b formed on the lower protection insulating film 16a and having a wider energy band gap than the lower protection insulating film 16a.

Abstract: A probe card includes probes, a build-up interconnection layer having a multilayer interconnection structure therein and carrying the probes on a top surface in electrical connection with the multilayer interconnection structure, and a capacitor provided on the build-up interconnection layer in electrical connection with one of the probes via the multilayer interconnection structure, wherein the multilayer interconnection structure includes an inner via-contact in the vicinity of the probe and the capacitor is embedded in a resin insulation layer constituting the build-up layer.

Abstract: A semiconductor device is disclosed that includes an interposer and a semiconductor chip. The interposer includes a Si substrate; multiple through vias provided through an insulating material in corresponding through holes passing through the Si substrate; a thin film capacitor provided on a first main surface of the Si substrate so as to be electrically connected to the through vias; and multiple external connection terminals provided on a second main surface of the Si substrate so as to be electrically connected to the through vias. The second main surface faces away from the first main surface. The semiconductor chip is provided on one of the first main surface and the second main surface so as to be electrically connected to the through vias. The Si substrate has a thickness less than the diameter of the through holes.