Patents by Inventor Kazuaki Nakajima

Kazuaki Nakajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060081893
    Abstract: A semiconductor device comprises an n-type MIS transistor comprising a first gate insulating film and a first gate electrode including an MSix film formed on the first gate insulating film, where M represents a metal element selected from tungsten and molybdenum and x is greater than 1, i.e., x>1; and a p-type MIS transistor comprising a second gate insulating film and a second gate electrode including an MSiy film formed on the second gate insulating film, where y is not less than 0 and less than 1, i.e., 0?y<1.
    Type: Application
    Filed: November 28, 2005
    Publication date: April 20, 2006
    Inventors: Kouji Matsuo, Kazuaki Nakajima
  • Patent number: 6992357
    Abstract: A semiconductor device comprises an n-type MIS transistor comprising a first gate insulating film and a first gate electrode including an MSix film formed on the first gate insulating film, where M represents a metal element selected from tungsten and molybdenum and x is greater than 1, i.e., x>1; and a p-type MIS transistor comprising a second gate insulating film and a second gate electrode including an MSiy film formed on the second gate insulating film, where y is not less than 0 and less than 1, i.e., 0?y<1.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: January 31, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kouji Matsuo, Kazuaki Nakajima
  • Publication number: 20060015763
    Abstract: The customer presses the Connect button (2240) on the customer terminal (1230). By this, a connection request to an operator terminal is notified to an operator terminal (1210) via the push sharing server (2100). On receiving this notification, the operator terminal (1210) changes the Respond button (2310) to the Incoming button. When the operator presses the Respond button (2310) on the operator web page (2300), the push sharing server (2100) transmits a difference notification command to the operator terminal (1210), and the operator terminal displays the same web page as the web page on the customer terminals (1230).
    Type: Application
    Filed: November 25, 2003
    Publication date: January 19, 2006
    Inventor: Kazuaki Nakajima
  • Publication number: 20050275039
    Abstract: A semiconductor device is provided which includes a semiconductor substrate, a gate insulating film which is provided on the semiconductor substrate and contains a first metallic element and oxygen, and a gate electrode which is provided on the gate insulating film and includes a metal silicide film containing a second metallic element, and an impurity layer interposed between the gate insulating film and the metal silicide film and containing a p type impurity element, wherein a Gibbs free energy of a first system including an insulator containing the first metallic element and oxygen, the p type impurity element and silicon is smaller than a Gibbs free energy of a second system including a compound containing the first metallic element and the p type impurity element, and a silicon oxide.
    Type: Application
    Filed: October 19, 2004
    Publication date: December 15, 2005
    Inventor: Kazuaki Nakajima
  • Publication number: 20050263824
    Abstract: According to the present invention, there is provided a semiconductor device, comprising: a gate electrode formed on a substrate via a gate insulating film by using a first silicide film; diffusion layers formed in a surface portion of said substrate so as to be positioned at two ends of a channel region below said gate electrode, and having a second silicide film on surfaces thereof; a first insulating film formed on said second suicide film of said diffusion layers; and a second insulating film continuously formed on said first insulating film and said gate electrode, wherein a total film thickness of said first and second insulating films on said second silicide film is larger than a film thickness of said second insulating film on said gate electrode.
    Type: Application
    Filed: November 3, 2004
    Publication date: December 1, 2005
    Inventor: Kazuaki Nakajima
  • Publication number: 20050130418
    Abstract: According to the manufacturing method of the semiconductor device of the present invention, an oxide film is formed on a metal film formed on a main surface of a semiconductor substrate by exposing the metal film to the oxidizing gas. The oxide film is then reduced in a reducing atmosphere, and a protection film is formed on the surface of the metal film reduced in the reducing step. In this manner, the damage to the surface of the metal film can be prevented.
    Type: Application
    Filed: February 2, 2005
    Publication date: June 16, 2005
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasushi Akasaka, Kazuaki Nakajima, Kiyotaka Miyano, Kyoichi Suguro
  • Publication number: 20050108299
    Abstract: A real-time Web sharing system includes a Web server, a relay server and a sharing control server. The Web server is connected with a network and stores Web contents. The relay server is connected with the network and has a storage section. When receiving an access request with an URL from one client, the relay server determines whether the access request with the URL is a first time access request to the URL. The relay server downloads the Web page of the Web contents corresponding to the URL from the Web server when it is determined that the access request is the first time access request to the URL, stores the downloaded Web page in the storage section, and delivers the Web page to the one client. Also, the relay server reads out the Web page from the storage section when it is determined that the access request is not the first time access request to the URL, rewrite the read out Web page and delivers the rewritten Web page to the one client.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 19, 2005
    Applicant: NEC Corporation
    Inventor: Kazuaki Nakajima
  • Patent number: 6893980
    Abstract: According to the manufacturing method of the semiconductor device of the present invention, an oxide film is formed on a metal film formed on a main surface of a semiconductor substrate by exposing the metal film to the oxidizing gas. The oxide film is then reduced in a reducing atmosphere, and a protection film is formed on the surface of the metal film reduced in the reducing step. In this manner, the damage to the surface of the metal film can be prevented.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: May 17, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasushi Akasaka, Kazuaki Nakajima, Kiyotaka Miyano, Kyoichi Suguro
  • Patent number: 6892240
    Abstract: A bidirectional communication method allowing real-time information sharing among clients on an Intranet through a server on the Internet in disclosed. After establishing two connections between the server and the client through an HTTP proxy, one of the two connections is set to a downstream connection using GET method of HTTP to allow real-time data transfer from the server to the client. Thereafter, the other of the two connections is set to an upstream connection using POST method of HTTP to allow real-time data transfer from the client to the server. After having set the upstream connection and the downstream connection, data cells are transferred between the server and the client through the upstream connection and the downstream connection.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: May 10, 2005
    Assignee: NEC Corporation
    Inventor: Kazuaki Nakajima
  • Publication number: 20050037580
    Abstract: Disclosed is a manufacturing method for a semiconductor device comprising forming a structure comprising a first gate insulating film provided in a first region, a first conducting portion provided on the first gate insulating film, a second gate insulating film provided in a second region, and a second conducting portion provided on the second gate insulating film, the first conducting portion and second conducting portion being formed of the same conducting film, a work function of a bottom of the first conducting portion being equal to a work function of a bottom of the second conducting portion, forming a third conducting portion on the second conducting portion by a plating method, and varying the work function of the bottom of the second conducting portion by diffusing a metal element contained in the third conducting portion to the second conducting portion.
    Type: Application
    Filed: July 12, 2004
    Publication date: February 17, 2005
    Inventors: Kazuaki Nakajima, Kyoichi Suguro
  • Publication number: 20040248393
    Abstract: An aspect of the present invention provides a method of manufacturing a semiconductor device, including, forming an insulating film on a silicide layer formed at the surface of a silicon semiconductor substrate, etching the insulating film to form a contact hole in which the silicide layer is exposed, forming a metal nitride film on the bottom and side wall of the contact hole, carrying out a first heating process at 600° C. or lower on the substrate, carrying out, during the first heating process, a second heating process for 10 msec or shorter with light whose main wavelength is shorter than a light absorbing end of silicon, forming a contact conductor in the contact hole after the second heating process, and forming, on the insulating film, wiring that is electrically connected to the substrate through the contact conductor.
    Type: Application
    Filed: June 16, 2004
    Publication date: December 9, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Tanaka, Kazuaki Nakajima, Yoshitaka Tsunashima, Takayuki Ito, Kyoichi Suguro
  • Patent number: 6812535
    Abstract: A method of manufacturing a semiconductor device, includes the steps of forming a disposable gate on a semiconductor substrate in a region where a gate electrode is to be formed, forming a sidewall spacer on a sidewall of the disposable gate, forming a source and drain in the semiconductor substrate using the disposable gate and the sidewall spacer as a mask, forming an interlevel insulating film on the semiconductor substrate so as to cover the disposable gate, planarizing an upper surface of the interlevel insulating film to expose upper surfaces of the disposable gate and the sidewall spacer, removing the disposable gate to form a trench portion having a side surface formed from the sidewall spacer and a bottom surface formed from the semiconductor substrate, depositing a gate insulating film on the semiconductor substrate so as to cover the bottom surface and side surface of the trench portion, forming a gate electrode buried in the trench portion, and removing the sidewall spacer and the gate insulating
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: November 2, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Yagishita, Kazuaki Nakajima
  • Patent number: 6767796
    Abstract: An aspect of the present invention provides a method of manufacturing a semiconductor device, including, forming an insulating film on a silicide layer formed at the surface of a silicon semiconductor substrate, etching the insulating film to form a contact hole in which the silicide layer is exposed, forming a metal nitride film on the bottom and side wall of the contact hole, carrying out a first heating process at 600° C. or lower on the substrate, carrying out, during the first heating process, a second heating process for 10 msec or shorter with light whose main wavelength is shorter than a light absorbing end of silicon, forming a contact conductor in the contact hole after the second heating process, and forming, on the insulating film, wiring that is electrically connected to the substrate through the contact conductor.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: July 27, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Tanaka, Kazuaki Nakajima, Yoshitaka Tsunashima, Takayuki Ito, Kyoichi Suguro
  • Publication number: 20040142567
    Abstract: A semiconductor device is disclosed, which comprises a silicon substrate, a complementary MISFET circuit, an insulation film formed on the silicon substrate, a first contact hole formed in the insulation film, a first metal silicide layer formed on the bottom of the first contact hole, the first metal silicide layer being provided by a reaction of the n-channel impurity diffused region of the n-channel MISFET with a first metal, a second contact hole formed in the insulation film, a second metal silicide layer formed on the bottom of the second contact hole, the second metal silicide layer being provided by a reaction of the p-channel impurity diffused region of the p-channel MISFET with a second metal, and a work function of the second metal silicide layer being higher than that of the first metal silicide layer.
    Type: Application
    Filed: November 6, 2003
    Publication date: July 22, 2004
    Inventors: Kazuaki Nakajima, Kyoichi Suguro
  • Publication number: 20040087070
    Abstract: A method for manufacturing a semiconductor device having an n-type MIS transistor and a p-type MIS transistor comprises forming a first gate insulating film in a first area where the n-type MIS transistor is to be formed, depositing a first conductive film on the first gate insulating film in the first area, the first conductive film containing silicon, a metal element selected from tungsten and molybdenum and an impurity element selected from phosphorus and arsenic, forming a second gate insulating film in a second area where the p-type MIS transistor is to be formed, and forming a second conductive film on the second gate insulating film in the second area, the second conductive film having a work function higher than that of the first conductive film.
    Type: Application
    Filed: March 19, 2003
    Publication date: May 6, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kazuaki Nakajima
  • Patent number: 6727129
    Abstract: A method for manufacturing a semiconductor device having an n-type MIS transistor and a p-type MIS transistor comprises forming a first gate insulating film in a first area where the n-type MIS transistor is to be formed, depositing a first conductive film on the first gate insulating film in the first area, the first conductive film containing silicon, a metal element selected from tungsten and molybdenum and an impurity element selected from phosphorus and arsenic, forming a second gate insulating film in a second area where the p-type MIS transistor is to be formed, and forming a second conductive film on the second gate insulating film in the second area, the second conductive film having a work function higher than that of the first conductive film.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: April 27, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuaki Nakajima
  • Publication number: 20040004234
    Abstract: A method of manufacturing a semiconductor device, includes the steps of forming a disposable gate on a semiconductor substrate in a region where a gate electrode is to be formed, forming a sidewall spacer on a sidewall of the disposable gate, forming a source and drain in the semiconductor substrate using the disposable gate and the sidewall spacer as a mask, forming an interlevel insulating film on the semiconductor substrate so as to cover the disposable gate, planarizing an upper surface of the interlevel insulating film to expose upper surfaces of the disposable gate and the sidewall spacer, removing the disposable gate to form a trench portion having a side surface formed from the sidewall spacer and a bottom surface formed from the semiconductor substrate, depositing a gate insulating film on the semiconductor substrate so as to cover the bottom surface and side surface of the trench portion, forming a gate electrode buried in the trench portion, and removing the sidewall spacer and the gate insulating
    Type: Application
    Filed: July 8, 2003
    Publication date: January 8, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Yagishita, Kazuaki Nakajima
  • Patent number: 6607952
    Abstract: A method of manufacturing a semiconductor device, includes the steps of forming a disposable gate on a semiconductor substrate in a region where a gate electrode is to be formed, forming a sidewall spacer on a sidewall of the disposable gate, forming a source and drain in the semiconductor substrate using the disposable gate and the sidewall spacer as a mask, forming an interlevel insulating film on the semiconductor substrate so as to cover the disposable gate, planarizing an upper surface of the interlevel insulating film to expose upper surfaces of the disposable gate and the sidewall spacer, removing the disposable gate to form a trench portion having a side surface formed from the sidewall spacer and a bottom surface formed from the semiconductor substrate, depositing a gate insulating film on the semiconductor substrate so as to cover the bottom surface and side surface of the trench portion, forming a gate electrode buried in the trench portion, and removing the sidewall spacer and the gate insulating
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: August 19, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Yagishita, Kazuaki Nakajima
  • Publication number: 20030143825
    Abstract: A semiconductor device comprises an n-type MIS transistor comprising a first gate insulating film and a first gate electrode including an MSix film formed on the first gate insulating film, where M represents a metal element selected from tungsten and molybdenum and x is greater than 1, i.e., x>1; and a p-type MIS transistor comprising a second gate insulating film and a second gate electrode including an MSiy film formed on the second gate insulating film, where y is not less than 0 and less than 1, i.e., 0≦y<1.
    Type: Application
    Filed: December 23, 2002
    Publication date: July 31, 2003
    Inventors: Kouji Matsuo, Kazuaki Nakajima
  • Publication number: 20030084205
    Abstract: A server for carrying out synchronization control, includes (a) at least one event receiver for receiving an event, (b) a memory storing therein distribution schedule information including a plurality of schedule data therein, each of the schedule data including (b1) a timing at which a channel driver controls a media server, (b2) a content of how the channel driver controls the media driver, and (b3) a timing type indicating which one of a time and the event the timing is defined by, and (c) a controller which detects whether a timing is established for each of the schedule data included in the distribution schedule information, and transmits a signal to the channel driver, the signal being indicative of a control associated with the established timing.
    Type: Application
    Filed: October 30, 2002
    Publication date: May 1, 2003
    Applicant: NEC Corporation
    Inventor: Kazuaki Nakajima