Patents by Inventor Kazuhide Kurosaki

Kazuhide Kurosaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Level conversion circuit having improved control and speed of switching from high to low level converter outputs
    Patent number: 5241225
    Abstract: A level conversion circuit includes a first pMOS transistor having a source connected to a first power supply line, a gate receiving a first input signal, and a drain, and a second pMOS transistor having a source connected to the first power supply line, a gate receiving a second input signal, and a drain. A first nMOS transistor has a drain connected to a first output terminal and the drain of the first pMOS transistor, a gate, and a source. A first output signal is output via the first output terminal. A second nMOS transistor has a drain connected to a second output terminal, the drain of the second pMOS transistor and the gate of the first nMOS transistor, a gate connected to the drain of the first nMOS transistor, and a source. A second output signal is output via the second output terminal.
    Type: Grant
    Filed: December 26, 1991
    Date of Patent: August 31, 1993
    Assignee: Fujitsu Limited
    Inventors: Yoshinori Okajima, Kazuhide Kurosaki