Patents by Inventor Kazuhiro Adachi
Kazuhiro Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8933463Abstract: A semiconductor element including an MISFET exhibits diode characteristics in a reverse direction through an epitaxial channel layer. The semiconductor element includes: a silicon carbide semiconductor substrate of a first conductivity type, semiconductor layer of the first conductivity type, body region of a second conductivity type, source region of the first conductivity type, epitaxial channel layer in contact with the body region, source electrode, gate insulating film, gate electrode and drain electrode. If the voltage applied to the gate electrode is smaller than a threshold voltage, the semiconductor element functions as a diode wherein current flows from the source electrode to the drain electrode through the epitaxial channel layer. The absolute value of the turn-on voltage of this diode is smaller than the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.Type: GrantFiled: February 28, 2013Date of Patent: January 13, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Kazuhiro Adachi, Osamu Kusumoto, Masao Uchida, Koichi Hashimoto, Shun Kazama
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Publication number: 20140320113Abstract: Provided is a sensor capable of holding a sensing element at a position of good sensitivity without requiring filling of the case with resin. The sensor includes a sensing element, a case accommodating the sensing element and having a detecting face for the sensing element in an outer face thereof, a holder accommodated inside the case together with the sensing element and pressing the sensing element toward the detecting face and a cable electrically connected to the sensing element. At least one of the holder and the case includes a contact portion deformable by a pressing force generated when the sensing element is pressed toward the detecting face.Type: ApplicationFiled: January 10, 2013Publication date: October 30, 2014Applicant: AISIN SEIKI KABUSHIKI KAISHAInventors: Kazuhiro Adachi, Koji Kawasaki
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Patent number: 8812903Abstract: When a primary computer is taken over to a secondary computer in a redundancy configuration computer system where booting is performed via a storage area network (SAN), a management server delivers an information collecting/setting program to the secondary computer before the user's operating system of the secondary computer is started. This program assigns a unique ID (World Wide Name), assigned to the fiber channel port of the secondary computer to allow a software image to be taken over from the primary computer to the secondary computer.Type: GrantFiled: March 27, 2013Date of Patent: August 19, 2014Assignee: Hitachi, Ltd.Inventors: Tetsuhiro Goto, Kazuhiro Adachi
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Publication number: 20140152374Abstract: A semiconductor element including an MISFET exhibits diode characteristics in a reverse direction through an epitaxial channel layer. The semiconductor element includes: a silicon carbide semiconductor substrate of a first conductivity type, semiconductor layer of the first conductivity type, body region of a second conductivity type, source region of the first conductivity type, epitaxial channel layer in contact with the body region, source electrode, gate insulating film, gate electrode and drain electrode. If the voltage applied to the gate electrode is smaller than a threshold voltage, the semiconductor element functions as a diode wherein current flows from the source electrode to the drain electrode through the epitaxial channel layer. The absolute value of the turn-on voltage of this diode is smaller than the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.Type: ApplicationFiled: February 28, 2013Publication date: June 5, 2014Applicant: PANASONIC CORPORATIONInventors: Kazuhiro ADACHI, Osamu KUSUMOTO, Masao UCHIDA, Koichi HASHIMOTO, Shun KAZAMA
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Publication number: 20140113421Abstract: A silicon carbide vertical MOSFET having low ON-resistance and high blocking voltage is provided. For this, a first deposition film (2) of low concentration silicon carbide of a first conductivity type is formed on the surface of a high concentration silicon carbide substrate (1) of a first conductivity type. Formed on the first deposition film (2) is a second deposition film (31) that comprises a high concentration gate region of a second conductivity type, with a first region removed selectively. A third deposition film (32) formed on the second deposition film, which comprises a second region that is wider than the selectively removed first region, a high concentration source region (5) of a first conductivity type and a low concentration gate region (11) of a second conductivity type. A low concentration base region (4) of a first conductivity type is formed in contact with the first deposition film (2) in the first and second regions.Type: ApplicationFiled: December 31, 2013Publication date: April 24, 2014Applicants: SANYO ELECTRIC CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGYInventors: Shinsuke HARADA, Tsutomu Yatsuo, Kenji Fukuda, Mitsuo Okamoto, Kazuhiro Adachi, Seiji Suzuki
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Publication number: 20130285650Abstract: A rotation speed detecting apparatus, including: an annular fixing member to be fixed to a support member configured to rotatably support a rotating object to be detected; a case mounted to the fixing member; a detecting portion abutting against an abutment portion provided in the case so as to be positioned with respect to the case for detecting a rotation speed of the rotating object to be detected; and a resin mold portion formed by resin molding and configured to fix the detecting portion to the case in a state in which the detecting portion abuts against the abutment portion of the case.Type: ApplicationFiled: February 20, 2012Publication date: October 31, 2013Applicant: AISIN SEIKI KABUSHIKI KAISHAInventors: Kazuhiro Adachi, Kyoichi Okamura, Koji Kawasaki
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Patent number: 8525239Abstract: The present invention is directed to an MIS type semiconductor device, including a channel layer between a semiconductor body region and a gate insulating film, the channel layer having an opposite semiconductor polarity to that of the semiconductor body region. Since Vfb of the semiconductor device is equivalent to or less than a gate rated voltage Vgcc? of the semiconductor device with respect to an OFF-polarity, density of carrier charge that is induced near the surface of the semiconductor body region is kept at a predetermined amount or less with a guaranteed range of operation of the semiconductor device.Type: GrantFiled: May 24, 2011Date of Patent: September 3, 2013Assignee: Panasonic CorporationInventors: Koutarou Tanaka, Takashi Hori, Kazuhiro Adachi
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Patent number: 8471267Abstract: A semiconductor device of the present invention has a semiconductor element region 17 that is provided in part of a silicon carbide layer 3 and a guard-ring region 18 that is provided in another part of the silicon carbide layer 3 surrounding the semiconductor element region 17 when seen in a direction perpendicular to a principal surface of the silicon carbide layer 3.Type: GrantFiled: August 26, 2010Date of Patent: June 25, 2013Assignee: Panasonic CorporationInventors: Masashi Hayashi, Koichi Hashimoto, Kazuhiro Adachi
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Patent number: 8432039Abstract: An integrated circuit device includes a receiving circuit, a transmission circuit, and common pads common to the receiving circuit and the transmission circuit, which are disposed in such a way that the distance between the receiving circuit and the common pad, and the distance between the transmission circuit and the common pad become shorter, respectively.Type: GrantFiled: December 21, 2010Date of Patent: April 30, 2013Assignee: Seiko Epson CorporationInventors: Katsuhiko Maki, Kazuhiro Adachi
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Patent number: 8429443Abstract: When a primary computer is taken over to a secondary computer in a redundancy configuration computer system where booting is performed via a storage area network (SAN), a management server delivers an information collecting/setting program to the secondary computer before the user's operating system of the secondary computer is started. This program assigns a unique ID (World Wide Name), assigned to the fiber channel port of the primary computer, to the fiber channel port of the secondary computer to allow a software image to be taken over from the primary computer to the secondary computer.Type: GrantFiled: April 14, 2011Date of Patent: April 23, 2013Assignee: Hitachi, Ltd.Inventors: Tetsuhiro Goto, Kazuhiro Adachi
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Patent number: 8410489Abstract: A semiconductor element 100 including an MISFET according to the present invention is characterized by having diode characteristics in a reverse direction through an epitaxial channel layer 50. The semiconductor element 100 includes a silicon carbide semiconductor substrate 10 of a first conductivity type, a semiconductor layer 20 of the first conductivity type, a body region 30 of a second conductivity type, a source region 40 of the first conductivity type, an epitaxial channel layer 50 in contact with the body region, a source electrode 45, a gate insulating film 60, a gate electrode 65 and a drain electrode 70. If the voltage applied to the gate electrode of the MISFET is smaller than a threshold voltage, the semiconductor element 100 functions as a diode in which current flows from the source electrode 45 to the drain electrode 70 through the epitaxial channel layer 50.Type: GrantFiled: April 28, 2010Date of Patent: April 2, 2013Assignee: Panasonic CorporationInventors: Kazuhiro Adachi, Osamu Kusumoto, Masao Uchida, Koichi Hashimoto, Shun Kazama
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Patent number: 8283973Abstract: A semiconductor element 100 including an MISFET according to the present invention is characterized by having diode characteristics in a reverse direction through an epitaxial channel layer 50. The semiconductor element 100 includes a semiconductor layer 20 of a first conductivity type, a body region 30 of a second conductivity type, source and drain regions 40 and 75 of the first conductivity type, an epitaxial channel layer 50 in contact with the body region, source and drain electrodes 45 and 70, a gate insulating film 60, and a gate electrode 65. If the voltage applied to the gate electrode of the MISFET is smaller than a threshold voltage, the semiconductor element 100 functions as a diode in which current flows from the source electrode 45 to the drain electrode 70 through the epitaxial channel layer 50. The absolute value of the turn-on voltage of this diode is smaller than that of the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.Type: GrantFiled: August 9, 2010Date of Patent: October 9, 2012Assignee: Panasonic CorporationInventors: Koichi Hashimoto, Kazuhiro Adachi, Osamu Kusumoto, Masao Uchida, Shun Kazama
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Publication number: 20120176183Abstract: The present invention is directed to an MIS type semiconductor device, including a channel layer between a semiconductor body region and a gate insulating film, the channel layer having an opposite semiconductor polarity to that of the semiconductor body region. Since Vfb of the semiconductor device is equivalent to or less than a gate rated voltage Vgcc? of the semiconductor device with respect to an OFF-polarity, density of carrier charge that is induced near the surface of the semiconductor body region is kept at a predetermined amount or less with a guaranteed range of operation of the semiconductor device.Type: ApplicationFiled: May 24, 2011Publication date: July 12, 2012Applicant: PANASONIC CORPORATIONInventors: Koutarou Tanaka, Takashi Hori, Kazuhiro Adachi
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Publication number: 20120139623Abstract: A semiconductor element 100 including an MISFET according to the present invention is characterized by having diode characteristics in a reverse direction through an epitaxial channel layer 50. The semiconductor element 100 includes a semiconductor layer 20 of a first conductivity type, a body region 30 of a second conductivity type, source and drain regions 40 and 75 of the first conductivity type, an epitaxial channel layer 50 in contact with the body region, source and drain electrodes 45 and 70, a gate insulating film 60, and a gate electrode 65. If the voltage applied to the gate electrode of the MISFET is smaller than a threshold voltage, the semiconductor element 100 functions as a diode in which current flows from the source electrode 45 to the drain electrode 70 through the epitaxial channel layer 50. The absolute value of the turn-on voltage of this diode is smaller than that of the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.Type: ApplicationFiled: August 9, 2010Publication date: June 7, 2012Applicant: PANASONIC CORPORATIONInventors: Koichi Hashimoto, Kazuhiro Adachi, Osamu Kusumoto, Masao Uchida, Shun Kazama
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Publication number: 20120057386Abstract: A semiconductor element 100 including an MISFET according to the present invention is characterized by having diode characteristics in a reverse direction through an epitaxial channel layer 50. The semiconductor element 100 includes a silicon carbide semiconductor substrate 10 of a first conductivity type, a semiconductor layer 20 of the first conductivity type, a body region 30 of a second conductivity type, a source region 40 of the first conductivity type, an epitaxial channel layer 50 in contact with the body region, a source electrode 45, a gate insulating film 60, a gate electrode 65 and a drain electrode 70. If the voltage applied to the gate electrode of the MISFET is smaller than a threshold voltage, the semiconductor element 100 functions as a diode in which current flows from the source electrode 45 to the drain electrode 70 through the epitaxial channel layer 50.Type: ApplicationFiled: April 28, 2010Publication date: March 8, 2012Applicant: PANASONIC CORPORATIONInventors: Kazuhiro Adachi, Osamu Kusumoto, Masao Uchida, Koichi Hashimoto, Shun Kazama
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Publication number: 20110220917Abstract: A semiconductor device of the present invention has a semiconductor element region 17 that is provided in part of a silicon carbide layer 3 and a guard-ring region 18 that is provided in another part of the silicon carbide layer 3 surrounding the semiconductor element region 17 when seen in a direction perpendicular to a principal surface of the silicon carbide layer 3.Type: ApplicationFiled: August 26, 2010Publication date: September 15, 2011Inventors: Masashi Hayashi, Koichi Hashimoto, Kazuhiro Adachi
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Publication number: 20110191622Abstract: When a primary computer is taken over to a secondary computer in a redundancy configuration computer system where booting is performed via a storage area network (SAN), a management server delivers an information collecting/setting program to the secondary computer before the user's operating system of the secondary computer is started. This program assigns a unique ID (World Wide Name), assigned to the fibre channel port of the primary computer, to the fibre channel port of the secondary computer to allow a software image to be taken over from the primary computer to the secondary computer.Type: ApplicationFiled: April 14, 2011Publication date: August 4, 2011Applicant: HITACHI, LTD.Inventors: Tetsuhiro GOTO, Kazuhiro ADACHI
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Publication number: 20110156205Abstract: An integrated circuit device includes a receiving circuit, a transmission circuit, and common pads common to the receiving circuit and the transmission circuit, which are disposed in such a way that the distance between the receiving circuit and the common pad, and the distance between the transmission circuit and the common pad become shorter, respectively.Type: ApplicationFiled: December 21, 2010Publication date: June 30, 2011Applicant: SEIKO EPSON CORPORATIONInventors: Katsuhiko MAKI, Kazuhiro ADACHI
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Patent number: 7949892Abstract: When a primary computer is taken over to a secondary computer in a redundancy configuration computer system where booting is performed via a storage area network (SAN), a management server delivers an information collecting/setting program to the secondary computer before the user's operating system of the secondary computer is started. This program assigns a unique ID (World Wide Name), assigned to the fiber channel port of the primary computer, to the fiber channel port of the secondary computer to allow a software image to be taken over from the primary computer to the secondary computer.Type: GrantFiled: December 17, 2009Date of Patent: May 24, 2011Assignee: Hitachi, Ltd.Inventors: Tetsuhiro Goto, Kazuhiro Adachi
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Publication number: 20100100760Abstract: When a primary computer is taken over to a secondary computer in a redundancy configuration computer system where booting is performed via a storage area network (SAN), a management server delivers an information collecting/setting program to the secondary computer before the user's operating system of the secondary computer is started. This program assigns a unique ID (World Wide Name), assigned to the fibre channel port of the primary computer, to the fibre channel port of the secondary computer to allow a software image to be taken over from the primary computer to the secondary computer.Type: ApplicationFiled: December 17, 2009Publication date: April 22, 2010Inventors: Tetsuhiro Goto, Kazuhiro Adachi