Patents by Inventor Kazuhiro Tomioka

Kazuhiro Tomioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220293676
    Abstract: According to one embodiment, a magnetic memory device includes a bottom electrode, a stacked structure provided on the bottom electrode, and including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, a first sidewall insulating layer provided on a sidewall of the bottom electrode and containing a predetermined element and oxygen (O), and a second sidewall insulating layer provided on a sidewall of the stacked structure and containing the predetermined element and oxygen (O).
    Type: Application
    Filed: September 10, 2021
    Publication date: September 15, 2022
    Applicant: Kioxia Corporation
    Inventor: Kazuhiro TOMIOKA
  • Publication number: 20220214215
    Abstract: An optical sensor includes at least one interferometer having a pair of semi-transparent mirrors spaced apart and oppositely arranged, and at least one position of the pair of semi-transparent mirrors can be displaced, at least one collimating element overlapping the at least one interferometer, and at least one photoelectric conversion element having sensitivity in the visible and near infrared light bands and receiving light passing through the interferometer and the collimating element.
    Type: Application
    Filed: March 24, 2022
    Publication date: July 7, 2022
    Applicant: Japan Display Inc.
    Inventors: Toshiyuki HIGANO, Yasushi TOMIOKA, Kazuhiro NISHIYAMA
  • Publication number: 20210288243
    Abstract: According to one embodiment, a magnetic memory device includes a first conductor extending along a first direction, a second conductor extending along a second direction and above the first conductor, and a first layer stack provided between the first conductor and the second conductor and including a first magnetoresistance effect element. The first layer stack has a rectangular shape along a stack surface of the first layer stack. The rectangular shape of the first layer stack has a side intersecting with both the first direction and the second direction.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 16, 2021
    Applicant: Kioxia Corporation
    Inventors: Takao OCHIAI, Kazuhiro TOMIOKA
  • Patent number: 10847576
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic layer, a first insulating layer covering the stacked structure and including a protrusion based on the stacked structure, a second insulating layer provided on the first insulating layer, and an electrode connected to the stacked structure. The first insulating layer has a first hole passing through the first insulating layer, the electrode is connected to the stacked structure at least through the first hole, the second insulating layer has a second hole inside of which a part of the electrode and the protrusion are provided, and the second hole includes a part whose area increases toward the stacked structure.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: November 24, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shuichi Tsubata, Yasuyuki Sonoda, Kazuhiro Tomioka, Takao Ochiai
  • Publication number: 20200083290
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic layer, a first insulating layer covering the stacked structure and including a protrusion based on the stacked structure, a second insulating layer provided on the first insulating layer, and an electrode connected to the stacked structure. The first insulating layer has a first hole passing through the first insulating layer, the electrode is connected to the stacked structure at least through the first hole, the second insulating layer has a second hole inside of which a part of the electrode and the protrusion are provided, and the second hole includes a part whose area increases toward the stacked structure.
    Type: Application
    Filed: March 14, 2019
    Publication date: March 12, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Shuichi TSUBATA, Yasuyuki SONODA, Kazuhiro TOMIOKA, Takao OCHIAI
  • Patent number: 10490732
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a first magnetic layer, a second magnetic layer and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, and a sidewall insulating layer provided on a side surface of the stacked structure and containing boron (B).
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: November 26, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yasuyuki Sonoda, Daisuke Watanabe, Masatoshi Yoshikawa, Youngmin Eeh, Shuichi Tsubata, Toshihiko Nagase, Yutaka Hashimoto, Kazuya Sawada, Kazuhiro Tomioka, Kenichi Yoshino, Tadaaki Oikawa
  • Patent number: 10461245
    Abstract: According to one embodiment, a method of manufacturing a magnetic memory device, includes forming a stack film including a magnetic layer on an underlying area, forming a hard mask on the stack film, forming a stack structure by etching the stack film using the hard mask as a mask, forming a first protective insulating film on a side surface of the stack structure, and performing an oxidation treatment.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: October 29, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shuichi Tsubata, Masatoshi Yoshikawa, Satoshi Seto, Kazuhiro Tomioka
  • Patent number: 10381198
    Abstract: In one embodiment, a plasma processing apparatus includes: a chamber; an introducing part; a counter electrode; a high-frequency power source; and a plurality of low-frequency power sources. A substrate electrode is disposed in the chamber, a substrate is directly or indirectly placed on the substrate electrode, and the substrate electrode has a plurality of electrode element groups. The introducing part introduces process gas into the chamber. The high-frequency power source outputs a high-frequency voltage for ionizing the process gas to generate plasma. The plurality of low-frequency power sources apply a plurality of low-frequency voltages of 20 MHz or less with mutually different phases for introducing ions from the plasma, to each of the plurality of electrode element groups.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: August 13, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Akio Ui, Hisataka Hayashi, Kazuhiro Tomioka, Hiroshi Yamamoto, Tsubasa Imamura
  • Patent number: 10230042
    Abstract: A magnetoresistive effect element according to one embodiment includes: a first magnetic layer; a nonmagnetic layer; a second magnetic layer; a metal layer; and a third magnetic layer. An area of a bottom of the third magnetic layer is larger than an area of a top of the third magnetic layer. An angle between the top of the third magnetic layer and a side of the third magnetic layer is larger than an angle between a top of the second magnetic layer and a side of the second magnetic layer, or an angle between the bottom of the third magnetic layer and a side of the third magnetic layer is smaller than an angle between the bottom of the second magnetic layer and a side of the second magnetic layer.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: March 12, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masatoshi Yoshikawa, Hisanori Aikawa, Kazuhiro Tomioka, Shuichi Tsubata, Masaru Toko, Katsuya Nishiyama, Yutaka Hashimoto, Tatsuya Kishi
  • Patent number: 10193057
    Abstract: A magnetic memory device includes a stacked structure including a magnetic element, a protective insulating film covering the stacked structure, and an interface layer provided at an interface between the stacked structure and the protective insulating film. The interface layer contains a predetermined element which is not contained in the magnetic element or the protective insulating film.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: January 29, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masatoshi Yoshikawa, Hiroaki Yoda, Shuichi Tsubata, Kenji Noma, Tatsuya Kishi, Satoshi Seto, Kazuhiro Tomioka
  • Publication number: 20190006580
    Abstract: A method of manufacturing a magnetic memory device includes forming a stacked structure including a magnetic element, forming a metal film which covers the stacked structure, and forming a protective insulating film formed of a metallic oxide by oxidizing the metal film. A metal element contained in the metallic oxide is selected from yttrium (Y), aluminum (Al), magnesium (Mg), calcium (Ca), zirconium (Zr) and hafnium (Hf).
    Type: Application
    Filed: September 9, 2018
    Publication date: January 3, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Masatoshi YOSHIKAWA, Hiroaki YODA, Shuichi TSUBATA, Kenji NOMA, Tatsuya KISHI, Satoshi SETO, Kazuhiro TOMIOKA
  • Publication number: 20170263858
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a first magnetic layer, a second magnetic layer and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, and a sidewall insulating layer provided on a side surface of the stacked structure and containing boron (B).
    Type: Application
    Filed: September 16, 2016
    Publication date: September 14, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuyuki SONODA, Daisuke WATANABE, Masatoshi YOSHIKAWA, Youngmin EEH, Shuichi TSUBATA, Toshihiko NAGASE, Yutaka HASHIMOTO, Kazuya SAWADA, Kazuhiro TOMIOKA, Kenichi YOSHINO, Tadaaki OIKAWA
  • Publication number: 20170256705
    Abstract: A magnetoresistive effect element according to one embodiment includes: a first magnetic layer; a nonmagnetic layer; a second magnetic layer; a metal layer; and a third magnetic layer. An area of a bottom of the third magnetic layer is larger than an area of a top of the third magnetic layer. An angle between the top of the third magnetic layer and a side of the third magnetic layer is larger than an angle between a top of the second magnetic layer and a side of the second magnetic layer, or an angle between the bottom of the third magnetic layer and a side of the third magnetic layer is smaller than an angle between the bottom of the second magnetic layer and a side of the second magnetic layer.
    Type: Application
    Filed: September 9, 2016
    Publication date: September 7, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi YOSHIKAWA, Hisanori AIKAWA, Kazuhiro TOMIOKA, Shuichi TSUBATA, Masaru TOKO, Katsuya NISHIYAMA, Yutaka HASHIMOTO, Tatsuya KISHI
  • Patent number: 9698338
    Abstract: According to one embodiment, a method of manufacturing a magnetic memory device includes a stack structure formed of a plurality of layers including a magnetic layer, the method includes forming a lower structure film including at least one layer, etching the lower structure film to form a lower structure of the stack structure, forming an upper structure film including at least one layer on a region including the lower structure, and etching the upper structure film to form an upper structure of the stack structure on the lower structure.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: July 4, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi Yoshikawa, Satoshi Seto, Shuichi Tsubata, Kazuhiro Tomioka
  • Publication number: 20170169996
    Abstract: In one embodiment, a plasma processing apparatus includes: a chamber; an introducing part; a counter electrode; a high-frequency power source; and a plurality of low-frequency power sources. A substrate electrode is disposed in the chamber, a substrate is directly or indirectly placed on the substrate electrode, and the substrate electrode has a plurality of electrode element groups. The introducing part introduces process gas into the chamber. The high-frequency power source outputs a high-frequency voltage for ionizing the process gas to generate plasma. The plurality of low-frequency power sources apply a plurality of low-frequency voltages of 20 MHz or less with mutually different phases for introducing ions from the plasma, to each of the plurality of electrode element groups.
    Type: Application
    Filed: February 24, 2017
    Publication date: June 15, 2017
    Inventors: Akio UI, Hisataka HAYASHI, Kazuhiro TOMIOKA, Hiroshi YAMAMOTO, Tsubasa IMAMURA
  • Publication number: 20170117454
    Abstract: A magnetic memory device includes a stacked structure including a magnetic element, a protective insulating film covering the stacked structure, and an interface layer provided at an interface between the stacked structure and the protective insulating film. The interface layer contains a predetermined element which is not contained in the magnetic element or the protective insulating film.
    Type: Application
    Filed: January 6, 2017
    Publication date: April 27, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi YOSHIKAWA, Hiroaki YODA, Shuichi TSUBATA, Kenji NOMA, Tatsuya KISHI, Satoshi SETO, Kazuhiro TOMIOKA
  • Patent number: 9595663
    Abstract: According to one embodiment, a magnetic memory includes a transistor having first and second diffusion layers in a semiconductor substrate and a gate electrode between the first and second diffusion layers, a first insulating layer on the semiconductor substrate, the first insulating layer covering the transistor, a first contact plug in the first insulating layer, the first contact plug connected to the first diffusion layer, a second contact plug in the first insulating layer, the second contact plug connected to the second diffusion layer, a magnetoresistive element on the first insulating layer, the magnetoresistive element connected to the first contact plug, an electrode on the magnetoresistive element, and an impurity region in the first insulating layer, the second contact plug, and the electrode.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: March 14, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi Yoshikawa, Yasuyuki Sonoda, Satoshi Seto, Shuichi Tsubata, Kazuhiro Tomioka
  • Publication number: 20170069836
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a mask on a film provided on a substrate, selectively etching the film by applying an ion beam of an inert gas to the film after the forming of the mask, and applying an electron beam to the film after the etching.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 9, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kazuhiro TOMIOKA
  • Patent number: 9570671
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic element, a protective insulating film covering the stacked structure, and an interface layer provided at an interface between the stacked structure and the protective insulating film. The interface layer contains a predetermined element which is not contained in the magnetic element or the protective insulating film.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: February 14, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi Yoshikawa, Hiroaki Yoda, Shuichi Tsubata, Kenji Noma, Tatsuya Kishi, Satoshi Seto, Kazuhiro Tomioka
  • Patent number: 9508922
    Abstract: According to one embodiment, a magnetic memory device includes a first stack structure including a first magnetic layer, and a first nonmagnetic layer provided on the first magnetic layer, a second stack structure including a second magnetic layer provided on the first nonmagnetic layer, a second nonmagnetic layer provided on the second magnetic layer, and a top conductive layer provided on the second nonmagnetic layer, and a sidewall conductive layer provided on a sidewall of the second stack structure.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: November 29, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi Yoshikawa, Satoshi Seto, Shuichi Tsubata, Kazuhiro Tomioka