Patents by Inventor Kazuhiro Yoshikawa

Kazuhiro Yoshikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9190337
    Abstract: There is provided an etching method. A temperature at a plurality of predetermined positions on an upper surface of an Si substrate is measured during the etching processing. The etching processing includes supplying an etching solution to the upper surface of the Si substrate. An exothermic reaction occurs in the etching processing. The upper surface is heated or cooled depending on the measured value.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: November 17, 2015
    Assignee: TOHOKU UNIVERSITY
    Inventors: Takeshi Sakai, Tatsuro Yoshida, Kazuhiro Yoshikawa, Shigetoshi Sugawa
  • Publication number: 20150285321
    Abstract: A friction pad assembly for a disk brake, includes: a plurality of lining assemblies; a torque receiving plate which is fixed to a guide plate in which a constituent component accommodation space is formed; first and second link plates which are arranged to bridge over the plurality of lining assemblies; and fastening portions which are provided across the guide plate and the torque receiving plate, and which are disposed at least at each apex position of a triangle that surrounds a center of gravity of the lining assembly.
    Type: Application
    Filed: November 6, 2013
    Publication date: October 8, 2015
    Inventors: Toshifumi Maehara, Kazuhiro Yoshikawa, Yusuke Odanaka
  • Publication number: 20150250054
    Abstract: A printed wiring board includes an uppermost insulating layer, first pads positioned to mount an IC chip on the insulating layer, second pads positioned to mount a second printed wiring board on the insulating layer, metal posts formed on the second pads, respectively, such that the metal posts mount the second board over the chip, and a solder resist layer formed on the uppermost insulating layer and having first and second openings such that the first openings exposes the first pads and that the second openings exposes the second pads, respectively. The metal posts are formed such that each of the metal posts has a diameter which is smaller than a diameter of each of the second opening portions, and the second opening portions are formed such that the diameter of each of the second opening portions is smaller than a diameter of each of the second pads.
    Type: Application
    Filed: February 27, 2015
    Publication date: September 3, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kazuhiro YOSHIKAWA, Takashi KARIYA
  • Publication number: 20150140690
    Abstract: There is provided an etching method for a semiconductor product. The semiconductor product having, on a substrate, an SiO2 layer, and an Si layer with a free surface and directly stacked on the SiO2 layer is prepared. The Si layer is etched. Etching is performed while supplying an etching solution from a side of the free surface using high-concentration fluonitric acid as the etching solution, and etching is continued by switching to fluonitric acid having a concentration lower than that of the fluonitric acid immediately before or after at least part of a surface of the SiO2 layer immediately under the Si layer is exposed.
    Type: Application
    Filed: December 9, 2014
    Publication date: May 21, 2015
    Applicant: TOHOKU UNIVERSITY
    Inventors: Takeshi Sakai, Tatsuro Yoshida, Kazuhiro Yoshikawa, Shigetoshi Sugawa
  • Publication number: 20150137931
    Abstract: A printed wiring board includes an insulation layer having a first penetrating hole penetrating through the insulation layer, a magnetic core structure including a magnetic material filled in the first penetrating hole through the insulation layer such that the magnetic core structure including a first magnetic body layer formed in the first penetrating hole is formed through the insulation layer, and a conductor layer formed on the insulation layer and having an inductor pattern such that the inductor pattern is surrounding a circumference of the magnetic core structure. The magnetic core structure and the inductor pattern of the conductor layer form an inductor device.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 21, 2015
    Applicant: IBIDEN Co., Ltd.
    Inventors: Yasuhiko MANO, Kazuhiro YOSHIKAWA, Haruhiko MORITA
  • Publication number: 20150098204
    Abstract: A method for manufacturing a printed wiring board includes forming a resin layer on an interlayer layer such that the resin layer has first openings exposing circuits in central portion and second openings exposing circuits in peripheral portion of the interlayer layer, forming solder bumps on the circuits in the first openings, forming a plating resist over the bumps and resin layer such that the resist has openings having diameters greater than the second openings and exposing the second openings, forming a seed layer on the resist, in the openings and on the circuits through the second openings, applying electrolytic plating on the resist such that electrolytic plating fills the openings and forms a plated film on the resist and metal posts in the openings, etching the plating such that the plated film is removed and recesses are formed on end surfaces of the posts, and removing the resist.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kazuhiro YOSHIKAWA, Takashi Kariya
  • Publication number: 20150092356
    Abstract: A method for manufacturing a printed wiring board includes forming a removable layer over first pads in central portion of an interlayer insulation layer to mount IC chip, forming on the interlayer and removable layers a resin insulation layer having openings exposing second pads in peripheral portion of the interlayer layer to connect second substrate, forming a seed layer on the resin layer, in the openings and on the second pads, forming on the seed layer a plating resist having resist openings exposing the openings of the resin layer with diameters greater than the openings, filling the resist openings with electrolytic plating such that metal posts are formed in the resist openings, removing the resist, removing the seed layer exposed on the resin layer, and removing the removable layer and the resin layer on the removable layer such that cavity exposing the first pads is formed in the resin layer.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 2, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kazuhiro YOSHIKAWA, Takashi Kariya
  • Publication number: 20150092357
    Abstract: A method for manufacturing a printed wiring board includes forming a resin insulation layer on an interlayer resin insulation layer and conductive circuits such that the resin insulation layer has first openings exposing pad portions in central portion of the interlayer layer and second openings exposing pad portions in peripheral portion of the interlayer layer, forming a seed layer on the resin insulation layer, in the first and second openings and on the pad portions, forming on the seed layer a plating resist such that the resist has resist openings exposing the second openings and having diameters greater than the second openings, filling the resist openings with electrolytic plating material via the seed layer such that metal posts are formed in the resist openings, removing the resist from the resin insulation layer, and removing the seed layer exposed on the resin insulation layer by the removing of the resist.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 2, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kazuhiro YOSHIKAWA, Takashi KARIYA
  • Publication number: 20150077317
    Abstract: A matrix substrate includes: a pixel region (A); a first line (G) that is connected to the pixels arrayed in one direction in the pixel region (A); a second line (S) that is connected to the pixels arrayed in a direction different from the one direction; a terminal region (17a) in which a terminal for inputting a signal is arranged; and a left lead line (kS3, kS4) that goes around the left side of the pixel region (A) from a side of the pixel region (A) where the terminal region (17a) is provided and is led out to the opposite side, and a right lead line (kS1, kS2) that goes around the right side and is led out to the opposite side. The left lead line and the right lead line are connected to the first line (G) or the second line (S) via a collective region (D).
    Type: Application
    Filed: April 18, 2013
    Publication date: March 19, 2015
    Inventors: Masakazu Miyamoto, Toshiaki Fujihara, Kazuhiro Yoshikawa, Yoshihiro Asai
  • Publication number: 20150075927
    Abstract: A disk brake friction pad assembly includes lining assemblies which are oscillatably inserted into the guide hole portions of a guide plate to transmit a braking torque from plate engagement portions to the guide plate and are urged toward the guide plate by spring members, and a link plate for applying pressure from a torque receiving plate to the multiple lining assemblies and also for holding a clearance between the guide plate and torque receiving plate.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 19, 2015
    Inventor: Kazuhiro Yoshikawa
  • Patent number: 8973615
    Abstract: Rails 20 corresponding to lines A, B, C are provided in parallel on a bass plate 1, and coupling members 21, 22 are slidably mounted on each of the rails 20. Each of fluid controllers 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 is mounted generally on two of these coupling members 21, 22.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: March 10, 2015
    Assignees: Tokyo Electron Limited, CKD Corporation, Fujikin Incorporated
    Inventors: George Hoshi, Tsuneyuki Okabe, Kenichi Goshima, Hideo Kobayashi, Akinori Nagaya, Michio Yamaji, Kazuhiro Yoshikawa, Yuji Kawano
  • Publication number: 20150044492
    Abstract: An object of the present invention is to improve the laser drilling performance of a copper clad laminate whose black-oxide treated surface is used as a laser drilled surface. To achieve the object, a copper foil provided with a carrier foil comprising a layer structure of the carrier foil/the releasing layer/the bulk copper layer characterized in that metal element-containing particles are disposed between the releasing layer and the bulk copper layer is employed. If the present copper foil provided with a carrier foil is used, a black-oxide treated layer having a color tone excellent in the laser drilling performance can be formed on the surface of the bulk copper layer in the copper clad laminate manufactured.
    Type: Application
    Filed: February 27, 2013
    Publication date: February 12, 2015
    Applicant: MITSUI MINING & SMELTING CO., LTD.
    Inventor: Kazuhiro Yoshikawa
  • Publication number: 20150026975
    Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.
    Type: Application
    Filed: August 1, 2014
    Publication date: January 29, 2015
    Applicant: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Kazuhiro Yoshikawa, Daiki Komatsu, Ramesh Bhandari
  • Patent number: 8936137
    Abstract: Some of the components of a parking brake mechanism are incorporated between an inner side case and an outer side case, the two case and are combined by engaging lock holes and lock claws, and an inner side auxiliary assembly is formed. In this state, the diameter of circumscribed circle of the lock claws is configured to be smaller. Then, when the inner side auxiliary assembly is incorporated in the cylindrical space, the two lock claws are engaged with a lock concave which is formed on the inner peripheral surface of the cylindrical space by making the two lock claws protrude greatly from the outer peripheral surface of the inner side case.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: January 20, 2015
    Assignee: Akebono Brake Industry Co., Ltd.
    Inventors: Kazuhiro Yoshikawa, Shinichi Yamadera
  • Patent number: 8923008
    Abstract: A circuit board includes an insulation layer having a first surface and a second surface on the opposite side of the first surface, an electronic component positioned in the insulation layer and having a terminal, a conductive pattern formed on the second surface of the insulation layer and electrically connected to the terminal, and an insulative film formed on the second surface of the insulation layer and on the conductive pattern. The terminal of the electronic component has a protruding portion which protrudes from the second surface of the insulation layer.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: December 30, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Kazuhiro Yoshikawa, Toshiki Furutani
  • Publication number: 20140256065
    Abstract: There is provided an etching method. A temperature at a plurality of predetermined positions on an upper surface of an Si substrate is measured during the etching processing. The etching processing includes supplying an etching solution to the upper surface of the Si substrate. An exothermic reaction occurs in the etching processing. The upper surface is heated or cooled depending on the measured value.
    Type: Application
    Filed: May 20, 2014
    Publication date: September 11, 2014
    Applicant: Tohoku University
    Inventors: Takeshi Sakai, Tatsuro Yoshida, Kazuhiro Yoshikawa, Shigetoshi Sugawa
  • Patent number: 8829355
    Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: September 9, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Kazuhiro Yoshikawa, Daiki Komatsu, Ramesh Bhandari
  • Publication number: 20140225701
    Abstract: A printed wiring board includes a first core substrate having an opening portion, an inductor component accommodated in the opening portion of the first core substrate, a first buildup layer formed on a first surface of the first core substrate and the inductor component, and a second buildup layer formed on a second surface of the first core substrate and the inductor component on the opposite side with respect to the first surface of the first core substrate. The inductor component has a second core substrate, a buildup layer formed on a surface of the second core substrate and a coil layer formed on the buildup layer, and the second buildup layer has a coil layer and a via conductor connecting the coil layer in the second buildup layer and the coil layer formed on the buildup layer in the inductor component.
    Type: Application
    Filed: February 12, 2014
    Publication date: August 14, 2014
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Yasuhiko Mano, Kazuhiro Yoshikawa
  • Patent number: 8784921
    Abstract: As a method for an efficient concentration of lipid components from food materials, a method for concentrating lipids contained in a crustacean, which comprises heating squeezed liquid prepared by squeezing the whole crustacean or a part thereof and separating the heated squeezed liquid into solids containing lipid components and liquid containing water-soluble components. Those are useful as the method by which lipids abundantly containing the phospholipid are prepared easily and at a low cost. Furthermore, the solids containing the lipids prepared by said method or a dried product thereof, lipids extracted therefrom and a composition abundantly containing the useful lipids derived from crustaceans are useful as materials for pharmaceuticals, ingredients for foods or feed, etc.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: July 22, 2014
    Assignee: Nippon Suisan Kaisha, Ltd.
    Inventor: Kazuhiro Yoshikawa
  • Patent number: 8772646
    Abstract: A method for manufacturing a printed wiring board includes preparing a metal sheet having metal members and connectors joining the metal members, forming a structure having core substrates which are connected through the connectors and which have insulation structure portions covering the metal members, respectively, cutting the connectors in the structure such that an independent core substrate having a recessed portion is formed and a respective one of the connectors is removed from the independent core substrate, and covering the recess portion of the independent core substrate with a resin. The covering of the recess portion includes either forming an interlayer insulation layer on a surface of the independent core substrate or forming interlayer insulation layers on opposing surfaces of the independent core substrate.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: July 8, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Kazuyuki Ueda, Takema Adachi, Kazuhiro Yoshikawa