Abstract: A semiconductor memory device preventing inconsistent busy states between a plurality of memory chips is provided. A semiconductor memory device includes a master chip and at least one slave chip. The master chip and the slave chip include a status register capable of storing protection information. When a write-protect (WP) commend for locking the protection information of the status register is input, the protection information and lock information are programmed in a memory array. At this time, programming is controlled in a manner that a programming time in a selected memory chip is longer than a programming time in an unselected memory chip.

Abstract: To provide a vehicle front body structure including a side sill that extends in a vehicle front-rear direction and is located behind a position where a front wheel is disposed and a torque box extending from a front end of the side sill toward an inside in a vehicle width direction. In the vehicle front body structure, the torque box includes an upper surface portion disposed at a substantially same height as an upper surface of the side sill and a lower surface portion disposed at a substantially same height as a lower surface of the side sill. A reinforcing member is provided in an internal space surrounded by the upper surface portion and the lower surface portion of the torque box.

Abstract: A front body structure of the vehicle includes a pair of left and right rear joint members that join front side frames and the sub-frame in a vehicle up-down direction in substantially the same positions in a vehicle front-rear direction as rear reinforcing parts of the suspension housings, and third link members that separate internal spaces of the front side frames in substantially the same positions in the vehicle front-rear direction as the upper ends of rear joint members. The front body structure further includes a tower bar that joins a cowl box and the rear reinforcing parts of the suspension housings.

Abstract: A front body structure of the vehicle has a pair of left and right suspension housings provided in desired positions separated from the dash panel toward the vehicle front side. The front body structure of the vehicle further includes a first ring-shaped structural frame that passes through shroud members and is substantially ring-shaped in front view, a second ring-shaped structural frame that passes through the suspension housings and is substantially ring-shaped in front view, and a third ring-shaped structural frame that passes through hinge pillars and is substantially ring-shaped in front view, in which these ring-shaped structural frames are joined to each other by apron reinforcements, front side frames, and side members of the sub-frame.

Abstract: A semiconductor storage device with a smaller chip size than prior art and a readout method are provided. The semiconductor storage device includes a memory cell array; a page buffer/sense circuit having a sensing node for sensing readout data from a selected page of the memory cell array and a latch circuit for holding data sensed by the sensing node; and a controller controls operations on the memory cell array. The sensing node includes an NMOS capacitor.

Abstract: In a driving device for driving a plurality of semiconductor switches connected in parallel to each other, a charge side conduction element is disposed in a charge side loop path including a conduction control terminal and a low-potential side conduction terminal of one of the semiconductor switches, and enables a charging current to flow in a conductive state. A discharge side conduction element is disposed in a discharge side loop path including the conduction control terminal and the low-potential side conduction terminal, and enables a discharging current to flow in a conductive state. A voltage detection unit is connected to a current output terminal of at least one of the charge side conduction element and the discharge side conduction element. A resistive element is connected in parallel to at least one of the charge side conduction element and the discharge side conduction element.

Abstract: An information processing device according to the application concerned includes a generating unit and a providing unit. The generating unit generates a rating function for each node of a second-type graph which is generated from a first-type graph in which predetermined elements are treated as nodes and the relationships among the elements are treated as links, and which indicates a futuristic state of the first-type graph. The providing unit provides the information related to the second-type graph based on the rating function for the each node as generated by the generating unit.

Abstract: A front vehicle-body structure of a vehicle, comprising a dash panel, a pair of right-and-left hinge pillars, a suspension tower, and a heat-insulating inner upper portion connecting the suspension tower and the dash panel, wherein the dash panel comprises a dash panel body, a dash cross member interconnecting respective lower portions of the hinge pillars, and a dash-panel reinforcing member joined to a portion which is positioned above the dash cross member, the heat-insulating inner upper portion is connected to the dash panel body via the dash-panel reinforcing member, and the dash-panel reinforcing member comprises a leg portion which connects the heat-insulating inner upper portion and the dash cross member and a bridge portion which interconnects respective rear ends of the heat-insulating inner upper portions.

Abstract: A front vehicle-body structure of a vehicle comprises a dash panel, a pair of right-and-left hinge pillars, and a suspension tower, wherein the dash panel comprises a dash panel body which constitutes a partition wall positioned at a front side of a cabin portion and a dash cross member which is joined to a front face of a lower portion of the dash panel body and interconnects respective lower portions of the right-and-left hinge pillars in a vehicle width direction, and there are provided a pair of right-and-left heat-insulating inner lower portion, each of which connects the suspension tower and the dash cross member.

Abstract: A front vehicle-body structure of a vehicle, comprising a dash panel constituting a partition wall which is positioned at a front side of a cabin portion of the vehicle, a pair of right-and-left hinge pillars connected to both ends of the dash panel and extending in a vehicle vertical direction, an instrument panel member interconnecting the hinge pillars in a vehicle width direction in the cabin portion, a suspension tower provided to be spaced forwardly apart from the dash panel and supporting an upper end of a front suspension damper, a heat-insulating inner upper portion connecting the suspension tower and the dash panel, and an instrument-panel connecting member connecting a portion of the dash panel which is positioned in the vicinity of a rear end of the heat-insulating inner upper portion and the instrument panel member.

Abstract: A semiconductor memory device is provided to keep data reliability while decreasing programming time. A NAND flash memory loads programming data from an external input/output terminal to a page buffer/sense circuit. A detecting circuit for monitoring the programming data detects whether the programming data is a specific bit string. If it is detected that the programming data is not a specific bit string, a transferring/writing circuit transfers the programming data kept by the page buffer/sense circuit to an error checking correction (ECC) circuit, and an ECC code generated by an ECC operation is written to the page buffer/sense circuit. If it is detected that the programming data is a specific bit string, transfer of the programming data kept by the page buffer/sense circuit is forbidden and a known ECC code corresponding to the specific bit string is written to the page buffer/sense circuit.

Abstract: A semiconductor memory device which is able to perform a power sequence with high reliability is provided. When a power from an external device is supplied, the controller of the flash memory of the invention is configured to read codes stored in a read-only memory in synchronization with a clock signal to perform a power-on sequence. In addition, the controller is further configured to deactivate the clock signal so as to pause the power-on sequence when it has been detected during the power-on sequence that the voltage of the power is not greater than a threshold, and to activate the clock signal to resume the power-on sequence when it is detected that the voltage of the supplied power exceeds the threshold again.

Abstract: A semiconductor memory device preventing inconsistent busy states between a plurality of memory chips is provided. A semiconductor memory device of the disclosure includes a master chip and at least one slave chip. The master chip and the slave chip include a status register capable of storing protection information. When a write-protect (WP) commend for locking the protection information of the status register is input, the protection information and lock information are programmed in a memory array. At this time, programming is controlled in a manner that a programming time in a selected memory chip is longer than a programming time in an unselected memory chip.

Abstract: The disclosure prevents inconsistencies in a busy state between a master side memory chip and a slave side memory chip during a reset operation. A flash memory device (100) of the disclosure includes a master side memory chip (200) and at least one slave side memory chip (300). A controller (230) of the master side memory chip (200) selects the master side memory chip or the slave side memory chip based on an externally inputted address, and performs a reset of the selected memory chip when a reset command is inputted. The data read from a specific area of a memory cell array of the master side memory chip is set in a register. The controller (230) controls a readout of the reset in a manner that time required for setting the data of the register is longer than time required for the reset of the selected memory chip.

Abstract: A semiconductor storage device with a smaller chip size than prior art and a readout method are provided. The semiconductor storage device includes a memory cell array; a page buffer/sense circuit having a sensing node for sensing readout data from a selected page of the memory cell array and a latch circuit for holding data sensed by the sensing node; and a controller controls operations on the memory cell array. The sensing node includes an NMOS capacitor.

Abstract: A front vehicle-body structure of a vehicle comprises a front frame which extends in a longitudinal direction, an apron reinforcement which is positioned above and on an outward side, in a vehicle width direction, of the front frame and extends in the longitudinal direction, and a suspension housing which is provided to be laid between the front frame and the apron reinforcement and accommodating a suspension therein, wherein the suspension housing includes a narrow-width portion which has the narrowest width in the longitudinal direction in an upper view, and a suspension tower portion where a damper member of the suspension is attached is formed at a portion of the suspension housing which includes the narrow-width portion.

Abstract: The invention provides a semiconductor memory device and a reading method thereof, which are capable of suppressing a peak current when pre-charging a bit line are provided. The reading method of a flash memory of the present invention includes steps of: pre-charging a selected bit line; and reading a voltage or a current of the pre-charged selected bit line. The step of pre-charging is performed by pre-charging a sense node SNS to Vcc?Vth at a time t1, pre-charging a node TOBL to VCLAMP2 at a time t2, pre-charging the node TOBL to VCLAMP1 at a time t5, and pre-charging the sense node SNS to Vcc at a time t6.

Abstract: The invention provides a semiconductor memory device capable of maintaining data reliability and shortening programming time. A flash memory of the invention includes a memory array 100, a page buffer/sensor circuit 160, an input/output buffer 110 connected to an external input/output terminal, and an ECC circuit 120 for checking and correcting data errors. In a programming operation, the input/output buffer 110 loads programming data into the page buffer/sensor circuit 160 and the ECC circuit 120 in parallel. The ECC circuit 120 writes parity bits generated from ECC calculation into a spare domain of the page buffer/sensor circuit 160. After the ECC procedure, the data held by the page buffer/sensor circuit 160 are programmed to a selected page.

Abstract: To provide a vehicle front body structure including a side sill that extends in a vehicle front-rear direction and is located behind a position where a front wheel is disposed and a torque box extending from a front end of the side sill toward an inside in a vehicle width direction. In the vehicle front body structure, the torque box includes an upper surface portion disposed at a substantially same height as an upper surface of the side sill and a lower surface portion disposed at a substantially same height as a lower surface of the side sill. A reinforcing member is provided in an internal space surrounded by the upper surface portion and the lower surface portion of the torque box.

Abstract: A semiconductor memory device, an erasing method and a programming method are provided. The semiconductor memory device includes a memory array, which includes a plurality of NAND strings; a page buffer/sensing circuit, which is connected to the NAND strings of the memory array through bit lines and outputs whether the NAND strings include failures; and a detecting circuit, which is connected to the plurality of page buffer/sensing circuits and detects a number of the failures among the NAND strings of a selected block. The block is determined to be usable when the number of the failures among the NAND strings detected by the detecting circuit is less than or equal to a fixed number, and the block is determined to be unusable as a bad block when the number of the failures exceeds the fixed number.