Patents by Inventor Kazuki Yamauchi

Kazuki Yamauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7679968
    Abstract: Structures, methods, and systems for enhanced erasing operation for non-volatile memory are disclosed. In one embodiment, a semiconductor device which comprises a memory cell array having a plurality of non-volatile memory cells, a negative voltage generating circuit for applying a negative voltage to a word line of the memory cell array during an erasing operation of the memory cell array, and a positive voltage generating circuit for applying a positive voltage to a well of the memory cell array when the negative voltage reaches a predetermined voltage.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: March 16, 2010
    Assignee: Spansion LLC
    Inventors: Kazuki Yamauchi, Junya Kawamata, Tsutomu Nakai, Kenji Arai, Hirokazu Nagashima, Kenichi Takehana
  • Publication number: 20090010076
    Abstract: A semiconductor device has a plurality of bit lines BL provided in a memory cell area 101, a plurality of word lines WL provided crossing the plurality of bit lines BL, a plurality of diffusion source lines VSL provided along the plurality of word lines WL, a plurality of non-volatile active cells AC storing data, the plurality of non-volatile active cells AC being provided at cross sections of the plurality of bit lines BL and the plurality of word lines WL and being connected to the plurality of bit lines BL, the plurality of word lines WL, and the plurality of diffusion source lines VSL, and a controller simultaneously writes or reads data to and from at least two active cells AC among the plurality of active cells AC, in which the number of the plurality of active cells AC is less than that of the cross sections.
    Type: Application
    Filed: May 30, 2008
    Publication date: January 8, 2009
    Applicant: SPANSION LLC
    Inventors: Junya Kawamata, Tsutomu Nakai, Hirokazu Nagashima, Kenichi Takehana, Kenji Arai, Kazuki Yamauchi, Kazuhide Kurosaki
  • Publication number: 20080320208
    Abstract: A semiconductor device includes a first nonvolatile storage area including a plurality of sectors, a second nonvolatile storage area, a third nonvolatile storage area located in the first nonvolatile storage area, a fourth nonvolatile storage area located in the second nonvolatile storage area, and a control portion selecting one of a first mode and a second mode. In first mode, sectors where the third nonvolatile storage area is not located in the first nonvolatile storage area are used as a main storage area, and the second nonvolatile storage area is used to store a program or data that is read before the first nonvolatile storage area is accessed, the third nonvolatile storage area being used to store control information that controls writing, reading, and erasing of data involved in the first nonvolatile storage area or the second nonvolatile storage area.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 25, 2008
    Applicant: SPANSION LLC
    Inventors: Hirokazu Nagashima, Kazuki Yamauchi, Junya Kawamata, Tsutomu Nakai, Kenji Arai, Kenichi Takehana
  • Publication number: 20080298136
    Abstract: Structures, methods, and systems for enhanced erasing operation for non-volatile memory are disclosed. In one embodiment, a semiconductor device which comprises a memory cell array having a plurality of non-volatile memory cells, a negative voltage generating circuit for applying a negative voltage to a word line of the memory cell array during an erasing operation of the memory cell array, and a positive voltage generating circuit for applying a positive voltage to a well of the memory cell array when the negative voltage reaches a predetermined voltage.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 4, 2008
    Inventors: Kazuki Yamauchi, Junya Kawamata, Tsutomu Nakai, Kenji Arai, Hirokazu Nagashima, Kenichi Takehana
  • Patent number: 6129961
    Abstract: A polyester resin comprising a polyester resin chip (A) and a polyester resin fine particle (B) which has the same composition as the (A) and which passes through a 10.5 mesh screen in a proportion of 0.1-300 ppm, wherein a cyclic trimer increases in a proportion of not more than 0.30 wt % upon melting at a temperature of 290.degree. C. for 60 minutes; a polyester resin characterized in that a cyclic trimer increases in a proportion of not more than 0.30 wt % upon melting at a temperature of 290.degree. C. for 60 minutes, and the contents of Na, Ca, Mg and/or Si in the polyeser resin is 0.001-5 ppm and the total of these contents is not more than 10 ppm; and production methods thereof.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: October 10, 2000
    Assignee: Toyo Boseki Kabushiki Kaisha
    Inventors: Hirotoshi Sonoda, Atsushi Hara, Mitsuhiro Harada, Yoshio Araki, Shouji Kikuchi, Takashi Hashimoto, Keisuke Suzuki, Hitoshi Furusaki, Kazuki Yamauchi, Yoshinao Matsui, Osamu Kimura, Yoshitaka Eto
  • Patent number: 4949283
    Abstract: A manually sweepable printer stores data transferred from a data forming apparatus such as a wordprocessor in a memory. The printer is placed on printing paper and manually swept to sequentially print the data stored in the memory. The manually sweepable printer separately receives printing data and print control data from the data forming apparatus and separately stores the received data. In the printing operation, the printing data is printed on the basis of the print control data.
    Type: Grant
    Filed: December 15, 1989
    Date of Patent: August 14, 1990
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kazuki Yamauchi, Atsushi Sagisaka, Nobuyuki Mochinaga
  • Patent number: 4915027
    Abstract: A manually operable sweeping-type compact printer apparatus includes a key entry unit, a display unit, a memory unit, an encoder and a printer unit which are mounted on a manually manipulatable housing. When the housing is manually moved over a printing medium with the printer unit in contact with the printing medium, data entered by the key entry unit is printed out on the printing medium. In the printer apparatus, only designated segments or lengths of data are printed out on the printing medium, independent of continued travel or movement of the housing. Also, even if the housing is moved over the printing medium at an unstable moving velocity, high printing quality can be realized by control of the printing head. Stop codes designating the end of a data segment can be automatically or manually inserted.
    Type: Grant
    Filed: March 21, 1988
    Date of Patent: April 10, 1990
    Assignee: Casio Computer Co., Ltd.
    Inventors: Norio Ishibashi, Kazuki Yamauchi, Satoshi Aso, Atsushi Sagisaka
  • Patent number: 4862281
    Abstract: A manual sweeping apparatus comprising a housing, rollers which can rotate in contact with an original or a sheet of paper, an image sensor, a printer, memories, and a key-input section. When the housing is swept across an original, with the rollers kept in contact with the original, the image sensor reads the image information from the original. The image information is stored in one of the memories. Character data is input by operating the key-input section, and is stored in another one of the memories. Thereafter, when the housing is swept across a sheet of paper, with the rollers kept in contact with the paper, both the image data and the character data are printed, in a combined form, on the sheet of paper.
    Type: Grant
    Filed: December 15, 1987
    Date of Patent: August 29, 1989
    Assignee: Casio Computer Co., Ltd.
    Inventors: Takashi Sato, Kazuki Yamauchi, Norio Ishibashi