Patents by Inventor Kazunori Hagimoto
Kazunori Hagimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240371628Abstract: A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor is formed on a substrate for film formation includes: (1) subjecting a substrate for film formation made of single-crystal silicon to heat treatment under a nitrogen atmosphere to form a silicon nitride film on the substrate for film formation, (2) growing an AlN film on the silicon nitride film, and (3) growing a GaN film, an AlGaN film, or both on the AlN film. A method for manufacturing a nitride semiconductor substrate can prevent diffusion of Al to the high-resistance single-crystal silicon substrate when the AlN layer is epitaxially grown on the high-resistance single-crystal silicon substrate, and the GaN or the AlGaN layer is epitaxially grown on top of that.Type: ApplicationFiled: August 18, 2022Publication date: November 7, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori HAGIMOTO, Ippei KUBONO
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Publication number: 20240355620Abstract: A nitride semiconductor substrate includes: a silicon single-crystal substrate; and a nitride semiconductor thin film formed on the silicon single-crystal substrate, wherein the silicon single-crystal substrate has a carbon concentration of 5E16 atoms/cm3 or more and 2E17 atoms/cm3 or less. This provides a nitride semiconductor substrate resistant against plastic deformation and a manufacturing method therefor.Type: ApplicationFiled: October 25, 2022Publication date: October 24, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTDInventors: Ippei KUBONO, Keitaro TSUCHIYA, Kazunori HAGIMOTO, Keisuke MIHARA, Kosei SUGAWARA
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Publication number: 20240321576Abstract: A nitride semiconductor substrate including: a composite substrate with multiple layers stacked, a silicon oxide layer or a TEOS layer having a central flat surface and a side surface around the flat surface and stacked on the composite substrate; a single crystal silicon layer stacked on the silicon oxide layer or the TEOS layer, and a nitride semiconductor thin film deposited on the single crystal silicon layer, wherein the entire central flat surface of the silicon oxide layer or the TEOS layer is covered with the single crystal silicon layer.Type: ApplicationFiled: July 19, 2022Publication date: September 26, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori HAGIMOTO, Ippei KUBONO
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Publication number: 20240313086Abstract: The present invention is a substrate for a semiconductor device, including: a high-resistant silicon single crystal substrate having a resistivity of 100 ?·cm or more; a first buffer layer composed of an AlN layer and formed on the high-resistant silicon single crystal substrate; and a nitride semiconductor layer provided on the first buffer layer, wherein there is no low-resistivity portion on a top surface of the high-resistant silicon single crystal substrate, the low-resistivity portion having a resistivity relatively lower than the resistivity of an entirety of the high-resistant silicon single crystal substrate. This provides: a substrate for a semiconductor device that can impart good electric characteristics to a device; and a simple method for manufacturing such a substrate.Type: ApplicationFiled: June 27, 2022Publication date: September 19, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Kazunori HAGIMOTO
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Publication number: 20240297224Abstract: A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers is bonded, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.Type: ApplicationFiled: January 17, 2022Publication date: September 5, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ippei KUBONO, Kazunori HAGIMOTO, Masaru SHINOMIYA
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Publication number: 20240274452Abstract: A wafer marking method uses a laser for performing a laser marking on a defect region of a nitride semiconductor substrate in which a nitride semiconductor layer contains at least a GaN layer formed by epitaxial growth on a single-crystal silicon substrate. The method includes that a surface of the GaN layer and a surface of the single-crystal silicon substrate are performed laser marking simultaneously by irradiating the defect region with a laser of a wavelength within ±10% of 365 nm, having a wavelength corresponding to a band gap energy of GaN.Type: ApplicationFiled: May 30, 2022Publication date: August 15, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori HAGIMOTO, Shouzaburo GOTO
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Publication number: 20240162041Abstract: A method for producing a nitride semiconductor wafer by forming a nitride semiconductor film on a silicon single-crystal substrate, including the steps of forming the nitride semiconductor film on the silicon single-crystal substrate and irradiating the silicon single-crystal substrate with electron beams with an irradiation dose of 1×1014/cm2 or more. A method produces a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate, and in which a loss and a second harmonic characteristic due to the substrate are improved.Type: ApplicationFiled: March 16, 2022Publication date: May 16, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori HAGIMOTO, Junya ISHIZAKI, Tsuyoshi OHTSUKI
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Publication number: 20240079412Abstract: A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed above a supporting substrate via an insulative layer, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.Type: ApplicationFiled: January 17, 2022Publication date: March 7, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ippei KUBONO, Keitaro TSUCHIYA, Kazunori HAGIMOTO, Masaru SHINOMIYA
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Publication number: 20230279581Abstract: A method for producing a nitride semiconductor wafer, in which a nitride semiconductor thin film is grown on a silicon single crystal substrate by vapor phase growth, includes, by using a silicon single crystal substrate having a resistivity of 1000 ?·cm or more, an oxygen concentration of less than 1×1017 atoms/cm3 and a thickness of 1000 ?m or more, growing the nitride semiconductor thin film on the silicon single crystal substrate by vapor phase growth. As a result, a method produces a nitride semiconductor wafer in which plastic deformation and warpage are suppressed even in the case of a high-resistivity, ultra-low oxygen concentration silicon single crystal substrate, which is promising as a support substrate for high frequency devices.Type: ApplicationFiled: April 8, 2021Publication date: September 7, 2023Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Keitaro TSUCHIYA, Masaru SHINOMIYA, Kazunori HAGIMOTO, Ippei KUBONO
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Patent number: 11705330Abstract: A substrate for an electronic device, including a nitride semiconductor film formed on a joined substrate including a silicon single crystal, where the joined substrate has a plurality of silicon single crystal substrates that are joined and has a thickness of more than 2000 ?m, and the plurality of silicon single crystal substrates are produced by a CZ method and have a resistivity of 0.1 ?cm or lower. This provides: a substrate for an electronic device having a nitride semiconductor film formed on a silicon substrate, where the substrate for an electronic device can suppress a warp and can also be used for a product with a high breakdown voltage; and a method for producing the same.Type: GrantFiled: April 30, 2020Date of Patent: July 18, 2023Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori Hagimoto, Shouzaburo Goto
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Publication number: 20220367188Abstract: The present invention is a substrate for an electronic device, including a nitride semiconductor film formed on a joined substrate including a silicon single crystal, where the joined substrate has at least a bond wafer including a silicon single crystal joined on a base wafer including a silicon single crystal, the base wafer includes CZ silicon having a resistivity of 0.1 ?cm or lower and a crystal orientation of <100>, and the bond wafer has a crystal orientation of <111>. This provides a substrate for an electronic device, having a suppressed warp.Type: ApplicationFiled: July 2, 2020Publication date: November 17, 2022Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori HAGIMOTO, Shouzaburo GOTO
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Publication number: 20220238326Abstract: A substrate for an electronic device, including a nitride semiconductor film formed on a joined substrate including a silicon single crystal, where the joined substrate has a plurality of silicon single crystal substrates that are joined and has a thickness of more than 2000 ?m, and the plurality of silicon single crystal substrates are produced by a CZ method and have a resistivity of 0.1 ?cm or lower. This provides: a substrate for an electronic device having a nitride semiconductor film formed on a silicon substrate, where the substrate for an electronic device can suppress a warp and can also be used for a product with a high breakdown voltage; and a method for producing the same.Type: ApplicationFiled: April 30, 2020Publication date: July 28, 2022Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori HAGIMOTO, Shouzaburo GOTO
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Publication number: 20210358738Abstract: A method for manufacturing an epitaxial wafer including the steps of: preparing a silicon-based substrate having a chamfered portion in a peripheral portion; forming an annular trench in the chamfered portion of the silicon-based substrate along an internal periphery of the chamfered portion; and performing an epitaxial growth on the silicon-based substrate having the trench formed. This provides a method for manufacturing an epitaxial wafer by which a crack generated in a peripheral chamfered portion can be suppressed from extending towards the center.Type: ApplicationFiled: September 6, 2019Publication date: November 18, 2021Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Keitarou TSUCHIYA, Kazunori HAGIMOTO, Masaru SHINOMIYA
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Patent number: 10833184Abstract: A semiconductor device substrate including: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; and a device active layer which is formed of a nitride semiconductor layer provided on the buffer layer, the semiconductor device substrate in that the buffer layer includes: a first region which contains carbon and iron; a second region which is provided on the first region and has average concentration of iron lower than that in the first region and average concentration of carbon higher than that in the first region, and the average concentration of the carbon in the second region is lower than the average concentration of the iron in the first region. The semiconductor device substrate which can suppress a transverse leak current in a high-temperature operation of a device while suppressing a longitudinal leak current and can inhibit a current collapse phenomenon is provided.Type: GrantFiled: February 24, 2017Date of Patent: November 10, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken Sato, Hiroshi Shikauchi, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Patent number: 10586701Abstract: Semiconductor base including: silicon-based substrate; buffer layer including first and second layers alternately on silicon-based substrate, first layer made of nitride-based compound semiconductor containing first material, second layer made of nitride-based compound semiconductor containing second material having larger lattice constant than first material; channel layer on buffer layer and made of nitride-based compound semiconductor containing second material, buffer layer has: first composition graded layer between at least one of first layers and second layer immediately thereabove, made of nitride-based compound semiconductor whose composition ratio of second material is increased gradually upward, whose composition ratio of first material is decreased gradually upward; second composition graded layer between at least one of second layers and first layer immediately thereabove, made of nitride-based compound semiconductor whose first material is increased gradually upward, whose composition ratio of sType: GrantFiled: February 26, 2016Date of Patent: March 10, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi Shikauchi, Ken Sato, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Patent number: 10553674Abstract: A substrate for semiconductor device includes a substrate, a buffer layer which is provided on the substrate and made of a nitride semiconductor, and a device active layer which is provided on the buffer layer and composed of a nitride semiconductor layer, wherein the buffer layer contains carbon and iron, a carbon concentration of an upper surface of the buffer layer is higher than a carbon concentration of a lower surface of the buffer layer, and an iron concentration of the upper surface of the buffer layer is lower than an iron concentration of the lower surface of the buffer layer. As a result, the substrate for semiconductor device can reduce a leak current in a lateral direction at the time of a high-temperature operation while suppressing a leak current in a longitudinal direction.Type: GrantFiled: June 17, 2016Date of Patent: February 4, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken Sato, Hiroshi Shikauchi, Hirokazu Goto, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Patent number: 10529842Abstract: A semiconductor base substance includes: a substrate; a buffer layer which is made of a nitride semiconductor and provided on the substrate; and a channel layer which is made of a nitride semiconductor and provided on the buffer layer, wherein the buffer layer includes: a first region which is provided on the substrate side and has boron concentration higher than acceptor element concentration; and a second region which is provided on the first region, and has boron concentration lower than that in the first region and acceptor element concentration higher than that in the first region. As a result, the semiconductor base substance which can obtain a high pit suppression effect while maintaining a high longitudinal breakdown voltage is provided.Type: GrantFiled: August 29, 2016Date of Patent: January 7, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi Shikauchi, Ken Sato, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Publication number: 20190214492Abstract: A semiconductor device substrate including: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; and a device active layer which is formed of a nitride semiconductor layer provided on the buffer layer, the semiconductor device substrate in that the buffer layer includes: a first region which contains carbon and iron; a second region which is provided on the first region and has average concentration of iron lower than that in the first region and average concentration of carbon higher than that in the first region, and the average concentration of the carbon in the second region is lower than the average concentration of the iron in the first region. The semiconductor device substrate which can suppress a transverse leak current in a high-temperature operation of a device while suppressing a longitudinal leak current and can inhibit a current collapse phenomenon is provided.Type: ApplicationFiled: February 24, 2017Publication date: July 11, 2019Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken SATO, Hiroshi SHIKAUCHI, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO
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Patent number: 10319587Abstract: A method of manufacturing an epitaxial wafer having an epitaxial layer on a silicon-based substrate, the method of manufacturing the epitaxial wafer including epitaxially growing a semiconductor layer on the silicon-based substrate after applying terrace processing to an outer peripheral portion of the silicon-based substrate. As a result, the method of manufacturing the epitaxial wafer having the epitaxial layer on the silicon-based substrate in which an epitaxial wafer which is completely free from cracks can be obtained, is provided.Type: GrantFiled: February 10, 2015Date of Patent: June 11, 2019Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi, Shoichi Kobayashi, Hirotaka Kurimoto
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Publication number: 20190051515Abstract: Semiconductor base including: silicon-based substrate; buffer layer including first and second layers alternately on silicon-based substrate, first layer made of nitride-based compound semiconductor containing first material, second layer made of nitride-based compound semiconductor containing second material having larger lattice constant than first material; channel layer on buffer layer and made of nitride-based compound semiconductor containing second material, buffer layer has: first composition graded layer between at least one of first layers and second layer immediately thereabove, made of nitride-based compound semiconductor whose composition ratio of second material is increased gradually upward, whose composition ratio of first material is decreased gradually upward; second composition graded layer between at least one of second layers and first layer immediately thereabove, made of nitride-based compound semiconductor whose first material is increased gradually upward, whose composition ratio of sType: ApplicationFiled: February 26, 2016Publication date: February 14, 2019Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi SHIKAUCHI, Ken SATO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO