Patents by Inventor Kazuo Kishida
Kazuo Kishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10638603Abstract: A multilayer ceramic substrate according to the present invention includes a plurality of base layers that are laminated containing a low-temperature co-fired ceramic material, a plurality of first constraint layers which contain a metal oxide not completely sintered at the sintering temperature of the low-temperature co-fired ceramic material and which are located between the base layers, and a protective layer which contains the metal oxide and which is in contact with an outermost base layer of the plurality of base layers in the lamination direction, and wherein X1>X2, where X1 is a content of the metal oxide in a surface section of the protective layer and X2 is a content of the metal oxide in a boundary section of the protective layer that is in contact with the outermost base layer.Type: GrantFiled: October 9, 2019Date of Patent: April 28, 2020Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takahiro Oka, Yoshitake Yamagami, Yuki Takemori, Kazuo Kishida, Hiromichi Kawakami
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Publication number: 20200045811Abstract: A multilayer ceramic substrate according to the present invention includes a plurality of base layers that are laminated containing a low-temperature co-fired ceramic material, a plurality of first constraint layers which contain a metal oxide not completely sintered at the sintering temperature of the low-temperature co-fired ceramic material and which are located between the base layers, and a protective layer which contains the metal oxide and which is in contact with an outermost base layer of the plurality of base layers in the lamination direction, and wherein X1>X2, where X1 is a content of the metal oxide in a surface section of the protective layer and X2 is a content of the metal oxide in a boundary section of the protective layer that is in contact with the outermost base layer.Type: ApplicationFiled: October 9, 2019Publication date: February 6, 2020Inventors: Takahiro Oka, Yoshitake Yamagami, Yuki Takemori, Kazuo Kishida, Hiromichi Kawakami
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Patent number: 10485099Abstract: A multilayer ceramic substrate according to the present invention includes a plurality of base layers that are laminated containing a low-temperature co-fired ceramic material, a plurality of first constraint layers which contain a metal oxide not completely sintered at the sintering temperature of the low-temperature co-fired ceramic material and which are located between the base layers, and a protective layer which contains the metal oxide and which is in contact with an outermost base layer of the plurality of base layers in the lamination direction, and wherein X1>X2, where X1 is a content of the metal oxide in a surface section of the protective layer and X2 is a content of the metal oxide in a boundary section of the protective layer that is in contact with the outermost base layer.Type: GrantFiled: October 25, 2018Date of Patent: November 19, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takahiro Oka, Yoshitake Yamagami, Yuki Takemori, Kazuo Kishida, Hiromichi Kawakami
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Patent number: 10426027Abstract: A ceramic multilayer substrate that includes a ceramic insulator layer, which includes a first layer, a second layer, and a third layer and in which the first layer is interposed between the second layer and the third layer, an inner pattern conductor, an outer pattern conductor, and outer electrodes. The ceramic insulator layer is interposed between the inner pattern conductor and the outer pattern conductor. The sintering shrinkage start temperatures of the second layer alone and the third layer alone in a green sheet state are higher than or equal to the sintering shrinkage stop temperature of the first layer alone in a green sheet state. The thickness of the ceramic insulator layer is 5.0 ?m to 55.7 ?m. The ratio of the total of the thickness of the second layer and the thickness of the third layer to the thickness of the first layer is 0.25 to 1.11.Type: GrantFiled: March 12, 2018Date of Patent: September 24, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Masaaki Hanao, Tsuyoshi Katsube, Kazuo Kishida
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Patent number: 10390426Abstract: A ceramic multilayer substrate that includes a ceramic insulator layer, which includes a first layer, a second layer, and a third layer and in which the first layer is interposed between the second layer and the third layer, an inner pattern conductor, an outer pattern conductor, and outer electrodes. The ceramic insulator layer is interposed between the inner pattern conductor and the outer pattern conductor. The sintering shrinkage start temperatures of the second layer alone and the third layer alone in a green sheet state are higher than or equal to the sintering shrinkage stop temperature of the first layer alone in a green sheet state. The thickness of the ceramic insulator layer is 5.0 ?m to 55.7 ?m. The ratio of the total of the thickness of the second layer and the thickness of the third layer to the thickness of the first layer is 0.25 to 1.11.Type: GrantFiled: March 12, 2018Date of Patent: August 20, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Masaaki Hanao, Tsuyoshi Katsube, Kazuo Kishida
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Publication number: 20190191565Abstract: An electronic device that includes an electronic component mounted on a multilayer ceramic substrate. The electronic component includes a connection terminal on the mounting surface side thereof, the connection terminal having an end with a rounded convex shape when viewed in cross section. The multilayer ceramic substrate includes a recessed portion at a position corresponding to the connection terminal, the recessed portion having a rounded concave shape when viewed in cross section, and a surface electrode disposed on at least part of the recessed portion and electrically connected to the connection terminal.Type: ApplicationFiled: February 25, 2019Publication date: June 20, 2019Inventors: Takahiro Oka, Yuki Takemori, Kazuo Kishida, Hiromichi Kawakami, Yukio Yamamoto, Kensuke Otake
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Patent number: 10249549Abstract: A ceramic circuit board that includes a ceramic insulator layer, grounding pattern conductors, connection lands disposed on a first surface of the ceramic circuit board, and grounding electrodes disposed on a second surface of the ceramic circuit board and connected to the grounding pattern conductors. Each of the grounding pattern conductors contains a metal and an oxide and includes a pattern main portion disposed inside the ceramic circuit board and an extended portion in which a first end thereof is connected to the pattern main portion and a second end thereof is exposed at a side surface of the ceramic circuit board. The metal content of the extended portion is lower than the metal content of the pattern main portion.Type: GrantFiled: July 20, 2016Date of Patent: April 2, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Hiromitsu Hongo, Takahiro Sumi, Masaaki Hanao, Kazuo Kishida
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Publication number: 20190069396Abstract: A multilayer ceramic substrate according to the present invention includes a plurality of base layers that are laminated containing a low-temperature co-fired ceramic material, a plurality of first constraint layers which contain a metal oxide not completely sintered at the sintering temperature of the low-temperature co-fired ceramic material and which are located between the base layers, and a protective layer which contains the metal oxide and which is in contact with an outermost base layer of the plurality of base layers in the lamination direction, and wherein X1>X2, where X1 is a content of the metal oxide in a surface section of the protective layer and X2 is a content of the metal oxide in a boundary section of the protective layer that is in contact with the outermost base layer.Type: ApplicationFiled: October 25, 2018Publication date: February 28, 2019Inventors: Takahiro Oka, Yoshitake Yamagami, Yuki Takemori, Kazuo Kishida, Hiromichi Kawakami
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Publication number: 20180206337Abstract: A ceramic multilayer substrate that includes a ceramic insulator layer, which includes a first layer, a second layer, and a third layer and in which the first layer is interposed between the second layer and the third layer, an inner pattern conductor, an outer pattern conductor, and outer electrodes. The ceramic insulator layer is interposed between the inner pattern conductor and the outer pattern conductor. The sintering shrinkage start temperatures of the second layer alone and the third layer alone in a green sheet state are higher than or equal to the sintering shrinkage stop temperature of the first layer alone in a green sheet state. The thickness of the ceramic insulator layer is 5.0 ?m to 55.7 ?m. The ratio of the total of the thickness of the second layer and the thickness of the third layer to the thickness of the first layer is 0.25 to 1.11.Type: ApplicationFiled: March 12, 2018Publication date: July 19, 2018Inventors: Masaaki Hanao, Tsuyoshi Katsube, Kazuo Kishida
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Patent number: 9607765Abstract: A composition for ceramic substrates that includes a mixture of borosilicate glass powder and ceramic powder. The borosilicate glass powder contains 4% to 8% by weight B2O3, 38% to 44% by weight SiO2, 3% to 10% by weight Al2O3, and 40% to 48% by weight MO, where MO is at least one selected from CaO, MgO, and BaO. The mixing proportions of the borosilicate glass powder and the ceramic powder are 50% to 56% by weight the borosilicate glass powder and 50% to 44% by weight the ceramic powder. The ceramic powder has an average particle diameter D50 of 0.4 to 1.5 ?m.Type: GrantFiled: November 30, 2015Date of Patent: March 28, 2017Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Kazuo Kishida, Seiji Fujita, Yuichi Iida
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Publication number: 20170034917Abstract: A ceramic circuit board that includes a ceramic insulator layer, grounding pattern conductors, connection lands disposed on a first surface of the ceramic circuit board, and grounding electrodes disposed on a second surface of the ceramic circuit board and connected to the grounding pattern conductors. Each of the grounding pattern conductors contains a metal and an oxide and includes a pattern main portion disposed inside the ceramic circuit board and an extended portion in which a first end thereof is connected to the pattern main portion and a second end thereof is exposed at a side surface of the ceramic circuit board. The metal content of the extended portion is lower than the metal content of the pattern main portion.Type: ApplicationFiled: July 20, 2016Publication date: February 2, 2017Inventors: Hiromitsu Hongo, Takahiro Sumi, Masaaki Hanao, Kazuo Kishida
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Publication number: 20160086732Abstract: A composition for ceramic substrates that includes a mixture of borosilicate glass powder and ceramic powder. The borosilicate glass powder contains 4% to 8% by weight B2O3, 38% to 44% by weight SiO2, 3% to 10% by weight Al2O3, and 40% to 48% by weight MO, where MO is at least one selected from CaO, MgO, and BaO. The mixing proportions of the borosilicate glass powder and the ceramic powder are 50% to 56% by weight the borosilicate glass powder and 50% to 44% by weight the ceramic powder. The ceramic powder has an average particle diameter D50 of 0.4 to 1.5 ?m.Type: ApplicationFiled: November 30, 2015Publication date: March 24, 2016Inventors: Kazuo Kishida, Seiji Fujita, Yuichi Iida
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Publication number: 20140301053Abstract: A multilayer ceramic substrate including an inner-layer section, surface-layer sections stacked on opposed principal surfaces of the inner-layer section, and surface electrodes provided on at least one surface of the surface-layer sections. The surface-layer sections contain SiO2-MO—B2O3—Al2O3 based glass and an Al2O3 filler, wherein MO is at least one selected from the group consisting of CaO, MgO, SrO, and BaO. The coefficient of thermal expansion in the surface-layer sections is lower than the coefficient of thermal expansion in the inner-layer section, and the peak intensity ratio through an XRD analysis between MAl2Si2O8 and Al2O3 in the surface-layer sections falls within the range of 0.05?(MAl2Si2O8/Al2O3)?5, wherein M is at least one selected from the group consisting of Ca, Mg, Sr, and Ba.Type: ApplicationFiled: June 23, 2014Publication date: October 9, 2014Inventors: Yuichi Iida, Satoru Adachi, Kazuo Kishida
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Patent number: 8754742Abstract: A multilayer ceramic substrate includes a ceramic laminated body including a plurality of ceramic layers stacked on each other, a resistor, and a resistor connecting conductor with a portion overlapping the resistor and an overcoat layer that covers the resistor located on a principal surface of the ceramic laminated body. An overcoat layer is made relatively thick during firing, thereby making cracks less likely to be caused, and after the firing step, the thickness of the overcoat layer is reduced by physically scraping down the surface of the overcoat layer, thereby reducing the trimming time. In the overcoat layer, a region that covers a portion in which a resistor overlaps a resistor connecting conductor is thicker than a region that covers the other portion.Type: GrantFiled: September 26, 2012Date of Patent: June 17, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Yusuke Otsuka, Yuichi Iida, Kazuo Kishida, Takahiro Takada
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Publication number: 20140041912Abstract: A high-quality resistor pattern and conductor pattern is formed on an external surface of a multilayer ceramic substrate by an ink jet method. A composite sheet including a first ceramic green layer and a shrinkage-retardant layer is formed, and a resistor pattern and a conductor pattern are formed on the first ceramic green layer of the composite sheet by an ink jet method. Subsequently, a plurality of second ceramic green layers are stacked with the composite sheet such that the shrinkage-retardant layer of the composite sheet defines an outermost layer, thus forming a multilayer composite including an unfired multilayer ceramic substrate and the shrinkage-retardant layer. Then, the multilayer composite is fired, and the shrinkage-retardant layer is removed to obtain a sintered multilayer ceramic substrate.Type: ApplicationFiled: October 16, 2013Publication date: February 13, 2014Applicant: Murata Manufacturing Co., Ltd.Inventors: Yusuke OTSUKA, Kazuo KISHIDA, Takahiro TAKADA
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Patent number: 8585842Abstract: A high-quality resistor pattern and conductor pattern is formed on an external surface of a multilayer ceramic substrate by an ink jet method. A composite sheet including a first ceramic green layer and a shrinkage-retardant layer is formed, and a resistor pattern and a conductor pattern are formed on the first ceramic green layer of the composite sheet by an ink jet method. Subsequently, a plurality of second ceramic green layers are stacked with the composite sheet such that the shrinkage-retardant layer of the composite sheet defines an outermost layer, thus forming a multilayer composite including an unfired multilayer ceramic substrate and the shrinkage-retardant layer. Then, the multilayer composite is fired, and the shrinkage-retardant layer is removed to obtain a sintered multilayer ceramic substrate.Type: GrantFiled: November 19, 2009Date of Patent: November 19, 2013Assignee: Murata Manufacturing Co., Ltd.Inventors: Yusuke Otsuka, Kazuo Kishida, Takahiro Takada
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Patent number: 8372227Abstract: In a method for producing a multilayer ceramic substrate by a non-shrinkage process, even when a total area of surface electrodes on a first principal surface side is smaller than that on a second principal surface side, a favorable balance in terms of a time period from softening to crystallization of glass is achieved between the first principal surface side and the second principal surface side, thereby allowing all base material layers to be densified and prevented from causing cracks or warpage, even when the crystallization temperature is lowered to prevent production of a reaction layer. The crystallization temperature of a glass material included in a second base material layer defining a second principal surface with a larger total area of surface electrodes is less than that of a glass material included in a first base material layer defining a first principal surface.Type: GrantFiled: October 17, 2011Date of Patent: February 12, 2013Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazuo Kishida, Takahiro Takada
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Publication number: 20120267037Abstract: In a method for producing a multilayer ceramic substrate by a non-shrinkage process, even when a total area of surface electrodes on a first principal surface side is smaller than that on a second principal surface side, a favorable balance in terms of a time period from softening to crystallization of glass is achieved between the first principal surface side and the second principal surface side, thereby allowing all base material layers to be densified and prevented from causing cracks or warpage, even when the crystallization temperature is lowered to prevent production of a reaction layer. The crystallization temperature of a glass material included in a second base material layer defining a second principal surface with a larger total area of surface electrodes is less than that of a glass material included in a first base material layer defining a first principal surface.Type: ApplicationFiled: October 17, 2011Publication date: October 25, 2012Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Kazuo KISHIDA, Takahiro TAKADA
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Patent number: 8123882Abstract: A shrinkage suppression layer used in the production of a ceramic substrate according to a non-shrinkage process provides favorable removal performance while sufficiently ensuring the restraining performance of the shrinkage suppression layer. Resin beads, which disappear at a temperature lower than the sintering temperature of a low-temperature sintering ceramic material of a base material layer to form open bores in a shrinkage suppression layer, are added to the shrinkage suppression layer and dispersed uniformly at least in a principal surface direction. The shrinkage suppression layer provides sufficient restraining performance to the base material layer in the step of firing, and after the firing, forms open bores, thereby improving the removal performance of the shrinkage suppression layer.Type: GrantFiled: September 23, 2010Date of Patent: February 28, 2012Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazuo Kishida, Hiroaki Yamada
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Publication number: 20110011516Abstract: A shrinkage suppression layer used in the production of a ceramic substrate according to a non-shrinkage process provides favorable removal performance while sufficiently ensuring the restraining performance of the shrinkage suppression layer. Resin beads, which disappear at a temperature lower than the sintering temperature of a low-temperature sintering ceramic material of a base material layer to form open bores in a shrinkage suppression layer, are added to the shrinkage suppression layer and dispersed uniformly at least in a principal surface direction. The shrinkage suppression layer provides sufficient restraining performance to the base material layer in the step of firing, and after the firing, forms open bores, thereby improving the removal performance of the shrinkage suppression layer.Type: ApplicationFiled: September 23, 2010Publication date: January 20, 2011Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Kazuo KISHIDA, Hiroaki YAMADA