Patents by Inventor Kazuo Matsukawa
Kazuo Matsukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11965933Abstract: A battery monitoring device includes: a pair of terminals for measuring voltage or current of a battery, and to which a filter unit including a capacitive element is connected; an AD converter that measures a waveform of voltage between the terminals during charging or discharging of the capacitive element; and a time constant calculation unit that calculates a time constant of the filter unit based on the waveform measured. The AD converter is, for example, a first AD converter or a second AD converter. The filter unit is, for example, a first filter unit or a second filter unit.Type: GrantFiled: December 23, 2020Date of Patent: April 23, 2024Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Kazuo Matsukawa, Yu Okada, Yosuke Goto, Hitoshi Kobayashi, Keiichi Fujii
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Publication number: 20230314529Abstract: A current application unit includes a load element, a switching element, and a shunt resistor connected in series between both terminals of an assembled battery, and a drive control unit of the switching element to apply an alternating current having a predetermined frequency to the assembled battery. The drive control unit includes: a PWM modulator for generating a drive signal; a PDM modulator for generating the drive signal; and a switching unit for switching between a first drive state for driving the switching element by the drive signal generated by the PWM modulator and a second drive state for driving the switching element by the drive signal generated by the PDM modulator.Type: ApplicationFiled: April 17, 2023Publication date: October 5, 2023Inventor: Kazuo MATSUKAWA
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Publication number: 20230168311Abstract: A battery monitoring system that monitors states of a plurality of batteries. The battery monitoring system includes a battery monitoring ECU and a plurality of battery monitoring devices. The battery monitoring ECU and the plurality of battery monitoring devices are connected to each other in any connection form of ring connection, daisy chain connection, or multi-drop connection.Type: ApplicationFiled: November 16, 2022Publication date: June 1, 2023Inventors: SOYA TANIGUCHI, YOSHIKAZU FURUTA, KAZUO MATSUKAWA, YOSHIYUKI UTAGAWA
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Publication number: 20230126560Abstract: A battery monitoring system includes a battery monitoring ECU and battery monitoring devices which are sequentially connected in a connection configuration. The battery monitoring ECU includes a clock generator that generates a first clock signal. Each battery monitoring device includes a second clock generator that generates a second clock signal, a controller that causes a frequency correction block to correct a frequency of the second clock signal in line with the first clock signal and causes the battery monitor to monitor a battery cell using the second clock signal that has been corrected, and a switch that, according to an instruction of the battery monitoring ECU, switches a circuit configuration to a state in which a signal received from a preceding device is transmitted to a succeeding device in the connection configuration.Type: ApplicationFiled: October 19, 2022Publication date: April 27, 2023Inventors: SOYA TANIGUCHI, YOSHIKAZU FURUTA, KAZUO MATSUKAWA, YOSHIYUKI UTAGAWA
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Publication number: 20220373602Abstract: In a battery measurement apparatus, a signal control unit, provided on a first electrical path connecting electrodes of a storage battery, causes the storage battery to output a predetermined alternating-current signal or inputs a predetermined alternating-current signal to the storage battery. A response signal input unit, provided on a second electrical path connecting the electrodes, inputs a response signal of the storage battery in response to the alternating-current signal through the second electrical path. Based on the response signal, a calculating unit calculates information related to a complex impedance of the storage battery. A magnetic flux passage area, surrounded by the storage battery and the second electrical path, is formed. A size of the magnetic flux passage area is set such that an error between an actual complex impedance of the storage battery and a complex impedance calculated by the calculating unit is within a range of ±1 m?.Type: ApplicationFiled: July 20, 2022Publication date: November 24, 2022Applicant: DENSO CORPORATIONInventors: Masaaki KITAGAWA, Kazuo MATSUKAWA, Yuji YAMAGAMI, Masaki UCHIYAMA
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Patent number: 11467219Abstract: A battery monitoring device includes a first reference resistor disposed in a path different from a path of current flowing from a battery to a load; a transistor for passing current from the battery to the first reference resistor; and an integrated circuit. The integrated circuit includes: a current measurement unit that measures a first current flowing through the first reference resistor; a voltage measurement unit that measures a first voltage of the battery; and a first calculation unit that calculates an AC impedance of the battery based on the first current measured and the first voltage measured.Type: GrantFiled: December 23, 2020Date of Patent: October 11, 2022Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Kazuo Matsukawa, Yu Okada, Yoshikazu Makabe, Hitoshi Kobayashi, Takeshi Misaku, Keiichi Fujii
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Publication number: 20210344347Abstract: A DLL circuit includes: a time difference amplifier circuit that includes current sources for setting a time difference amplification factor and an input time difference range, and amplifies, to a first signal and a second signal which are input, a time difference between edges which are change points of logic levels respectively included in the first and second signals, using the current sources and outputting a first amplified signal and a second amplified signal obtained; a phase comparison circuit that calculates a phase difference between the first and second amplified signals output and outputs a phase difference signal indicating the phase difference calculated; and a variable delay circuit that delays the second signal by an amount of delay depending on the phase difference indicated by the phase difference signal output from the phase comparison circuit and outputs the delayed second signal as a delayed signal.Type: ApplicationFiled: June 11, 2021Publication date: November 4, 2021Inventors: Takumi KATO, Kazuo MATSUKAWA, Toshiaki OZEKI
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Publication number: 20210302547Abstract: A distance-measuring imaging device includes: a timing controller that outputs one or more timing signals; a light receiver that receives reflected light that is light emitted by a light source and reflected by a subject; a phase adjustment circuit that outputs at least one signal out of a light emission control signal and an exposure control signal, based on the one or more timing signals, the light emission control signal being used for causing the light source to emit light to the subject, the exposure control signal being used for causing the light receiver to start exposure. The phase adjustment circuit includes one or more DLL circuits each of which determines, for at least one of the one or more timing signals, at least one of a phase of a rising edge or a phase of a falling edge of the at least one signal.Type: ApplicationFiled: June 11, 2021Publication date: September 30, 2021Inventors: Toshiaki OZEKI, Kazuo MATSUKAWA, Takumi KATO, Mitsuhiko OTANI
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Publication number: 20210109162Abstract: A battery monitoring device includes: a pair of terminals for measuring voltage or current of a battery, and to which a filter unit including a capacitive element is connected; an AD converter that measures a waveform of voltage between the terminals during charging or discharging of the capacitive element; and a time constant calculation unit that calculates a time constant of the filter unit based on the waveform measured. The AD converter is, for example, a first AD converter or a second AD converter. The filter unit is, for example, a first filter unit or a second filter unit.Type: ApplicationFiled: December 23, 2020Publication date: April 15, 2021Inventors: Kazuo MATSUKAWA, Yu OKADA, Yosuke GOTO, Hitoshi KOBAYASHI, Keiichi FUJII
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Publication number: 20210109160Abstract: A battery monitoring device includes a first reference resistor disposed in a path different from a path of current flowing from a battery to a load; a transistor for passing current from the battery to the first reference resistor; and an integrated circuit. The integrated circuit includes: a current measurement unit that measures a first current flowing through the first reference resistor; a voltage measurement unit that measures a first voltage of the battery; and a first calculation unit that calculates an AC impedance of the battery based on the first current measured and the first voltage measured.Type: ApplicationFiled: December 23, 2020Publication date: April 15, 2021Inventors: Kazuo MATSUKAWA, Yu OKADA, Yoshikazu MAKABE, Hitoshi KOBAYASHI, Takeshi MISAKU, Keiichi FUJII
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Patent number: 10340868Abstract: An amplifier circuit includes a first input branch circuit including a first sampling capacitor, a second input branch circuit including a second sampling capacitor, an averaging capacitor, and a subtraction capacitor, a feedback capacitor, and an operational amplifier. The first sampling capacitor samples an input voltage in a first time period and outputs a first voltage. The second sampling capacitor samples the input voltage in the first time period and outputs a second voltage. The averaging capacitor takes an average of the second voltage in the second time period and outputs a third voltage. The subtraction capacitor receives the third voltage in the first time period. The subtraction capacitor subtracts the first voltage from the third voltage and outputs a fourth voltage in the second time period. The operational amplifier is connected to the feedback capacitor and amplifies the fourth voltage. The first and second time periods are repeated alternately.Type: GrantFiled: May 12, 2017Date of Patent: July 2, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Koji Obata, Kazuo Matsukawa
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Publication number: 20170346457Abstract: An amplifier circuit includes a first input branch circuit including a first sampling capacitor, a second input branch circuit including a second sampling capacitor, an averaging capacitor, and a subtraction capacitor, a feedback capacitor, and an operational amplifier. The first sampling capacitor samples an input voltage in a first time period and outputs a first voltage. The second sampling capacitor samples the input voltage in the first time period and outputs a second voltage. The averaging capacitor takes an average of the second voltage in the second time period and outputs a third voltage. The subtraction capacitor receives the third voltage in the first time period. The subtraction capacitor subtracts the first voltage from the third voltage and outputs a fourth voltage in the second time period. The operational amplifier is connected to the feedback capacitor and amplifies the fourth voltage. The first and second time periods are repeated alternately.Type: ApplicationFiled: May 12, 2017Publication date: November 30, 2017Inventors: KOJI OBATA, KAZUO MATSUKAWA
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Patent number: 9654135Abstract: An AD converter converts an analogue input voltage into a digital value including a most significant bit to a least significant bit. The AD converter includes: a common node; a capacitive DAC; a comparator; a successive approximation controller; and an integrator. The integrator includes first to Xth integrating circuits connected in a cascade arrangement, where X is an integer greater than or equal to two, and at least one feedforward path that each samples a residual voltage and outputs the sampled residual voltage to one of the second to Xth integrating circuits.Type: GrantFiled: May 20, 2016Date of Patent: May 16, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO. LTD.Inventors: Takuji Miki, Kazuo Matsukawa
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Patent number: 9634688Abstract: An integrator including: a resistive element connected to an input terminal; an operational amplifier configured to receive, through the resistive element, an input signal that has been supplied to the input terminal; and a voltage regulator circuit connected to an intermediate node between the resistive element and the operational amplifier. The voltage regulator circuit has a first current source connected to the intermediate node, and a switch connected between the intermediate node and the first current source and selectively turning ON or OFF.Type: GrantFiled: June 27, 2016Date of Patent: April 25, 2017Assignee: SOCIONEXT INC.Inventors: Yosuke Mitani, Takashi Morie, Kazuo Matsukawa
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Publication number: 20160352351Abstract: An AD converter converts an analogue input voltage into a digital value including a most significant bit to a least significant bit. The AD converter includes: a common node; a capacitive DAC; a comparator; a successive approximation controller; and an integrator. The integrator includes first to Xth integrating circuits connected in a cascade arrangement, where X is an integer greater than or equal to two, and at least one feedforward path that each samples a residual voltage and outputs the sampled residual voltage to one of the second to Xth integrating circuits.Type: ApplicationFiled: May 20, 2016Publication date: December 1, 2016Inventors: TAKUJI MIKI, KAZUO MATSUKAWA
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Publication number: 20160308553Abstract: Disclosed herein is an integrator including: a resistive element connected to an input terminal; an operational amplifier configured to receive, through the resistive element, an input signal that has been supplied to the input terminal; and a voltage regulator circuit connected to an intermediate node between the resistive element and the operational amplifier. The voltage regulator circuit has a first current source connected to the intermediate node, and a switch connected between the intermediate node and the first current source and selectively turning ON or OFF.Type: ApplicationFiled: June 27, 2016Publication date: October 20, 2016Applicant: SOCIONEXT INC.Inventors: Yosuke MITANI, Takashi MORIE, Kazuo MATSUKAWA
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Patent number: 9438268Abstract: This D/A converter includes a plurality of D/A converter elements, each comprising current sources configured to supply output currents to output nodes, and first switches configured to control the output currents. The output nodes are connected to a capacitor section having second switches and a capacitive load. The D/A converter further includes a switch control circuit configured to control the first switches responsive to digital signals, and also control the second switches in accordance with the control of the ON/OFF state of the first switches.Type: GrantFiled: January 8, 2016Date of Patent: September 6, 2016Assignee: SOCIONEXT INC.Inventors: Yosuke Mitani, Takashi Morie, Kazuo Matsukawa, Masashi Uchida
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Publication number: 20160126973Abstract: This D/A converter includes a plurality of D/A converter elements, each comprising current sources configured to supply output currents to output nodes, and first switches configured to control the output currents. The output nodes are connected to a capacitor section having second switches and a capacitive load. The D/A converter further includes a switch control circuit configured to control the first switches responsive to digital signals, and also control the second switches in accordance with the control of the ON/OFF state of the first switches.Type: ApplicationFiled: January 8, 2016Publication date: May 5, 2016Inventors: Yosuke Mitani, Takashi Morie, Kazuo Matsukawa, Masashi Uchida
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Patent number: 9287887Abstract: DEM circuit (130) includes a switch (131) configured to receive an N-bit digital input signal (SD1) and shift bit positions of the digital input signal (SD1) based on a switch control signal (SC) in a circulating pattern to output the digital input signal (SD1) as an N-bit digital output signal (SD2), where N is an integer greater than or equal to 2, and a switch control signal generation circuit (132) including a plurality of pointers which move in an identical direction based on a predetermined rule, and configured to generate the switch control signal (SC), each time when the digital input signal (SD1) is input to the switch (131), by using the pointers in a predetermined order.Type: GrantFiled: June 19, 2014Date of Patent: March 15, 2016Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Koji Obata, Kazuo Matsukawa, Yosuke Mitani
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Patent number: 9178530Abstract: A delta sigma modulator includes a filter circuit including an integrator having an operational amplifier; a first addition circuit provided between an output section of the filter circuit and an input section of a quantizer, and including a first resistive element; and a second addition circuit including at least one of a first feedforward circuit including a second resistive element or a first feedback circuit configured to feed back, as an analog signal, a digital output signal having been quantized by the quantizer, to an input section of the quantizer, wherein at least one of the first addition circuit or the first feedback circuit includes a phase compensator.Type: GrantFiled: December 23, 2013Date of Patent: November 3, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yosuke Mitani, Kazuo Matsukawa, Koji Obata, Shiro Dosho