Abstract: In a successive approximation AD converter, a noise generator outputs the output of a ?? modulator as a noise signal. A selector circuit can output the noise signal, in place of a digital signal for generating a comparison-target voltage for the next bit, to a capacitor element of a capacitance DAC. During sampling of an analog input voltage, the noise signal is supplied to the capacitance DAC via the selector circuit, and thereafter normal successive approximation operation is executed.

Abstract: A capacitor array includes a plurality of comb capacitors sharing a common comb electrode. At least one of the comb capacitors has a comb electrode as a single base part. Each of the other ones of the comb capacitors has an electrode formed by coupling a plurality of base parts. In the other ones of the comb capacitors, a space between a wire coupling the base parts and an end of each of comb teeth of the common electrode, which is interposed between the base parts, is larger than a space between a base of each of the base parts of the plurality of comb capacitors and an end of each of the comb teeth of the common electrode, which is interposed between comb teeth of the base part.

Abstract: Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.

Abstract: An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.

Abstract: A delta-sigma modulator includes: an integrator having an operational amplifier; a quantizer quantizing an output of the integrator; a first D-A converter converting an output of the quantizer to a current signal to provide negative feedback to the operational amplifier; a feedforward path feeding forward an input of the integrator to the quantizer; and a second D-A converter converting the output of the quantizer to a current signal to provide negative feedback to the quantizer. The integrator includes a resistive element having a first end connected to the input of the integrator and a second end connected to an inverting input of the operational amplifier, n capacitive circuits connected in series between the inverting input and an output of the operational amplifier, and (n?1) resistive elements each having a first end connected to an interconnecting node of the capacitive circuits and a second end connected to a common node.

Abstract: A comparator offset correction device opens an open switch 205 and closes a short-circuit switch 204 in offset correction of a comparator 201. In this state, a controller 203 allows the comparator 201 to repeat, more than once, the operation of comparing reference voltages 101 input to two input terminals with each other. The filter 202 outputs a frequency signal obtained by smoothing a plurality of comparison results. Based on the frequency signal from the filter 202, the controller 203 outputs a threshold value control signal to the comparator 201 so that the ratio of a high-level voltage to a low-level voltage in the results of the comparison in the comparator 201 is 50%. Thus, even when a current which will be input may differ from a current which is currently input due to, for example, the influence of noise, the threshold value offset amount is normally corrected.

Abstract: A delta-sigma A/D converter includes a loop filter including a resonant filter, a quantizer, and a feedback D/A converter. The resonant filter includes a resonator including a resistor and a capacitor, and a feedback path through which an output of the resonator is positively fed back to an input of the resonator. The resonant filter operates as an oscillator or a filter under the on/off control of a first switch. At least one of the resistor and the capacitor of the resonator is configured to allow a resistance value or a capacitance value thereof to be adjusted based on a third external signal.

Abstract: DEM circuit (130) includes a switch (131) configured to receive an N-bit digital input signal (SD1) and shift bit positions of the digital input signal (SD1) based on a switch control signal (SC) in a circulating pattern to output the digital input signal (SD1) as an N-bit digital output signal (SD2), where N is an integer greater than or equal to 2, and a switch control signal generation circuit (132) including a plurality of pointers which move in an identical direction based on a predetermined rule, and configured to generate the switch control signal (SC), each time when the digital input signal (SD1) is input to the switch (131), by using the pointers in a predetermined order.

Abstract: In a successive approximation AD converter, a noise generator outputs the output of a ?? modulator as a noise signal. A selector circuit can output the noise signal, in place of a digital signal for generating a comparison-target voltage for the next bit, to a capacitor element of a capacitance DAC. During sampling of an analog input voltage, the noise signal is supplied to the capacitance DAC via the selector circuit, and thereafter normal successive approximation operation is executed.

Abstract: A delta-sigma A/D converter includes a loop filter including a resonant filter, a quantizer, and a feedback D/A converter. The resonant filter includes a resonator including a resistor and a capacitor, and a feedback path through which an output of the resonator is positively fed back to an input of the resonator. The resonant filter operates as an oscillator or a filter under the on/off control of a first switch. At least one of the resistor and the capacitor of the resonator is configured to allow a resistance value or a capacitance value thereof to be adjusted based on a third external signal.

Abstract: Two T filters, one of which includes two resistive elements and one capacitive element and the other of which includes two capacitive elements and one resistive element, are inserted in a negative-feedback section of an operational amplifier, and a resistive element and a capacitive element are connected between each of intermediate nodes and a signal input terminal. A resistive element and a capacitive element which are connected to each other in parallel are connected between the signal input terminal and an inverting input terminal of the operational amplifier. With this configuration, overall admittances where elements connected to the corresponding intermediate nodes are in parallel connection are equal to each other.

Abstract: A delta sigma modulator includes a filter circuit including an integrator having an operational amplifier; a first addition circuit provided between an output section of the filter circuit and an input section of a quantizer, and including a first resistive element; and a second addition circuit including at least one of a first feedforward circuit including a second resistive element or a first feedback circuit configured to feed back, as an analog signal, a digital output signal having been quantized by the quantizer, to an input section of the quantizer, wherein at least one of the first addition circuit or the first feedback circuit includes a phase compensator.

Abstract: Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.

Abstract: Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.

Abstract: An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.

Abstract: An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.

Abstract: A comparator offset correction device opens an open switch 205 and closes a short-circuit switch 204 in offset correction of a comparator 201. In this state, a controller 203 allows the comparator 201 to repeat, more than once, the operation of comparing reference voltages 101 input to two input terminals with each other. The filter 202 outputs a frequency signal obtained by smoothing a plurality of comparison results. Based on the frequency signal from the filter 202, the controller 203 outputs a threshold value control signal to the comparator 201 so that the ratio of a high-level voltage to a low-level voltage in the results of the comparison in the comparator 201 is 50%. Thus, even when a current which will be input may differ from a current which is currently input due to, for example, the influence of noise, the threshold value offset amount is normally corrected.

Abstract: Two T filters, one of which includes two resistive elements and one capacitive element and the other of which includes two capacitive elements and one resistive element, are inserted in a negative-feedback section of an operational amplifier, and a resistive element and a capacitive element are connected between each of intermediate nodes and a signal input terminal. A resistive element and a capacitive element which are connected to each other in parallel are connected between the signal input terminal and an inverting input terminal of the operational amplifier. With this configuration, overall admittances where elements connected to the corresponding intermediate nodes are in parallel connection are equal to each other.

Abstract: An integrator includes an operational amplifier, a first filter connected to an inverting input terminal of the operational amplifier, and a second filter connected between the inverting input terminal and an output terminal of the operational amplifier. The first filter includes n resistive elements connected in series, and (n?1) capacitive elements each having one end connected to an interconnecting node of the resistive elements and the other end connected to ground. The second filter includes n capacitive elements connected in series, and (n?1) resistive elements each having one end connected to an interconnecting node of the capacitive elements and the other end connected to ground.

Abstract: An integrator is provided which can reduce a disturbance in the current waveform of a current DA converter in order to improve the SNR of a ?? modulator, for example. The integrator includes an operational amplifier, and feedback paths provided in parallel between the output terminal and inverting input terminal of the operational amplifier. In one of the feedback paths, an integrating capacitor and at least one resistor are connected in series. In the other feedback path, a second integrating capacitor whose capacitance value is smaller than that of the integrating capacitor is provided.