Patents by Inventor Kazuya Hanaoka

Kazuya Hanaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160247832
    Abstract: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.
    Type: Application
    Filed: February 11, 2016
    Publication date: August 25, 2016
    Inventors: Hideomi SUZAWA, Yuta ENDO, Kazuya HANAOKA
  • Patent number: 9419143
    Abstract: A semiconductor device with a structure in which an increase in the number of oxygen vacancies in an oxide semiconductor layer can be suppressed and a method for manufacturing the semiconductor device are provided. The semiconductor device includes an oxide insulating layer; intermediate layers apart from each other over the oxide insulating layer; a source electrode layer and a drain electrode layer over the intermediate layers; an oxide semiconductor layer that is electrically connected to the source electrode layer and the drain electrode layer and is in contact with the oxide insulating layer; a gate insulating film over the source electrode layer, the drain electrode layer, and the oxide semiconductor layer; and a gate electrode layer that is over the gate insulating film and overlaps with the source electrode layer, the drain electrode layer, and the oxide semiconductor layer.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: August 16, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuya Hanaoka, Naoto Kusumoto
  • Publication number: 20160190347
    Abstract: A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a source electrode layer and a drain electrode layer electrically connected to the semiconductor layer, a gate insulating film over the semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer overlapping with part of the semiconductor layer, part of the source electrode layer, and part of the drain electrode layer with the gate insulating film therebetween. A cross section of the semiconductor layer in the channel width direction is substantially triangular or substantially trapezoidal. The effective channel width is shorter than that for a rectangular cross section.
    Type: Application
    Filed: March 7, 2016
    Publication date: June 30, 2016
    Inventors: Shinya SASAGAWA, Motomu KURATA, Kazuya HANAOKA, Yoshiyuki KOBAYASHI, Daisuke MATSUBAYASHI
  • Patent number: 9379192
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a source electrode layer and a drain electrode layer which are electrically connected to an oxide semiconductor layer, a gate insulating film over the oxide semiconductor layer; the source electrode layer, and the drain electrode layer; and a gate electrode layer that overlaps with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer with the gate insulating film positioned therebetween. The source electrode layer and the drain electrode layer each include a first conductive layer and a second conductive layer. The first conductive layer is in contact with a top surface of the oxide semiconductor layer. The second conductive layer is in contact with a side surface of the oxide semiconductor layer. The first conductive layer and the second conductive layer are electrically connected to each other.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: June 28, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daigo Ito, Kazuya Hanaoka
  • Patent number: 9368607
    Abstract: To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: June 14, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Hideomi Suzawa, Kazuya Hanaoka
  • Publication number: 20160163870
    Abstract: Provided is a semiconductor device which can suppress an increase in oxygen vacancies in an oxide semiconductor layer and a manufacturing method of the semiconductor device. The semiconductor device includes a first oxide semiconductor layer over the first insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer each over the third oxide semiconductor layer; a fourth semiconductor layer over the source and drain electrode layers, and the third oxide semiconductor layer; a gate insulating layer over the fourth oxide semiconductor layer; a gate electrode layer over the gate electrode layer and overlapping with the source and drain electrode layers, and the fourth oxide semiconductor layer; and a second insulating layer over the first insulating layer, and the source, gate, and drain electrode layers.
    Type: Application
    Filed: December 7, 2015
    Publication date: June 9, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daigo Ito, Takahisa ISHIYAMA, Kazuya HANAOKA
  • Patent number: 9337344
    Abstract: To provide a semiconductor device having a structure with which the device can be easily manufactured even if the size is decreased and which can suppress a decrease in electrical characteristics caused by the decrease in the size, and a manufacturing method thereof. A source electrode layer and a drain electrode layer are formed on an upper surface of an oxide semiconductor layer. A side surface of the oxide semiconductor layer and a side surface of the source electrode layer are provided on the same surface and are electrically connected to a first wiring. Further, a side surface of the oxide semiconductor layer and a side surface of the drain electrode layer are provided on the same surface and are electrically connected to a second wiring.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: May 10, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kazuya Hanaoka
  • Publication number: 20160093642
    Abstract: A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.
    Type: Application
    Filed: December 7, 2015
    Publication date: March 31, 2016
    Inventors: Atsuo ISOBE, Yutaka OKAZAKI, Kazuya HANAOKA, Shinya SASAGAWA, Motomu KURATA
  • Patent number: 9287410
    Abstract: A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a source electrode layer and a drain electrode layer electrically connected to the semiconductor layer, a gate insulating film over the semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer overlapping with part of the semiconductor layer, part of the source electrode layer, and part of the drain electrode layer with the gate insulating film therebetween. A cross section of the semiconductor layer in the channel width direction is substantially triangular or substantially trapezoidal. The effective channel width is shorter than that for a rectangular cross section.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: March 15, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Motomu Kurata, Kazuya Hanaoka, Yoshiyuki Kobayashi, Daisuke Matsubayashi
  • Patent number: 9276091
    Abstract: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: March 1, 2016
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Suguru Hondo, Akihisa Shimomura, Masaki Koyama, Motomu Kurata, Kazuya Hanaoka, Sho Nagamatsu, Kosei Nei, Toru Hasegawa
  • Publication number: 20160056272
    Abstract: To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
    Type: Application
    Filed: October 16, 2015
    Publication date: February 25, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Hideomi SUZAWA, Kazuya HANAOKA
  • Patent number: 9252286
    Abstract: A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: February 2, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Yutaka Okazaki, Kazuya Hanaoka, Shinya Sasagawa, Motomu Kurata
  • Patent number: 9166060
    Abstract: To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: October 20, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Hideomi Suzawa, Kazuya Hanaoka
  • Patent number: 9166019
    Abstract: A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are stacked in this order. A source electrode layer and a drain electrode layer are formed in a self-aligned manner by cutting the conductive film so that the conductive film over the gate electrode layer and the conductive layer is removed and the conductive film is divided. An electrode layer which is in contact with the oxide semiconductor layer and overlaps with a region in contact with the source electrode layer and the drain electrode layer is provided.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: October 20, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Saito, Atsuo Isobe, Kazuya Hanaoka, Junichi Koezuka, Shinya Sasagawa, Motomu Kurata, Akihiro Ishizuka
  • Patent number: 9136361
    Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: September 15, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sachiaki Tezuka, Atsuo Isobe, Takehisa Hatano, Kazuya Hanaoka
  • Patent number: 9123529
    Abstract: A method suitable to reprocess a semiconductor substrate is provided. A semiconductor substrate in which a projection including a damaged semiconductor region and an insulating layer is provided in a peripheral portion of the semiconductor substrate is subjected to etching treatment for removing the insulating layer and to etching treatment for removing the damaged semiconductor region selectively with a non-damaged semiconductor region left using a mixed solution including nitric acid, a substance dissolving a semiconductor material included in the semiconductor substrate and oxidized by the nitric acid, a substance controlling a speed of oxidation of the semiconductor material and a speed of dissolution of the oxidized semiconductor material, and nitrous acid, in which the concentration of the nitrous acid is higher than or equal to 10 mg/l and lower than or equal to 1000 mg/l. Through these steps, the semiconductor substrate is reprocessed.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: September 1, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuya Hanaoka, Shunsuke Kimura
  • Publication number: 20150221754
    Abstract: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.
    Type: Application
    Filed: April 16, 2015
    Publication date: August 6, 2015
    Inventors: Suguru HONDO, Akihisa SHIMOMURA, Masaki KOYAMA, Motomu KURATA, Kazuya HANAOKA, Sho NAGAMATSU, Kosei NEI, Toru HASEGAWA
  • Publication number: 20150214041
    Abstract: In a processing method of a stacked-layer film in which a metal film is provided on an oxide insulating film, plasma containing an oxygen ion is generated by applying high-frequency power with power density greater than or equal to 0.59 W/cm2 and less than or equal to 1.18 W/cm2 to the stacked-layer film side under an atmosphere containing oxygen in which pressure is greater than or equal to 5 Pa and less than or equal to 15 Pa, the metal film is oxidized by the oxygen ion, and an oxide insulating film containing excess oxygen is formed by supplying oxygen to the oxide insulating film.
    Type: Application
    Filed: April 3, 2015
    Publication date: July 30, 2015
    Inventors: Kazuya HANAOKA, Shinya SASAGAWA
  • Publication number: 20150214377
    Abstract: A semiconductor device having favorable electric characteristics is provided. An oxide semiconductor layer includes first and second regions apart from each other, a third region which is between the first and second regions and overlaps with a gate electrode layer with a gate insulating film provided therebetween, a fourth region between the first and third regions, and a fifth region between the second and third regions. A source electrode layer includes first and second conductive layers. A drain electrode layer includes third and fourth conductive layers. The first conductive layer is formed only over the first region. The second conductive layer is in contact with an insulating layer, the first conductive layer, and the first region. The third conductive layer is formed only over the second region. The fourth conductive layer is in contact with the insulating layer, the third conductive layer, and the second region.
    Type: Application
    Filed: January 21, 2015
    Publication date: July 30, 2015
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daigo Ito, Kazuya Hanaoka
  • Publication number: 20150187917
    Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.
    Type: Application
    Filed: March 12, 2015
    Publication date: July 2, 2015
    Inventors: Sachiaki TEZUKA, Atsuo ISOBE, Takehisa HATANO, Kazuya HANAOKA