Patents by Inventor Kazuya Hanaoka

Kazuya Hanaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150179747
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a source electrode layer and a drain electrode layer which are electrically connected to an oxide semiconductor layer, a gate insulating film over the oxide semiconductor layer; the source electrode layer, and the drain electrode layer; and a gate electrode layer that overlaps with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer with the gate insulating film positioned therebetween. The source electrode layer and the drain electrode layer each include a first conductive layer and a second conductive layer. The first conductive layer is in contact with a top surface of the oxide semiconductor layer. The second conductive layer is in contact with a side surface of the oxide semiconductor layer. The first conductive layer and the second conductive layer are electrically connected to each other.
    Type: Application
    Filed: December 17, 2014
    Publication date: June 25, 2015
    Inventors: Daigo Ito, Kazuya Hanaoka
  • Publication number: 20150171222
    Abstract: A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a source electrode layer and a drain electrode layer electrically connected to the semiconductor layer, a gate insulating film over the semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer overlapping with part of the semiconductor layer, part of the source electrode layer, and part of the drain electrode layer with the gate insulating film therebetween. A cross section of the semiconductor layer in the channel width direction is substantially triangular or substantially trapezoidal. The effective channel width is shorter than that for a rectangular cross section.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 18, 2015
    Inventors: Shinya Sasagawa, Motomu Kurata, Kazuya Hanaoka, Yoshiyuki Kobayashi, Daisuke Matsubayashi
  • Patent number: 9048265
    Abstract: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: June 2, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Suguru Hondo, Akihisa Shimomura, Masaki Koyama, Motomu Kurata, Kazuya Hanaoka, Sho Nagamatsu, Kosei Nei, Toru Hasegawa
  • Publication number: 20150123121
    Abstract: A semiconductor device with a structure in which an increase in the number of oxygen vacancies in an oxide semiconductor layer can be suppressed and a method for manufacturing the semiconductor device are provided. The semiconductor device includes an oxide insulating layer; intermediate layers apart from each other over the oxide insulating layer; a source electrode layer and a drain electrode layer over the intermediate layers; an oxide semiconductor layer that is electrically connected to the source electrode layer and the drain electrode layer and is in contact with the oxide insulating layer; a gate insulating film over the source electrode layer, the drain electrode layer, and the oxide semiconductor layer; and a gate electrode layer that is over the gate insulating film and overlaps with the source electrode layer, the drain electrode layer, and the oxide semiconductor layer.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 7, 2015
    Inventors: Kazuya Hanaoka, Naoto Kusumoto
  • Patent number: 9018629
    Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: April 28, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sachiaki Tezuka, Atsuo Isobe, Takehisa Hatano, Kazuya Hanaoka
  • Patent number: 8999773
    Abstract: In a processing method of a stacked-layer film in which a metal film is provided on an oxide insulating film, plasma containing an oxygen ion is generated by applying high-frequency power with power density greater than or equal to 0.59 W/cm2 and less than or equal to 1.18 W/cm2 to the stacked-layer film side under an atmosphere containing oxygen in which pressure is greater than or equal to 5 Pa and less than or equal to 15 Pa, the metal film is oxidized by the oxygen ion, and an oxide insulating film containing excess oxygen is formed by supplying oxygen to the oxide insulating film.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: April 7, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuya Hanaoka, Shinya Sasagawa
  • Publication number: 20150060844
    Abstract: A semiconductor device that operates at high speed. A semiconductor device with favorable switching characteristics. A highly integrated semiconductor device. A miniaturized semiconductor device. The semiconductor device is formed by: forming a semiconductor film including an opening, on an insulating surface; forming a conductive film over the semiconductor film and in the opening, and removing the conductive film over the semiconductor film to form a conductive pillar in the opening; forming an island-shaped mask over the conductive pillar and the semiconductor film; etching the conductive pillar and the semiconductor film using the mask to form a first electrode and a first semiconductor; forming a gate insulating film on a top surface and a side surface of the first semiconductor; and forming a gate electrode that is in contact with a top surface of the gate insulating film and faces the top surface and the side surface of the first semiconductor.
    Type: Application
    Filed: August 19, 2014
    Publication date: March 5, 2015
    Inventors: Hidekazu Miyairi, Kazuya Hanaoka, Suguru Hondo, Shunpei Yamazaki
  • Patent number: 8936999
    Abstract: An SOI substrate including a semiconductor layer whose thickness is even is provided. According to a method for manufacturing the SOI substrate, the semiconductor layer is formed over a base substrate. In the method, a first surface of a semiconductor substrate is polished to be planarized; a second surface of the semiconductor substrate which is opposite to the first surface is irradiated with ions, so that an embrittled region is formed in the semiconductor substrate; the second surface is attached to the base substrate, so that the semiconductor substrate is attached to the base substrate; and separation in the embrittled region is performed. The value of 3? (? denotes a standard deviation of thickness of the semiconductor layer) is less than or equal to 1.5 nm.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: January 20, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Keiichi Sekiguchi, Kazuya Hanaoka, Daigo Ito
  • Publication number: 20140361293
    Abstract: To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
    Type: Application
    Filed: June 3, 2014
    Publication date: December 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Hideomi Suzawa, Kazuya Hanaoka
  • Publication number: 20140361291
    Abstract: A semiconductor device using oxide semiconductor with favorable electrical characteristics, or a highly reliable semiconductor device is provided. A semiconductor device is manufactured by: forming an oxide semiconductor layer over an insulating surface; forming source and drain electrodes over the oxide semiconductor layer; forming an insulating film and a conductive film in this order over the oxide semiconductor layer and the source and drain electrodes; etching part of the conductive film and insulating film to form a gate electrode and a gate insulating layer, and etching part of the upper portions of the source and drain electrodes to form a first covering layer containing a constituent element of the source and drain electrodes and in contact with the side surface of the gate insulating layer; oxidizing the first covering layer to form a second covering layer; and forming a protective insulating layer containing an oxide over the second covering layer.
    Type: Application
    Filed: June 2, 2014
    Publication date: December 11, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinya Sasagawa, Motomu Kurata, Kazuya Hanaoka, Suguru Hondo
  • Publication number: 20140349444
    Abstract: A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Inventors: Toshihiko SAITO, Atsuo ISOBE, Kazuya HANAOKA, Sho NAGAMATSU
  • Publication number: 20140339544
    Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
    Type: Application
    Filed: May 14, 2014
    Publication date: November 20, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazuya HANAOKA, Daisuke Matsubayashi, Yoshiyuki Kobayashi, Shunpei Yamazaki, Shinpei Matsuda
  • Publication number: 20140332800
    Abstract: To provide a semiconductor device having a structure with which the device can be easily manufactured even if the size is decreased and which can suppress a decrease in electrical characteristics caused by the decrease in the size, and a manufacturing method thereof. A source electrode layer and a drain electrode layer are formed on an upper surface of an oxide semiconductor layer. A side surface of the oxide semiconductor layer and a side surface of the source electrode layer are provided on the same surface and are electrically connected to a first wiring. Further, a side surface of the oxide semiconductor layer and a side surface of the drain electrode layer are provided on the same surface and are electrically connected to a second wiring.
    Type: Application
    Filed: May 8, 2014
    Publication date: November 13, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kazuya Hanaoka
  • Publication number: 20140326992
    Abstract: Provided is a semiconductor device that can be miniaturized in a simple process and that can prevent deterioration of electrical characteristics due to miniaturization. The semiconductor device includes an oxide semiconductor layer, a first conductor in contact with the oxide semiconductor layer, and an insulator in contact with the first conductor. Further, an opening portion is provided in the oxide semiconductor layer, the first conductor, and the insulator. In the opening portion, side surfaces of the oxide semiconductor layer, the first conductor, and the insulator are aligned, and the oxide semiconductor layer and the first conductor are electrically connected to a second conductor by side contact.
    Type: Application
    Filed: April 22, 2014
    Publication date: November 6, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Suguru HONDO, Kazuya HANAOKA, Shinya SASAGAWA, Naoto KUSUMOTO
  • Publication number: 20140319516
    Abstract: To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device formed using an oxide semiconductor and having favorable electrical characteristics. A semiconductor device includes an island-shaped semiconductor layer over an insulating surface; a pair of electrodes in contact with a side surface of the semiconductor layer and overlapping with a part of a top surface of the semiconductor layer; an oxide layer located between the semiconductor layer and the electrode and in contact with a part of the top surface of the semiconductor layer and a part of a bottom surface of the electrode; a gate electrode overlapping with the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. In addition, the semiconductor layer includes an oxide semiconductor, and the pair of electrodes includes Al, Cr, Cu, Ta, Ti, Mo, or W.
    Type: Application
    Filed: April 22, 2014
    Publication date: October 30, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro TANAKA, Kazuya HANAOKA
  • Patent number: 8841675
    Abstract: A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: September 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Saito, Atsuo Isobe, Kazuya Hanaoka, Sho Nagamatsu
  • Publication number: 20140252351
    Abstract: A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.
    Type: Application
    Filed: May 22, 2014
    Publication date: September 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo ISOBE, Yutaka OKAZAKI, Kazuya HANAOKA, Shinya SASAGAWA, Motomu KURATA
  • Publication number: 20140203978
    Abstract: In a semiconductor device in which a copper plating layer is used for a conductor of an antenna and in which an integrated circuit and the antenna are formed over the same substrate, an object is to prevent an adverse effect on electrical characteristics of a circuit element due to diffusion of copper, as well as to provide a copper plating layer with favorable adhesiveness. Another object is to prevent a defect in the semiconductor device that stems from poor connection between the antenna and the integrated circuit, in the semiconductor device in which the integrated circuit and the antenna are formed over the same substrate. In the semiconductor device, a copper plating layer is used for the antenna, an alloy of Ag, Pd, and Cu is used for a seed layer thereof, and TiN or Ti is used for a barrier layer.
    Type: Application
    Filed: March 20, 2014
    Publication date: July 24, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Teruyuki Fujii, Kazuya Hanaoka
  • Patent number: 8748241
    Abstract: A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Yutaka Okazaki, Kazuya Hanaoka, Shinya Sasagawa, Motomu Kurata
  • Patent number: 8735263
    Abstract: An SOI substrate is manufactured by the following steps: a semiconductor substrate is irradiated with an ion beam in which the proportion of H2O+ to hydrogen ions (H3+) is lower than or equal to 3%, preferably lower than or equal to 0.3%, whereby an embrittled region is formed in the semiconductor substrate; a surface of the semiconductor substrate and a surface of a base substrate are disposed so as to be in contact with each other, whereby the semiconductor substrate and the base substrate are bonded; and a semiconductor layer is separated along the embrittled region from the semiconductor substrate which is bonded to the base substrate by heating the semiconductor substrate and the base substrate, so that the semiconductor layer is formed over the base substrate.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: May 27, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kazuya Hanaoka