Patents by Inventor Kazuya Nagaseki

Kazuya Nagaseki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040251229
    Abstract: By steps of forming first masks 13, 14 each having a first pattern on a first surface of a substrate 11 on which a membrane is to be formed, etching the first surface of the substrate 11 by using the first masks 13, 14 to forming first support beams 15, positioning a second surface of the substrate 11 on the basis of the first pattern on the first surface, forming a second mask 17 having a second pattern on the second surface of the substrate 11 based on the alignment and etching the second surface of the substrate 11 in dry by using the second mask 17 to form the second support beams 20, a membrane member 22a where the first and second support beams 15, 20 are formed on both surfaces of the membrane 12 is manufactured. Consequently, it is possible to provide the membrane member that is sufficient in strength and is hard to be deformed by heat.
    Type: Application
    Filed: June 10, 2004
    Publication date: December 16, 2004
    Inventors: Katsuya Okumura, Kazuya Nagaseki, Naoyuki Satoh, Koji Maruyama
  • Publication number: 20040238125
    Abstract: Each magnet segment 22 of a magnetic field forming mechanism 21 is constructed such that, after the magnetic pole of each magnet segment 22 set to face a vacuum chamber 1 as shown in FIG. 3A, adjoining magnet segments 22 are synchronously rotated in opposite directions, and hence every other magnet element 22 is rotated in the same direction as shown in FIGS. 3B, 3C to thereby control the status of a multi-pole magnetic field formed in the vacuum chamber 1 and surrounding a semiconductor wafer W. Therefore, the status of a multi-pole magnetic field can be easily controlled and set appropriately according to a type of plasma processing process to provide a good processing easily.
    Type: Application
    Filed: March 19, 2004
    Publication date: December 2, 2004
    Inventors: Hiroo Ono, Koichi Tateshita, Masanobu Honda, Kazuya Nagaseki, Daisuke Hayashi
  • Publication number: 20040219797
    Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.
    Type: Application
    Filed: June 4, 2004
    Publication date: November 4, 2004
    Inventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
  • Patent number: 6793832
    Abstract: A wafer W is placed on a lower electrode 106 provided inside a processing chamber 102 of an etching apparatus 100 and a gas containing C4F8 is induced into the processing chamber 102. A controller 112 implements control to apply 27 MHz power to an upper electrode 114 from a plasma generating power supply 120 and to intermittently apply 800 KHz power to the lower electrode 106 from a biasing power supply 108. While the biasing power is on, an insulating film 202 constituted of SiO2 at the wafer W is etched, whereas a polymer (protective film) 208 is formed at a photoresist film 206 while the biasing power is off. Adopting the above method, contact holes achieving a specific shape can be formed by improving the selectivity of the insulating film relative to the photoresist film.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: September 21, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Takeshi Saito, Kazuya Nagaseki
  • Publication number: 20040097079
    Abstract: This invention provides the following high-rate silicon etching method. An object to be processed W having a silicon region is so set as to be in contact with a process space in a process chamber that can be held in vacuum. An etching gas is introduced into the process space to form a gas atmosphere at a gas pressure of 13 Pa to 1,333 Pa (100 mTorr to 10 Torr). A plasma is generated upon application of RF power. In the plasma, the sum of the number of charged particles such as ions and the number of radicals increases, and etching of the silicon region is performed at a higher rate than in conventional etching.
    Type: Application
    Filed: March 14, 2003
    Publication date: May 20, 2004
    Inventors: Takanori Mimura, Kazuya Nagaseki, Itsuko Sakai, Tokuhisa Ohiwa
  • Publication number: 20040097090
    Abstract: A Si etching method etches a Si wafer held on a susceptor placed in a processing vessel by a plasma-assisted etching process. A mixed etching gas prepared by mixing fluorosulfur gas, such as SF6 gas, or fluorocarbon gas, O2 gas and fluorosilicon gas, such as SiF4 gas is supplied into the processing vessel. RF power of 40 MHz or above is applied to the mixed etching gas to generate a plasma. The Si wafer is etched with radicals and ions contained in the plasma.
    Type: Application
    Filed: August 26, 2003
    Publication date: May 20, 2004
    Inventors: Takanori Mimura, Kazuya Nagaseki, Kenji Yamamoto, Katsumi Horiguchi, Yahui Huang
  • Publication number: 20030102087
    Abstract: In a plasma processing apparatus of this invention, a ring-like segment magnet is formed around an upper portion of a chamber so a magnetic field is generated around a processing space. The segment magnet can be rotated by a rotating mechanism in the circumferential direction of the chamber. A magnetic field is generated around the processing space by a magnetic field generating means. That position where a substrate to be processed is present is set in a substantial non-magnetic field state, so charge-up damage is prevented. Due to the plasma confining effect of this magnetic field, the plasma processing rate of the substrate to be processed is set to be almost equal between the edge and center of the substrate to be processed, thereby making the processing rate uniform. A pivoting means is provided so as to alter the gap between the magnets or directions of magnetization thereof.
    Type: Application
    Filed: November 29, 2002
    Publication date: June 5, 2003
    Inventors: Youbun Ito, Takayuki Katsunuma, Koichiro Inazawa, Tomoki Suemasa, Jun Hirose, Hiroo Ono, Kazuya Nagaseki
  • Patent number: 6544380
    Abstract: An apparatus for treating a substrate which includes a chamber and an opening formed in the chamber allowing the substrate to be conveyed into the chamber or taken out thereof. The chamber, also, includes a detachable baffle plate that fits around an electrode. For treatment to commence, the substrate is placed on the electrode and the chamber is exhausted of or supplied with gases. The electrode is then vertically lifted together with the baffle plate and the baffle plate is moved either to a position that is higher in level than an upper end of the opening of the chamber or to a position that is lower in level than a lower end of the opening of the chamber. This allows the baffle plate to shield a region near the opening of the chamber from a treatment region and allows reaction products to be adhered to the baffle plate.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: April 8, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Masayuki Tomoyasu, Akira Koshiishi, Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Yukio Naito, Kazuya Nagaseki, Keizo Hirose, Mitsuaki Komino, Hiroto Takenaka, Hiroshi Nishikawa, Yoshio Sakamoto
  • Publication number: 20020088547
    Abstract: A plasma treatment method comprising exhausting a process chamber so as to decompress the process chamber, mounting a wafer on a suscepter, supplying a process gas to the wafer through a shower electrode, applying high frequency power, which has a first frequency f1 lower than an inherent lower ion transit frequencies of the process gas, to the suscepter, and applying high frequency power, which has a second frequency f2 higher than an inherent upper ion transit frequencies of the process gas, whereby a plasma is generated in the process chamber and activated species influence the wafer.
    Type: Application
    Filed: February 19, 2002
    Publication date: July 11, 2002
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masayuki Tomoyasu, Akira Koshiishi, Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Yukio Naito, Kazuya Nagaseki, Keizo Hirose, Mitsuaki Komino, Hiroto Takenaka, Hiroshi Nishikawa, Yoshio Sakamoto
  • Patent number: 6391147
    Abstract: A plasma treatment method comprising exhausting a process chamber so as to decompress the process chamber, mounting a wafer on a suscepter, supplying a process gas to the wafer through a shower electrode, applying high frequency power, which has a first frequency f1 lower than an inherent lower ion transit frequencies of the process gas, to the suscepter, and applying high frequency power, which has a second frequency f2 higher than an inherent upper ion transit frequencies of the process gas, whereby a plasma is generated in the process chamber and activated species influence the wafer.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: May 21, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Yukio Naito, Kazuya Nagaseki, Keizo Hirose
  • Patent number: 6365060
    Abstract: A lower electrode 106 on which a wafer W can be placed and an upper electrode 108 are provided facing each other inside a processing chamber 102 of an etching apparatus 100. A first high frequency power supply 116 capable of outputting high frequency power for plasma generation is connected to the upper electrode 108 via a first matching device 114. A second high frequency power supply 122 capable of outputting high frequency power for biasing having a frequency lower than the frequency of the high frequency power for plasma generation is connected to the lower electrode 106 via a second matching device 120. Power that enables, at least, matching of the high frequency power for biasing is applied to the lower electrode 106 concurrently with the application of the high frequency power for plasma generation at a stable power level to the upper electrode 108. When the matching period has elapsed, the high frequency power for biasing applied to the lower electrode 106 is raised to the stable power level.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: April 2, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Kazuya Nagaseki, Hiroki Yamazaki
  • Publication number: 20010013504
    Abstract: A plasma treatment method comprising exhausting a process chamber so as to decompress the process chamber, mounting a wafer on a suscepter, supplying a process gas to the wafer through a shower electrode, applying high frequency power, which has a first frequency f1 lower than an inherent lower ion transit frequencies of the process gas, to the suscepter, and applying high frequency power, which has a second frequency f2 higher than an inherent upper ion transit frequencies of the process gas, whereby a plasma is generated in the process chamber and activated species influence the wafer.
    Type: Application
    Filed: December 15, 2000
    Publication date: August 16, 2001
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Yukio Naito, Kazuya Nagaseki, Keizo Hirose
  • Patent number: 6264788
    Abstract: A plasma treatment method comprising exhausting a process chamber so as to decompress the process chamber, mounting a wafer on a suscepter, supplying a process gas to the wafer through a shower electrode, applying high frequency power, which has a first frequency f1 lower than an inherent lower ion transit frequencies of the process gas, to the suscepter, and applying high frequency power, which has a second frequency f2 higher than an inherent upper ion transit frequencies of the process gas, whereby a plasma is generated in the process chamber and activated species influence the water.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: July 24, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Masayuki Tomoyasu, Akira Koshiishi, Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Yukio Naito, Kazuya Nagaseki, Keizo Hirose, Mitsuaki Komino, Hiroto Takenaka, Hiroshi Nishikawa, Yoshio Sakamoto
  • Patent number: 6106737
    Abstract: A plasma treatment method comprising exhausting a process chamber so as to decompress the process chamber, mounting a wafer on a suscepter, supplying a process gas to the wafer through a shower electrode, applying high frequency power, which has a first frequency f.sub.1 lower than an inherent lower ion transit frequencies of the process gas, to the suscepter, and applying high frequency power, which has a second frequency f.sub.2 higher than an inherent upper ion transit frequencies of the process gas, whereby a plasma is generated in the process chamber and activated species influence the wafer.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: August 22, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Masayuki Tomoyasu, Akira Koshiishi, Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Yukio Naito, Kazuya Nagaseki, Keizo Hirose, Mitsuaki Komino, Hiroto Takenaka, Hiroshi Nishikawa, Yoshio Sakamoto
  • Patent number: 6074518
    Abstract: A plasma processing apparatus comprises a chamber, and an upper electrode and a lower electrode, parallelly provided in the chamber to oppose each other at a predetermined interval, for defining a plasma generation region between the electrodes. An object to be processed is mounted on the lower electrode. RF powers are supplied to the electrodes, so that a plasma generates between the electrodes, thereby performing a plasma process with respect to the object to be processed. A cylindrical ground electrode is provided around the plasma generation region in the chamber, for enclosing the plasma in the plasma generation region, and has a plurality of through holes for passing a process gas.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: June 13, 2000
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Hiroshi Tsuchiya, Masayuki Tomoyasu, Yukio Naito, Kazuya Nagaseki, Ryo Nonaka, Keizo Hirose, Yoshio Fukasawa, Akira Koshiishi, Isao Kobayashi
  • Patent number: 5942075
    Abstract: A plasma processing apparatus includes a processing vessel for accommodating an object to be processed, a processing supplying mechanism for supplying processing gas into the processing vessel, first and second electrodes arranged to oppose each other in the processing vessel, and high-frequency power supply for supplying a high-frequency power to at least one of the first and second electrodes. The apparatus forms a plasma of the processing gas by using discharge occurring between the first and second electrodes due to the high-frequency power and performs a plasma process for the object by using the plasma. The surface of a solid except for the object to be processed in the processing vessel has a corner portion and a portion other than the corner portion, and the solid surface has a shape by which the thickness of a sheath formed between the solid surface and the plasma is nearly uniform in the corner portion and the other portion.
    Type: Grant
    Filed: June 17, 1996
    Date of Patent: August 24, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Kazunori Nagahata, Kazuya Nagaseki
  • Patent number: 5919332
    Abstract: A lower insulating member 13 is arranged around a suscepter 6 as a lower electrode, and an upper insulating member 31 is arranged around an upper electrode 21. An outer end portion 31a of the upper insulating member is positioned outside an lower insulating member 13, to be lower than the upper surface of a wafer W. The narrowest distance between the lower insulating member 13 and the upper insulating member 31 is arranged to be smaller than a gap G between electrodes. Diffusion of a plasma generated between electrodes is restricted and prevented from spreading to the sides, so that inner walls of a processing container 3 are not sputtered.
    Type: Grant
    Filed: June 6, 1996
    Date of Patent: July 6, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Akira Koshiishi, Masahiro Ogasawara, Keizo Hirose, Kazuya Nagaseki, Riki Tomoyoshi, Makoto Aoki
  • Patent number: 5698062
    Abstract: A plasma treatment apparatus comprising a chamber earthed, a vacuum pump for exhausting the chamber, a suscepter on which a wafer is mounted, a shower electrode arranged in the chamber, opposing to the suscepter, a unit for supplying plasma generating gas to the wafer on the suscepter through the shower electrode, a first radio frequency power source for adding radio frequency voltage, which has a first frequency f.sub.1, to both of the suscepter and the shower electrode, a second radio frequency power source for adding radio frequency voltage, which has a second frequency f.sub.2 higher than the first frequency f.sub.1, at least to one of the suscepter and the shower electrode, a transformer whose primary side is connected to the first radio frequency power source and whose secondary side to first and second electrodes, and a low pass filter arranged in a circuit on the secondary side of the transformer, and serving to allow radio frequency voltage, which has the first frequency f.sub.
    Type: Grant
    Filed: September 25, 1995
    Date of Patent: December 16, 1997
    Assignee: Tokyo Electron Limited
    Inventors: Takao Sakamoto, Kazuhiro Tahara, Kenji Momose, Kosuke Imafuku, Shosuke Endo, Yukio Naito, Kazuya Nagaseki, Keizo Hirose
  • Patent number: 5539274
    Abstract: An electron beam excited plasma system is provided with a first auxiliary electrode for initial discharge, an anode having an opening, a cathode, having an opening and located between the anode and the first auxiliary electrode, for producing an initial discharge between the first auxiliary electrode and the cathode, and for producing a plasma-generating discharge between the anode and the cathode, a second auxiliary electrode, having an opening and located between the cathode and the anode, for facilitating the generation of the discharge plasma between the cathode and the anode, a gas supply device for supplying a discharge plasma-generating gas into the region between the cathode and the anode, and magnetic field generator for generating a magnetic field and for applying this magnetic field to the region between the cathode and the anode, such that a cusp magnetic field is generated in the vicinity of the cathode.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: July 23, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Youichi Araki, Kazuya Nagaseki, Shuji Mochizuki
  • Patent number: 5514425
    Abstract: A thin film-forming method according to the present invention is characterized by comprising the steps of introducing TiCl.sub.4, hydrogen, nitrogen and NF.sub.3 into a film-forming chamber containing a semiconductor substrate (1) having a groove made in its surface, after the chamber has been evacuated to 10.sup.-4 Torr or less; and converting these gases into plasma, thereby forming a thin TiN film on only that portion of the groove which is other than the wall surfaces of the groove.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: May 7, 1996
    Assignees: Kabushiki Kaisha Toshiba, Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Hitoshi Ito, Kyoichi Suguro, Nobuo Hayasaka, Haruo Okano, Shinji Himori, Kazuya Nagaseki, Syuji Mochizuki