Patents by Inventor Kazuyoshi Inoue

Kazuyoshi Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210020784
    Abstract: A field effect transistor including: a substrate, and at least gate electrode, a gate insulating film, a semiconductor layer, a protective layer for the semiconductor layer, a source electrode and a drain electrode provided on the substrate, wherein the source electrode and the drain electrode are connected with the semiconductor layer therebetween, the gate insulating film is between the gate electrode and the semiconductor layer, the protective layer is on at least one surface of the semiconductor layer, the semiconductor layer includes an oxide containing In atoms, Sn atoms and Zn atoms, the atomic composition ratio of Zn/(In+Sn+Zn) is 25 atom % or more and 75 atom % or less, and the atomic composition ratio of Sn/(In+Sn+Zn) is less than 50 atom %.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 21, 2021
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Koki YANO, Hirokazu KAWASHIMA, Kazuyoshi INOUE
  • Patent number: 10833201
    Abstract: A field effect transistor including: a substrate, and at least gate electrode, a gate insulating film, a semiconductor layer, a protective layer for the semiconductor layer, a source electrode and a drain electrode provided on the substrate, wherein the source electrode and the drain electrode are connected with the semiconductor layer therebetween, the gate insulating film is between the gate electrode and the semiconductor layer, the protective layer is on at least one surface of the semiconductor layer, the semiconductor layer includes an oxide containing In atoms, Sn atoms and Zn atoms, the atomic composition ratio of Zn/(In+Sn+Zn) is 25 atom % or more and 75 atom % or less, and the atomic composition ratio of Sn/(In+Sn+Zn) is less than 50 atom %.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: November 10, 2020
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Koki Yano, Hirokazu Kawashima, Kazuyoshi Inoue
  • Publication number: 20200325072
    Abstract: An oxide sintered body is characterized in that it comprises an oxide including an In element, a Zn element, a Sn element and a Y element and that a sintered body density is equal to or more than 100.00% of a theoretical density.
    Type: Application
    Filed: April 26, 2017
    Publication date: October 15, 2020
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Futoshi UTSUNO, Shigekazu TOMAI, Masatoshi SHIBATA, Mami ITOSE
  • Publication number: 20200140337
    Abstract: A sintered oxide contains In element, Y element, and Ga element at respective atomic ratios as defined in formulae (1) to (3) below, 0.80?In/(In+Y+Ga)?0.96??(1), 0.02?Y/(In+Y+Ga)?0.10??(2), and 0.02?Ga/(In+Y+Ga)?0.10??(3), and Al element at an atomic ratio as defined in a formula (4) below, 0.005?Al/(In+Y+Ga+Al)?0.07??(4), where In, Y, Ga, and Al in the formulae represent the number of atoms of the In element, Y element, Ga element, and Al element in the sintered oxide, respectively.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 7, 2020
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Masatoshi SHIBATA, Emi KAWASHIMA, Yuki TSURUMA, Shigekazu TOMAI
  • Patent number: 10644163
    Abstract: A field effect transistor including: a substrate, and at least gate electrode, a gate insulating film, a semiconductor layer, a protective layer for the semiconductor layer, a source electrode and a drain electrode provided on the substrate, wherein the source electrode and the drain electrode are connected with the semiconductor layer therebetween, the gate insulating film is between the gate electrode and the semiconductor layer, the protective layer is on at least one surface of the semiconductor layer, the semiconductor layer includes an oxide containing In atoms, Sn atoms and Zn atoms, the atomic composition ratio of Zn/(In+Sn+Zn) is 25 atom % or more and 75 atom % or less, and the atomic composition ratio of Sn/(In+Sn+Zn) is less than 50 atom %.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: May 5, 2020
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Koki Yano, Hirokazu Kawashima, Kazuyoshi Inoue
  • Patent number: 10636914
    Abstract: A crystalline oxide semiconductor thin film that is composed mainly of indium oxide and comprises surface crystal grains having a single crystal orientation.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: April 28, 2020
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi Inoue, Futoshi Utsuno, Yuki Tsuruma, Shigekazu Tomai, Kazuaki Ebata
  • Publication number: 20200052130
    Abstract: A sintered oxide includes an In2O3 crystal, and a crystal A whose diffraction peak is in an incidence angle (2?) range defined by (A) to (F) below as measured by X-ray (Cu—K ? ray) diffraction measurement: 31.0 to 34.0 degrees . . . (A); 36.0 to 39.0 degrees . . . (B); 50.0 to 54.0 degrees . . . (C); 53.0 to 57.0 degrees . . . (D); 9.0 to 11.0 degrees . . . (E); and 19.0 to 21.0 degrees . . . (F).
    Type: Application
    Filed: January 31, 2018
    Publication date: February 13, 2020
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Masatoshi SHIBATA
  • Patent number: 10539509
    Abstract: A display system which has: a display device configured to be able to display an image superimposed on a reality space; and a managing device configured to manage the image the display device displays, wherein the display device has a display processor configured to read at least one of a qualified image and a disqualified image for an inspection target existing in the reality space from a memory and to display the read image superimposed on the reality space seen through an optical see-through displayer, on the displayer.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: January 21, 2020
    Assignee: NS SOLUTIONS CORPORATION
    Inventors: Kazuyoshi Inoue, Yoichiro Sumito
  • Publication number: 20190378933
    Abstract: An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios of 0.01?Ga/(In+Ga+Sn)?0.30 . . . (1), 0.01?Sn/(In+Ga+Sn)?0.40 . . . (2), and 0.55?In/(In+Ga+Sn)?0.98 . . . (3), and a rare-earth element X at an atomic ratio of 0.03?X/(In+Ga+Sn+X)?0.25 . . . (4).
    Type: Application
    Filed: February 15, 2018
    Publication date: December 12, 2019
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Masatoshi SHIBATA
  • Publication number: 20190348505
    Abstract: An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios satisfying formulae (1) to (3): 0.01?Ga/(In+Ga+Sn)?0.30 . . . (1); 0.01?Sn/(In+Ga+Sn)?0.40 . . . (2); and 0.55?In/(In+Ga+Sn)?0.98 . . . (3), and Al at an atomic ratio satisfying a formula (4): 0.05?Al/(In+Ga+Sn+Al)?0.30 . . . (4).
    Type: Application
    Filed: January 23, 2018
    Publication date: November 14, 2019
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Masatoshi SHIBATA
  • Publication number: 20190218145
    Abstract: An oxide sintered body includes a bixbyite phase represented by In2O3, and a garnet phase represented by Y3In2Ga3O12.
    Type: Application
    Filed: June 16, 2017
    Publication date: July 18, 2019
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Shigekazu TOMAI, Masatoshi SHIBATA, Motohiro TAKESHIMA
  • Publication number: 20190177176
    Abstract: A garnet compound represented by a general formula (I): Ln3In2Ga3-XAlXO12 (I) (in the formula, Ln represents one or more metal elements selected from La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu; and X satisfies an expression 0?X<3).
    Type: Application
    Filed: August 25, 2017
    Publication date: June 13, 2019
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Shigekazu TOMAI, Masatoshi SHIBATA
  • Patent number: 10311617
    Abstract: Included are: an acceptor configured to accept an operation result of success or failure of an operation by an operator, the operation result being obtained in a case where an optical see-through displayer worn by the operator displays a support image candidate for the operation by the operator superimposed on a reality space; a storing unit configured to store each support image candidate out of a plurality of the support image candidates for the operation and the operation result in a memory, associating the support image candidate with the operation result being in a case where the support image is displayed; and a selector configured to select the support image candidate to be set as the support image of the operation from among the plurality of the support image candidates, based on the operation result.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: June 4, 2019
    Assignee: NS SOLUTIONS CORPORATION
    Inventor: Kazuyoshi Inoue
  • Publication number: 20190041649
    Abstract: The problem is solved by a display system including: a teaching image acquirer that acquires a registered teaching image for work; a displayer that displays the teaching image for the work acquired by the teaching image acquirer on a display unit of a display device worn by a worker who performs the work to display the image for the work superimposed on a real space; a captured image acquirer that acquires a captured image regarding the work by the worker; and a generator that generates an instruction image, based on the captured image acquired by the captured image acquirer and on the teaching image for the work acquired by the teaching image acquirer, wherein the displayer displays the instruction image generated by the generator on the display unit to display the instruction image further superimposed on the real space.
    Type: Application
    Filed: February 22, 2017
    Publication date: February 7, 2019
    Inventor: Kazuyoshi INOUE
  • Publication number: 20190043385
    Abstract: The problem is solved by an information processing system including: a standard data acquirer that acquires registered standard data on work; a work data acquirer that acquires work data on a worker performing the work; a determiner that determines whether or not a difference between the standard data acquired by the standard data acquirer and the work data acquired by the work data acquirer is a threshold value or more; a generator that generates an instruction image regarding correction of the work according to the difference when the difference is determined to be the threshold value or more by the determiner; and a displayer that displays the instruction image generated by the generator on a display unit of a display device worn by the worker to display the instruction image superimposed on a real space.
    Type: Application
    Filed: February 22, 2017
    Publication date: February 7, 2019
    Inventor: Kazuyoshi INOUE
  • Publication number: 20190012819
    Abstract: Included are: an acceptor configured to accept an operation result of success or failure of an operation by an operator, the operation result being obtained in a case where an optical see-through displayer worn by the operator displays a support image candidate for the operation by the operator superimposed on a reality space; a storing unit configured to store each support image candidate out of a plurality of the support image candidates for the operation and the operation result in a memory, associating the support image candidate with the operation result being in a case where the support image is displayed; and a selector configured to select the support image candidate to be set as the support image of the operation from among the plurality of the support image candidates, based on the operation result.
    Type: Application
    Filed: June 16, 2016
    Publication date: January 10, 2019
    Inventor: Kazuyoshi INOUE
  • Publication number: 20180238810
    Abstract: A display system which has: a display device configured to be able to display an image superimposed on a reality space; and a managing device configured to manage the image the display device displays, wherein the display device has a display processor configured to read at least one of a qualified image and a disqualified image for an inspection target existing in the reality space from a memory and to display the read image superimposed on the reality space seen through an optical see-through displayer, on the displayer.
    Type: Application
    Filed: June 27, 2016
    Publication date: August 23, 2018
    Inventors: Kazuyoshi INOUE, Yoichiro SUMITO
  • Publication number: 20180219098
    Abstract: A crystalline oxide semiconductor thin film that is composed mainly of indium oxide and comprises surface crystal grains having a single crystal orientation.
    Type: Application
    Filed: July 29, 2016
    Publication date: August 2, 2018
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Futoshi UTSUNO, Yuki TSURUMA, Shigekazu TOMAI, Kazuaki EBATA
  • Publication number: 20160343554
    Abstract: An oxide sintered body comprising a bixbyite phase composed of In2O3 and an A3B5O12 phase (wherein A is one or more elements selected from the group consisting of Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, and B is one or more elements selected from the group consisting of Al and Ga).
    Type: Application
    Filed: December 18, 2014
    Publication date: November 24, 2016
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Shigekazu TOMAI, Kazuyoshi INOUE, Kazuaki EBATA, Masatoshi SHIBATA, Futoshi UTSUNO, Yuki TSURUMA, Yu ISHIHARA
  • Publication number: 20160201187
    Abstract: A field effect transistor including: a substrate, and at least gate electrode, a gate insulating film, a semiconductor layer, a protective layer for the semiconductor layer, a source electrode and a drain electrode provided on the substrate, wherein the source electrode and the drain electrode are connected with the semiconductor layer therebetween, the gate insulating film is between the gate electrode and the semiconductor layer, the protective layer is on at least one surface of the semiconductor layer, the semiconductor layer includes an oxide containing In atoms, Sn atoms and Zn atoms, the atomic composition ratio of Zn/(In+Sn+Zn) is 25 atom % or more and 75 atom % or less, and the atomic composition ratio of Sn/(In+Sn+Zn) is less than 50 atom %.
    Type: Application
    Filed: March 21, 2016
    Publication date: July 14, 2016
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Koki YANO, Hirokazu KAWASHIMA, Kazuyoshi INOUE