Abstract: A regulator circuit includes: a detection circuit, for outputting a feedback voltage in accordance with an output voltage; a reference voltage input section; a feedback voltage input section; an operational amplification circuit, for comparing a reference voltage and the feedback voltage and outputting a voltage as a comparison result; an output circuit, for supplying an output voltage in accordance with the output of the operational amplification circuit; a connection/disconnection circuit, for connecting or disconnecting the output terminal of the detection circuit and the feedback voltage input section; and a voltage setup circuit, for setting for the feedback voltage input section a predetermined voltage. In the standby state, the connection/disconnection circuit disconnects the output terminal of the detection circuit from the feedback voltage input section, and the voltage setup circuit sets a predetermined voltage for the feedback input section.

Abstract: An engine start control system for starting the engine of a hybrid vehicle operated in an EV drive mode. The system responds quickly to an acceleration request while limiting unpleasant deceleration sensations. The hybrid vehicle has a first clutch disposed between the engine and motor/generator. An electric drive mode exists in which the first clutch is disengaged and the driving torque is provided only by the motor/generator, and a hybrid drive mode exists in which the first clutch is engaged and the driving torque is provided by both the engine and motor/generator. The system uses an engine start shift pattern that is high-geared as compared with a normal shift pattern. Shift control of the transmission is performed using the engine start shift pattern when an engine start request arises. The engine is started by controlling the engagement of the first clutch after performing the shift control.

Abstract: A nonvolatile semiconductor memory of virtual ground array in which a common connection of the sources and a common connection of the drains of nonvolatile memory cells arranged in rows and columns in a memory cell array are used as bit lines, the nonvolatile memory cells including: a reference cell from which a characteristic used as a reference in a differential readout determination operation is obtained; and a neighbor cell at one side of the reference cell, the neighbor cell sharing one of the source and the drain of the reference cell and being connected to a word line which is connected to the reference cell, wherein the nonvolatile semiconductor memory includes a neighbor cell programming circuit to set the neighbor cell to a programmed state when the word line is activated to set the reference cell to a conduction state, the neighbor cell being kept in a non-conduction state during the programmed state.

Abstract: A semiconductor memory device includes a selector line selection circuit for selecting, in a read operation, a selector line for connecting a first main bit line connected to the sense amplifier with a sub-bit line to which the memory cell being read is connected, a selector line for connecting the first main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs, a selector line for connecting a second main bit line connected to the sense amplifier with a sub-bit line to which the reference cell is connected, and a selector line for connecting the second main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs.

Abstract: A hybrid-vehicle engine start controlling apparatus includes an engine, a motor connected to a vehicle driving shaft, a first engaging element provided between the engine and the motor for connecting and disconnecting the engine and the motor and engine start control means. The engine start controlling means is configured to start the engine by increasing a driving torque of the motor and increasing a transmission torque capacity of the first engaging element so as to increase a rotation speed of the engine by the driving torque of the motor in a state in which the engine is stopped and the first engaging element is released. The engine start controlling means includes a first engaging phase for increasing the transmission torque capacity of the first engaging element at a first velocity, and a second engaging phase for changing the transmission torque capacity at a second velocity lower than the first velocity.

Abstract: To provide a non-volatile semiconductor memory device which can increase the speed of a writing operation of a physical checker pattern, a logical checker pattern, etc. carried out in an inspection process. First group writing circuits 30a, 30c connected to even-numbered bit lines BL0, BL2 and second group writing circuits 30b, 30d connected to odd-numbered bit lines BL1, BL3 are controlled to an active state and a non-active state respectively on the basis of control signals TSE, TSO.

Abstract: A nonvolatile semiconductor memory of virtual ground array in which a common connection of the sources and a common connection of the drains of nonvolatile memory cells arranged in rows and columns in a memory cell array are used as bit lines, the nonvolatile memory cells including: a reference cell from which a characteristic used as a reference in a differential readout determination operation is obtained; and a neighbor cell at one side of the reference cell, the neighbor cell sharing one of the source and the drain of the reference cell and being connected to a word line which is connected to the reference cell, wherein the nonvolatile semiconductor memory includes a neighbor cell programming circuit to set the neighbor cell to a programmed state when the word line is activated to set the reference cell to a conduction state, the neighbor cell being kept in a non-conduction state during the programmed state.

Abstract: A nonvolatile semiconductor memory according to the invention includes a memory cell array comprised of a multivalued memory cell for storing data on a plurality of pages, a data processing circuit for carrying out a read operation for reading data from the memory cell array and a programming operation for writing the data to the memory cell array on a page unit, and a control circuit for controlling an operation of the data processing circuit, the control circuit changing an assignment of data corresponding to a threshold voltage distribution of the multivalued memory cell depending on order of a page over which the programming operation is to be carried out in such a manner that the programming operation is executed by a transition of a threshold voltage of the multivalued memory cell in a positive direction.

Abstract: A hybrid vehicle drive control system is configured to perform engine startup when switching from an electric drive mode to a hybrid drive mode, without creating a sense of output torque loss. In particular, a controller selectively controls a first clutch disposed between the engine and the motor/generator and a second clutch disposed between the motor/generator and a drive wheel to switch between an electric drive mode in which the first clutch is released and the second clutch is engaged, and a hybrid drive mode in which both the first and second clutches are engaged. The controller sets the second torque transfer capacity to a value that is more than zero and less than the target motor/generator torque of the motor/generator when switching from the electric drive mode to the hybrid drive mode and when starting the engine.

Abstract: A regulator circuit includes: a detection circuit, for outputting a feedback voltage in accordance with an output voltage; a reference voltage input section; a feedback voltage input section; an operational amplification circuit, for comparing a reference voltage and the feedback voltage and outputting a voltage as a comparison result; an output circuit, for supplying an output voltage in accordance with the output of the operational amplification circuit; a connection/disconnection circuit, for connecting or disconnecting the output terminal of the detection circuit and the feedback voltage input section; and a voltage setup circuit, for setting for the feedback voltage input section a predetermined voltage. In the standby state, the connection/disconnection circuit disconnects the output terminal of the detection circuit from the feedback voltage input section, and the voltage setup circuit sets a predetermined voltage for the feedback input section.

Abstract: A write circuit arranged per a bit line or a plurality of bit lines includes a plurality of latch circuits for storing data written to a plurality of pages and bit line connection circuits for connecting the plurality of latch circuits and bit lines and performs write operation to a plurality of pages by repeating continuous program operation which continuously performs program operations on a plurality of pages while a voltage generating circuit is continuously generating a voltage necessary for program operation and continuous verify operation which continuously performs verify operations on a plurality of pages while the voltage generating circuit is continuously generating a voltage necessary for verify operation.

Abstract: An inventive nonvolatile semiconductor memory device is provided, in advance, with a column latch circuit 29 for performing a batch write operation (page latching operation, page programming operation, and verifying operation), and the column latch circuit 29 is utilized to realize a security function. The inventive memory device is further provided with a security control circuit 41 for carrying out control so that a password for deactivating the security function is stored in the column latch circuit 29 and a verifying operation is performed to determine whether the password stored in the column latch circuit 29 is identical to a security function deactivation code stored in a deactivation code storage 13. If it is determined that the password and the security function deactivation code are identical as a result of the verifying operation, the security function is deactivated.

Abstract: To provide a non-volatile semiconductor memory device which can increase the speed of a writing operation of a physical checker pattern, a logical checker pattern, etc. carried out in an inspection process. First group writing circuits 30a, 30c connected to even-numbered bit lines BL0, BL2 and second group writing circuits 30b, 30d connected to odd-numbered bit lines BL1, BL3 are controlled to an active state and a non-active state respectively on the basis of control signals TSE, TSO.

Abstract: A write circuit arranged per a bit line or a plurality of bit lines includes a plurality of latch circuits for storing data written to a plurality of pages and bit line connection circuits for connecting the plurality of latch circuits and bit lines and performs write operation to a plurality of pages by repeating continuous program operation which continuously performs program operations on a plurality of pages while a voltage generating circuit is continuously generating a voltage necessary for program operation and continuous verify operation which continuously performs verify operations on a plurality of pages while the voltage generating circuit is continuously generating a voltage necessary for verify operation.

Abstract: An inventive nonvolatile semiconductor memory device is provided, in advance, with a column latch circuit 29 for performing a batch write operation (page latching operation, page programming operation, and verifying operation), and the column latch circuit 29 is utilized to realize a security function. The inventive memory device is further provided with a security control circuit 41 for carrying out control so that a password for deactivating the security function is stored in the column latch circuit 29 and a verifying operation is performed to determine whether the password stored in the column latch circuit 29 is identical to a security function deactivation code stored in a deactivation code storage 13. If it is determined that the password and the security function deactivation code are identical as a result of the verifying operation, the security function is deactivated.

Abstract: In control apparatus and method for a four-wheel drive vehicle, when the vehicle in which two tire wheels having different radii from those of originally equipped tire wheels are mounted as either front tire wheels or rear tire wheels is running at a speed exceeding a reference speed (approximately, 40 km/h), a rate of distribution of an engine driving force between mainly driven tire wheels and auxiliarily driven tire wheels set on the basis of a rotation speed difference between the mainly and auxiliarily driven tire wheels (.DELTA.V.sub.W) is modified so that the driving force distributed to the auxiliarily driven tire wheels can be maintained constantly at its minimum limit so as to prevent a control hunting of the driving force distribution to the auxiliarily driven tire wheels based on the rotation speed difference from occurring.

Abstract: A four-wheel drive control system for an automotive vehicle equipped with a transfer including a friction clutch for distributing a driving force to rear wheels and front wheels under a control of an engaging force of the friction clutch.