Abstract: A polyurethane dispersion is an aqueous dispersion of a polyurethane resin. The polyurethane resin is a reaction product of an isocyanate group-terminated prepolymer and a chain extender. The isocyanate group-terminated prepolymer includes a reaction product of a polyisocyanate component containing a xylylene diisocyanate, and an active hydrogen group-containing component containing a short-chain diol having 2 to 6 carbon atoms and an active hydrogen group-containing compound containing a hydrophilic group. The chain extender includes an ethylenediamine. A ratio of the ethylenediamine is 25 mol % or more with respect to the total amount of the chain extender.

Abstract: A semiconductor device includes a wiring substrate provided with a plurality of pads electrically connected to a semiconductor chip in a flip-chip interconnection. The wiring substrate includes a pad forming layer in which a signal pad configured to receive transmission of a first signal and a second pad configured to receive transmission of a second signal different from the first signal are formed and a first wiring layer located at a position closest to the pad forming layer. In the wiring layer, a via land overlapping with the signal pad, a wiring connected to the via land, and a wiring connected to the second pad and extending in an X direction are formed. In a Y direction intersecting the X direction, a width of the via land is larger than a width of the wiring. A wiring is adjacent to the via land and overlaps with the signal pad.

Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.

Abstract: A semiconductor device includes a semiconductor chip mounted over a wiring substrate. A signal wiring for input for transmitting input signals to the semiconductor chip and a signal wiring for output for transmitting output signals from the semiconductor chip are placed in different wiring layers in the wiring substrate and overlap with each other. In the direction of thickness of the wiring substrate, each of the signal wirings is sandwiched between conductor planes supplied with reference potential. In the front surface of the semiconductor chip, a signal electrode for input and a signal electrode for output are disposed in different rows. In cases where the signal wiring for output is located in a layer higher than the signal wiring for input in the wiring substrate, the signal electrode for output is placed in a row closer to the outer edge of the front surface than the signal electrode for input.

Abstract: A semiconductor device which provides improved reliability. The semiconductor device includes: a wiring substrate having a first surface and a second surface opposite to the first surface; a chip condenser built in the wiring substrate, having a first electrode and a second electrode; a first terminal and a second terminal disposed on the first surface; and a third terminal disposed on the second surface. The semiconductor device further includes: a first conduction path for coupling the first terminal and the third terminal; a second conduction path for coupling the first terminal and the first electrode; a third conduction path for coupling the third terminal and the first electrode; and a fourth conduction path for coupling the second terminal and the first electrode.

Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.

Abstract: A semiconductor device includes a wiring substrate provided with a plurality of pads electrically connected to a semiconductor chip in a flip-chip interconnection. The wiring substrate includes a pad forming layer in which a signal pad configured to receive transmission of a first signal and a second pad configured to receive transmission of a second signal different from the first signal are formed and a first wiring layer located at a position closest to the pad forming layer. In the wiring layer, a via land overlapping with the signal pad, a wiring connected to the via land, and a wiring connected to the second pad and extending in an X direction are formed. In a Y direction intersecting the X direction, a width of the via land is larger than a width of the wiring. A wiring is adjacent to the via land and overlaps with the signal pad.

Abstract: A semiconductor device includes a wiring substrate including a first surface and a second surface opposite to the first surface, a semiconductor chip including a plurality of chip electrodes and mounted over the wiring substrate, a first capacitor arranged at a position overlapping with the semiconductor chip in plan view and incorporated in the wiring substrate, and a second capacitor arranged between the first capacitor and a peripheral portion of the wiring substrate in plan view. Also, the second capacitor is inserted in series connection into a signal transmission path through which an electric signal is input to or output from the semiconductor chip.

Abstract: A semiconductor device includes a semiconductor chip mounted over a wiring substrate. A signal wiring for input for transmitting input signals to the semiconductor chip and a signal wiring for output for transmitting output signals from the semiconductor chip are placed in different wiring layers in the wiring substrate and overlap with each other. In the direction of thickness of the wiring substrate, each of the signal wirings is sandwiched between conductor planes supplied with reference potential. In the front surface of the semiconductor chip, a signal electrode for input and a signal electrode for output are disposed in different rows. In cases where the signal wiring for output is located in a layer higher than the signal wiring for input in the wiring substrate, the signal electrode for output is placed in a row closer to the outer edge of the front surface than the signal electrode for input.

Abstract: According to an embodiment of the present invention, there is provided a semiconductor device having a first semiconductor component and a second semiconductor component which are mounted on a wiring substrate. The first semiconductor component has a first terminal for transmitting a first signal between the first semiconductor component and the outside and a second terminal for transmitting a second signal between the first semiconductor component and the second semiconductor component. In addition, the second semiconductor component has a third terminal for transmitting the second signal between the second semiconductor component and the first semiconductor component. Further, the first signal is transmitted at a higher frequency than the second signal. Furthermore, the second terminal of the first semiconductor component and the third terminal of the second semiconductor component are electrically connected to each other via the first wiring member.

Abstract: A semiconductor device includes a wiring substrate including wiring layers, a semiconductor chip including electrode pads and mounted on the wiring substrate, and a first capacitor including a first electrode and a second electrode, and mounted on the wiring substrate. The wiring layers include a first wiring layer including a first terminal pad electrically connected with the first electrode of the first capacitor and a second terminal pad electrically connected with the second electrode of the first capacitor; and a second wiring layer on an inner side by one layer from the first wiring layer of the wiring substrate and including a first conductor pattern having a larger area than each of the first terminal pad and the second terminal pad. The first conductor pattern includes a first opening in a region overlapping with each of the first terminal pad and the second terminal pad in the second wiring layer.

Abstract: According to an embodiment of the present invention, there is provided a semiconductor device having a first semiconductor component and a second semiconductor component which are mounted on a wiring substrate. The first semiconductor component has a first terminal for transmitting a first signal between the first semiconductor component and the outside and a second terminal for transmitting a second signal between the first semiconductor component and the second semiconductor component. In addition, the second semiconductor component has a third terminal for transmitting the second signal between the second semiconductor component and the first semiconductor component. Further, the first signal is transmitted at a higher frequency than the second signal. Furthermore, the second terminal of the first semiconductor component and the third terminal of the second semiconductor component are electrically connected to each other via the first wiring member.

Abstract: A semiconductor device includes a wiring substrate including wiring layers, a semiconductor chip including electrode pads and mounted on the wiring substrate, and a first capacitor including a first electrode and a second electrode, and mounted on the wiring substrate. The wiring layers include a first wiring layer including a first terminal pad electrically connected with the first electrode of the first capacitor and a second terminal pad electrically connected with the second electrode of the first capacitor; and a second wiring layer on an inner side by one layer from the first wiring layer of the wiring substrate and including a first conductor pattern having a larger area than each of the first terminal pad and the second terminal pad. The first conductor pattern includes a first opening in a region overlapping with each of the first terminal pad and the second terminal pad in the second wiring layer.

Abstract: A semiconductor device includes a wiring substrate including a first surface and a second surface opposite to the first surface, a semiconductor chip including a plurality of chip electrodes and mounted over the wiring substrate, a first capacitor arranged at a position overlapping with the semiconductor chip in plan view and incorporated in the wiring substrate, and a second capacitor arranged between the first capacitor and a peripheral portion of the wiring substrate in plan view. Also, the second capacitor is inserted in series connection into a signal transmission path through which an electric signal is input to or output from the semiconductor chip.

Abstract: A semiconductor device includes a wiring substrate including wiring layers, a semiconductor chip including electrode pads and mounted on the wiring substrate, and a first capacitor including a first electrode and a second electrode, and mounted on the wiring substrate. The wiring layers include a first wiring layer including a first terminal pad electrically connected with the first electrode of the first capacitor and a second terminal pad electrically connected with the second electrode of the first capacitor; and a second wiring layer on an inner side by one layer from the first wiring layer of the wiring substrate and including a first conductor pattern having a larger area than each of the first terminal pad and the second terminal pad. The first conductor pattern includes a first opening in a region overlapping with each of the first terminal pad and the second terminal pad in the second wiring layer.

Abstract: The joint reliability in flip chip bonding of a semiconductor device is enhanced. Prior to flip chip bonding, flux 9 is applied to the solder bumps 5a for flip chip bonding over a substrate and reflow/cleaning is carried out and then flip chip bonding is carried out. This makes is possible to thin the oxide film over the surfaces of the solder bumps 5a and make the oxide film uniform. As a result, it is possible to suppress the production of local solder protrusions to reduce the production of solder bridges during flip chip bonding and enhance the joint reliability in the flip chip bonding of the semiconductor device.

Abstract: A semiconductor device which provides improved reliability. The semiconductor device includes: a wiring substrate having a first surface and a second surface opposite to the first surface; a chip condenser built in the wiring substrate, having a first electrode and a second electrode; a first terminal and a second terminal disposed on the first surface; and a third terminal disposed on the second surface. The semiconductor device further includes: a first conduction path for coupling the first terminal and the third terminal; a second conduction path for coupling the first terminal and the first electrode; a third conduction path for coupling the third terminal and the first electrode; and a fourth conduction path for coupling the second terminal and the first electrode.

Abstract: In an focus control apparatus, a focus detection unit detects a defocus value, a control unit controls focus position adjustment, a first acquisition unit acquires reliability of the defocus value, a storage unit stores images captured by an image sensor at an in-focus position based on the defocus value and other focus positions and the defocus value detected for each image, in association with each image, and a second acquisition unit acquires a first correction value to be used for correcting the focus position adjustment based on the defocus values of unselected images in a case where the reliability of the defocus value corresponding to a selected image is lower than a first threshold, wherein The control unit adjusts the focus position using the first correction value.

Abstract: In an image capturing apparatus that sequentially photographs a plurality of images by changing a focus position of a lens unit by a predetermined amount, a display area is selected according to a ratio of a vertical line component to a horizontal line component of a main subject for each of the plurality of images photographed by the image capturing apparatus. A display unit displays a plurality of display areas corresponding to the focus detection area selected by the selection unit, by arranging the plurality of display areas side by side.

Abstract: In a semiconductor device (SP1) according to an embodiment, a solder resist film (first insulating layer, SR1) which is in contact with the base material layer, and a resin body (second insulating layer, 4) which is in contact with the solder resist film and the semiconductor chip, are laminated in between the base material layer (2CR) of a wiring substrate 2 and a semiconductor chip (3). In addition, a linear expansion coefficient of the solder resist film is equal to or larger than a linear expansion coefficient of the base material layer, and the linear expansion coefficient of the solder resist film is equal to or smaller than a linear expansion coefficient of the resin body. Also, the linear expansion coefficient of the base material layer is smaller than the linear expansion coefficient of the resin body. According to the above-described configuration, damage of the semiconductor device caused by a temperature cyclic load can be suppressed, and thereby reliability can be improved.