Abstract: A light control panel includes a first substrate and a second substrate oppositely disposed, and a first liquid crystal layer therebetween; the first substrate includes: a first base substrate; and a signal transmission line on a side of the first base substrate close to the first liquid crystal layer and in the peripheral area, the second substrate includes: a second base substrate; and a first black matrix layer on a side of the second base substrate close to the first liquid crystal layer and in the dimming area and the peripheral area; the first black matrix layer has a slot in the peripheral area, and an orthographic projection of at least a part of the slot on the first base substrate is on a side of an orthographic projection of the signal transmission line on the first base substrate, close to the dimming area.

Abstract: Provided is an array substrate. The array substrate includes at least one pad group disposed in a peripheral region of a base substrate, wherein the at least one pad group includes a sector pad group in which the pads are distributed in a sector shape. Therefore, the bonding yield between the array substrate and the circuit board is increased.

Abstract: A package device can include: a package body having a support body and an encapsulating body configured to encapsulate a conductive body of the package device; at least one extraction electrode electrically connected to the conductive body, and having a part exposed outside the package body; and where the support body is located on only part of a bottom surface of the encapsulating body, and protrudes from the bottom surface of the encapsulating body to form a cavity defined by the remaining exposed bottom surface of the encapsulating body and inner side surface of the supporting body.

Abstract: A display device and a manufacturing method thereof, an electronic device, and a light control panel are provided. The display device includes a light control panel and a display liquid crystal panel. The display liquid crystal panel is on a light-emitting side of the light control panel; the light control panel includes a light control region, and the light control region is configured to provide adjusted backlight to the display liquid crystal panel; the display liquid crystal panel includes a display region, and the display region is configured to receive the adjusted backlight to perform display; and a distance between two opposite edges of the light control region in at least one direction is greater than a distance between two opposite edges of the display region in the at least one direction.

Abstract: The present disclosure provides a liquid crystal display panel and a liquid crystal display device. The liquid crystal display panel includes a plurality of sub-pixels defined by a light shielding matrix, and an array substrate and an opposing substrate arranged to be spaced apart from each other. The opposing substrate includes a first substrate and a plurality of spacers, wherein the spacers are on a side of the first substrate close to the array substrate and being within a light shielding area of the light shielding matrix. The array substrate includes a second substrate and a plurality of protrusion structures, wherein the protrusion structures are on a side of the second substrate close to the opposing substrate, and being within the light shielding area of the light shielding matrix.

Abstract: An array substrate includes a base substrate, pixel electrodes and common electrodes, first scan lines, second scan lines and data lines. The pixel electrode has first electrode strips disposed at intervals in a row direction. The common electrodes and the pixel electrodes are disposed on the same layer, and the common electrodes have second electrode strips disposed at intervals. The second electrode strips and the first electrode strips are alternatively arranged. The first scan line is located between two adjacent rows of pixel electrodes. The second scan line is located between two adjacent columns of pixel electrodes and is electrically connected to the first scan line, and the second scan line has a scan signal input terminal. The data line has a data signal input terminal. An orthographic projection of the data line on the base substrate intersects with a central region of the pixel electrode on the base substrate.

Abstract: A display device and a manufacturing method thereof, an electronic device, and a light control panel are provided. The display device includes a light control panel and a display liquid crystal panel. The display liquid crystal panel is on a light-emitting side of the light control panel; the light control panel includes a light control region, and the light control region is configured to provide adjusted backlight to the display liquid crystal panel; the display liquid crystal panel includes a display region, and the display region is configured to receive the adjusted backlight to perform display; and a distance between two opposite edges of the light control region in at least one direction is greater than a distance between two opposite edges of the display region in the at least one direction.

Abstract: A package structure for a power supply module, can include: a die and a capacitive element that are separated from each other and arranged on different horizontal planes with different heights along a vertical direction of the package structure; connection structures that connect to the die and to the capacitive element; where a current loop comprising at least two parallel current paths on different horizontal planes with different heights along the vertical direction of the package structure is formed; and where the current loop passes through the die, the capacitive element, and the connection structures, and directions of currents of the two parallel current paths are at least partially opposite to each other in order to decrease electromagnetic interference.

Abstract: There is provided a voltage supply circuit, in which a signal output end of a power management integrated circuit, a signal input end of a transmission branch, and a signal input end of a voltage reduction branch are coupled to a first node; a signal output end of transmission branch and a signal output end of the voltage reduction branch are coupled to a second node; the power management integrated circuit supplies an initial voltage to the first node; the transmission branch is coupled to a control signal terminal, and switch between a conducting state and a cutoff state in response to control of a control signal, and write the initial voltage into the second node in the conducting state; and the voltage reduction branch performs voltage reduction on the initial voltage at the first node to obtain a reduced voltage to be written into the second node.

Abstract: A drive control circuit is disclosed, and the drive control circuit is connected in series between a driving circuit and a first voltage terminal and forms a loop together. The drive control circuit comprises a current adjustment circuit and a control circuit. The current adjustment circuit controls a current in the loop according to a voltage signal difference between a voltage signal of a second node and a voltage signal of a first node. The control circuit controls the voltage signal of the second node according to the voltage signal of the first node, so that the current adjustment circuit controls the current in the loop during a start-up phase of the driving circuit.

Abstract: An array substrate includes a base substrate, pixel electrodes and common electrodes, first scan lines, second scan lines and data lines. The pixel electrode has first electrode strips disposed at intervals in a row direction. The common electrodes and the pixel electrodes are disposed on the same layer, and the common electrodes have second electrode strips disposed at intervals. The second electrode strips and the first electrode strips are alternatively arranged. The first scan line is located between two adjacent rows of pixel electrodes. The second scan line is located between two adjacent columns of pixel electrodes and is electrically connected to the first scan line, and the second scan line has a scan signal input terminal. The data line has a data signal input terminal. An orthographic projection of the data line on the base substrate intersects with a central region of the pixel electrode on the base substrate.

Abstract: The present disclosure relates to the field of display technologies and, in particular to a display panel and an electronic device. The display panel comprises: Q rows of first scanning line groups arranged sequentially along a column direction; M columns of second scanning line groups arranged sequentially along a row direction; and at least one gate drive circuit, located on a side of the Q-th row of the first scanning line groups away from the (Q?1)-th row of the first scanning line groups. Each gate drive circuit comprises Q columns of shift register unit groups cascaded in stages. The q-th stage of the shift register unit groups is connected with the q-th row of the first scanning line groups through at least one column of the second scanning line groups. M?Q>1, 1?q?Q, and M, N, Q, q are all positive integers.

Abstract: There is provided a display substrate, including gate lines and data lines, which define pixel units, each pixel unit includes a pixel electrode, at least some pixel units are provided with a conductive bridge line in a same layer as the pixel electrode; in the pixel unit with the conductive bridge line, a first hollow structure is on a first side of a first or second end part of the pixel electrode, an end of the conductive bridge line is in the first hollow structure, a second hollow structure is on a second side of the first end part, an absolute value of a difference between parasitic capacitances respectively formed between the pixel electrode and the data lines on two sides of the pixel electrode and closest thereto is less than or equal to a preset capacitance difference value. A display panel and a display device are further provided.

Abstract: An integrated magnetic core is provided. The integrated magnetic core includes a first plate and a second plate. The first plate includes a plurality of legs extending outwardly from a first surface of the first plate. The plurality of legs includes first and second oppositely disposed legs and third and fourth oppositely disposed legs. The second plate is coupled to at least the third and fourth legs of the first plate.

Abstract: A display panel and a display device are provided. The display panel includes a first substrate and a second substrate arranged oppositely. The first substrate includes a spacer. The second substrate includes: a second base substrate; a data line including, a body portion and a bending portion; and a sub-pixel including a light transmission region. An orthographic projection of the spacer on the second base substrate is adjacent to that of the light transmission region on the second base substrate, the orthographic projection of the spacer on the second base substrate is spaced apart from that of the data line on the second base substrate; an orthographic projection of the bending portion on the second base substrate is bent toward a direction away from the orthographic projection of the spacer on the second base substrate with respect to an orthographic projection of the body portion on the second base substrate.

Abstract: The present disclosure provides an array substrate, a dimming liquid crystal panel and a display panel. The array substrate includes: a first transparent electrode layer with a plurality of slit structures, wherein the first transparent electrode layer comprises a plurality of domains, the plurality of domains comprise at least two types of domains, each of the plurality of domains is adjacent to different types of domains along both a row direction and a column direction; and a plurality of gate lines extending along the row direction and a plurality of data lines extending along the column direction, the plurality of gate lines and the plurality of data lines crossing to define a plurality of dimming regions arranged in an array.

Abstract: A display device, a gate drive circuit, a shift register and a control method are disclosed. The shift register includes a first shift register unit and a second shift register unit, the first shift register unit is configured to write a first control signal to the first node, and write a first clock signal to the first signal output terminal under control of a voltage of the first node; the second shift register unit is configured to write a second clock signal to the second signal output terminal under control of the voltage of the first node; during time of a frame, the first clock signal and a first input signal provided by a first signal input terminal are pulse signals, and the second clock signal is a DC signal.

Abstract: An array substrate, a manufacturing method thereof and a display panel are provided. The array substrate includes sub-pixel units, and each sub-pixel unit includes a light emitting region and a non-light emitting region; each sub-pixel unit includes a light emitting element, the light emitting element includes a light emitting layer and a first electrode, and at least a part of the first electrode is in the light emitting region. A plurality of first wires are configured to supply a power signal to the light emitting element and include a first sub-wire; the first sub-wire includes a plurality of portions, adjacent two of the plurality of portions are spaced apart from each other by an opening in the light emitting region; at least a part of an orthographic projection of the opening on the array substrate does not overlap with an orthographic projection of the first electrode on the array substrate.

Abstract: An integrated magnetic assembly includes a magnetic core having a first component and a second component. The first component includes a first face and a winding leg extending from the first face. The winding leg includes a top face spaced from and oriented generally parallel to the first face. The second component is coupled to the first component and has a second face facing the first face. The second component further includes a third face recessed from and oriented generally parallel to the second face and a recess sidewall extending between the second face and the third face. The integrated magnetic assembly further includes an input winding and an output winding each inductively coupled to the magnetic core. The third face and the recess sidewall define a recess within the second face. Additionally, a gap is defined between the top face and the third face.

Abstract: A thin film transistor, an array substrate and a display device are provided. The thin film transistor is on a base substrate and includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing.