Patents by Inventor Kedarnath Balakrishnan

Kedarnath Balakrishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070113129
    Abstract: Disclosed is a logic testing system that includes a decompressor and a tester in communication with the decompressor. The tester is configured to store a seed and locations of scan inputs and is further configured to transmit the seed and the locations of scan inputs to the decompressor. The decompressor is configured to generate a test pattern from the seed and the locations of scan inputs. The decompressor includes a first test pattern generator, a second test pattern generator, and a selector configured to select the test pattern generated by the first test pattern generator or the test pattern generated by the second test pattern generator using the locations of scan inputs.
    Type: Application
    Filed: October 3, 2006
    Publication date: May 17, 2007
    Applicant: NEC LABORATORIES AMERICA, INC.
    Inventors: Kedarnath Balakrishnan, Seongmoon Wang, Wenlong Wei, Srimat Chakradhar
  • Publication number: 20060236186
    Abstract: A test output compaction arrangement and a method of generating control patterns for unknown blocking is herein disclosed. The specified bits in the control patterns, which when using linear feedback shift register (LFSR) reseeding determines control data volume and LFSR size, are preferably organized in a manner so as to balance the number of specified bits in the control patterns across test patterns.
    Type: Application
    Filed: March 14, 2006
    Publication date: October 19, 2006
    Applicant: NEC LABORATORIES AMERICA, INC.
    Inventors: Seongmoon Wang, Kedarnath Balakrishnan, Srimat Chakradhar
  • Publication number: 20060112320
    Abstract: The present invention is directed to a logic testing architecture with an improved decompression engine that compresses the seeds of a linear test pattern generator in a manner that is independent of the test pattern set.
    Type: Application
    Filed: March 31, 2005
    Publication date: May 25, 2006
    Applicant: NEC Laboratories America, Inc.
    Inventors: Kedarnath Balakrishnan, Seongmoon Wang, Srimat Chakradhar