Patents by Inventor Keh-Chiang Ku
Keh-Chiang Ku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9698185Abstract: Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate.Type: GrantFiled: October 13, 2011Date of Patent: July 4, 2017Assignee: OmniVision Technologies, Inc.Inventors: Gang Chen, Sing-Chung Hu, Hsin-Chih Tai, Duli Mao, Manoj Bikumandla, Wei Zheng, Yin Qian, Zhibin Xiong, Vincent Venezia, Keh-Chiang Ku, Howard E. Rhodes
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Publication number: 20140374862Abstract: A color photosensor array has photosensors of a first type having a thick overlying silicon layer, photosensors of a second type having a thin overlying silicon layer, and photosensors of a third type having no overlying silicon layer; the photosensors of the first type having peak sensitivity in the red, the photosensors of the second type having peak sensitivity in the green. In particular embodiments, color correction circuitry is provided to enhance color saturation.Type: ApplicationFiled: June 19, 2013Publication date: December 25, 2014Inventors: ChiaYing Liu, Keh-Chiang Ku, Dyson Hsinchih Tai, WuZhang Yang
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Patent number: 8804021Abstract: Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the implant angle.Type: GrantFiled: November 3, 2011Date of Patent: August 12, 2014Assignee: OmniVision Technologies, Inc.Inventors: Sohei Manabe, Keh-Chiang Ku, Vincent Venezia, Hsin-Chih Tai, Duli Mao, Howard E. Rhodes
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Patent number: 8729655Abstract: Methods of forming isolation structures are disclosed. A method of forming isolation structures for an image sensor array of one aspect may include forming a dielectric layer over a semiconductor substrate. Narrow, tall dielectric isolation structures may be formed from the dielectric layer. The narrow, tall dielectric isolation structures may have a width that is no more than 0.3 micrometers and a height that is at least 1.5 micrometers. A semiconductor material may be epitaxially grown around the narrow, tall dielectric isolation structures. Other methods and apparatus are also disclosed.Type: GrantFiled: August 2, 2012Date of Patent: May 20, 2014Assignee: OmniVision Technologies, Inc.Inventors: Chia-Ying Liu, Keh-Chiang Ku, Wu-Zhang Yang
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Patent number: 8729712Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.Type: GrantFiled: October 14, 2013Date of Patent: May 20, 2014Assignee: OmniVision Technologies, Inc.Inventors: Yin Qian, Dyson H. Tai, Keh-Chiang Ku, Vincent Venezia, Duli Mao, Wei Zheng, Howard E. Rhodes
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Publication number: 20140035087Abstract: Methods of forming isolation structures are disclosed. A method of forming isolation structures for an image sensor array of one aspect may include forming a dielectric layer over a semiconductor substrate. Narrow, tall dielectric isolation structures may be formed from the dielectric layer. The narrow, tall dielectric isolation structures may have a width that is no more than 0.3 micrometers and a height that is at least 1.5 micrometers. A semiconductor material may be epitaxially grown around the narrow, tall dielectric isolation structures. Other methods and apparatus are also disclosed.Type: ApplicationFiled: August 2, 2012Publication date: February 6, 2014Inventors: Chia-Ying Liu, Keh-Chiang Ku, Wu-Zhang Yang
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Publication number: 20140035089Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.Type: ApplicationFiled: October 14, 2013Publication date: February 6, 2014Applicant: OmniVision Technologies, Inc.Inventors: Yin Qian, Dyson H. Tai, Keh-Chiang Ku, Vincent Venezia, Duli Mao, Wei Zheng, Howard E. Rhodes
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Patent number: 8614112Abstract: A method of fabricating a backside-illuminated pixel. The method includes forming frontside components of the pixel on or in a front side of a substrate, the frontside components including a photosensitive region of a first polarity. The method further includes forming a pure dopant region of a second polarity on a back side of the substrate, applying a laser pulse to the backside of the substrate to melt the pure dopant region, and recrystallizing the pure dopant region to form a backside doped layer. Corresponding apparatus embodiments are disclosed and claimed.Type: GrantFiled: October 1, 2010Date of Patent: December 24, 2013Assignee: OmniVision Technologies, Inc.Inventors: Keh-Chiang Ku, Chia-Ying Liu, Hsin-Chih Tai, Vincent Venezia
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Patent number: 8569856Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.Type: GrantFiled: November 3, 2011Date of Patent: October 29, 2013Assignee: OmniVision Technologies, Inc.Inventors: Yin Qian, Hsin-Chih Tai, Keh-Chiang Ku, Vincent Venezia, Duli Mao, Wei Zheng, Howard E. Rhodes
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Patent number: 8471316Abstract: An isolation area that provides additional active area between semiconductor devices on an integrated circuit is described. In one embodiment, the invention includes a complementary metal oxide semiconductor transistor of an image sensor having a source, a drain, and a gate between the source and the drain, the transistor having a channel to couple the source and the drain under the influence of the gate, and an isolation barrier surrounding a periphery of the source and the drain to isolate the source and the drain from other devices, wherein the isolation barrier is distanced from the central portion of the channel.Type: GrantFiled: September 7, 2011Date of Patent: June 25, 2013Assignee: OmniVision Technologies, Inc.Inventors: Hsin-Chih Tai, Keh-Chiang Ku, Duli Mao, Vincent Venezia, Gang Chen
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Patent number: 8466010Abstract: A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring.Type: GrantFiled: January 7, 2013Date of Patent: June 18, 2013Assignee: OmniVision Technologies, Inc.Inventors: Hsin-Chih Tai, Vincent Venezia, Yin Qian, Duli Mao, Keh-Chiang Ku
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Publication number: 20130113065Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.Type: ApplicationFiled: November 3, 2011Publication date: May 9, 2013Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Yin Qian, Hsin-Chih Tai, Keh-Chiang Ku, Vincent Venezia, Duli Mao, Wei Zheng, Howard E. Rhodes
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Publication number: 20130113969Abstract: Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the implant angle.Type: ApplicationFiled: November 3, 2011Publication date: May 9, 2013Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Sohei Manabe, Keh-Chiang Ku, Vincent Venezia, Hsi-Chih Tai, Duli Mao, Howard E. Rhodes
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Publication number: 20130092982Abstract: Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate.Type: ApplicationFiled: October 13, 2011Publication date: April 18, 2013Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Gang Chen, Sing-Chung Hu, Hsin-Chih Tai, Duli Mao, Manoj Bikumandla, Wei Zheng, Yin Qian, Zhibin Xiong, Vincent Venezia, Keh-Chiang Ku, Howard E. Rhodes
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Publication number: 20130056808Abstract: An isolation area that provides additional active area between semiconductor devices on an integrated circuit is described. In one embodiment, the invention includes a complementary metal oxide semiconductor transistor of an image sensor having a source, a drain, and a gate between the source and the drain, the transistor having a channel to couple the source and the drain under the influence of the gate, and an isolation barrier surrounding a periphery of the source and the drain to isolate the source and the drain from other devices, wherein the isolation barrier is distanced from the central portion of the channel.Type: ApplicationFiled: September 7, 2011Publication date: March 7, 2013Inventors: Hsin-Chih Tai, Keh-Chiang Ku, Duli Mao, Vincent Venezia, Gang Chen
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Patent number: 8373243Abstract: A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring.Type: GrantFiled: January 6, 2011Date of Patent: February 12, 2013Assignee: OmniVision Technologies, Inc.Inventors: Hsin-Chih Tai, Vincent Venezia, Yin Qian, Duli Mao, Keh-Chiang Ku
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Patent number: 8349732Abstract: A device and a method for forming a metal silicide is presented. A device, which includes a gate region, a source region, and a drain region, is formed on a substrate. A metal is disposed on the substrate, followed by a first anneal, forming a metal silicide on at least one of the gate region, the source region, and the drain region. The unreacted metal is removed from the substrate. The metal silicide is implanted with atoms. The implant is followed by a super anneal of the substrate.Type: GrantFiled: July 18, 2008Date of Patent: January 8, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Harry Chuang, Hung-Chih Tsai, Keh-Chiang Ku, Kong-Beng Thei, Mong Song Liang
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Patent number: 8338263Abstract: Methods of forming isolation structures are disclosed. A method of forming isolation structures for an image sensor array of one aspect may include forming a dielectric layer over a semiconductor substrate. Narrow, tall dielectric isolation structures may be formed from the dielectric layer. The narrow, tall dielectric isolation structures may have a width that is no more than 0.3 micrometers and a height that is at least 1.5 micrometers. A semiconductor material may be epitaxially grown around the narrow, tall dielectric isolation structures. Other methods and apparatus are also disclosed.Type: GrantFiled: June 20, 2011Date of Patent: December 25, 2012Assignee: OmniVision Technologies, Inc.Inventors: Chia-Ying Liu, Keh-Chiang Ku, Wu-Zhang Yang
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Publication number: 20120319230Abstract: Methods of forming isolation structures are disclosed. A method of forming isolation structures for an image sensor array of one aspect may include forming a dielectric layer over a semiconductor substrate. Narrow, tall dielectric isolation structures may be formed from the dielectric layer. The narrow, tall dielectric isolation structures may have a width that is no more than 0.3 micrometers and a height that is at least 1.5 micrometers. A semiconductor material may be epitaxially grown around the narrow, tall dielectric isolation structures. Other methods and apparatus are also disclosed.Type: ApplicationFiled: June 20, 2011Publication date: December 20, 2012Inventors: Chia-Ying Liu, Keh-Chiang Ku, Wu-Zhang Yang
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Publication number: 20120319242Abstract: Forming a doped isolation region in a substrate during manufacture of an image sensor. A method of an aspect includes forming a hardmask layer over the substrate, and forming a photoresist layer over the hardmask layer. An opening is formed in the photoresist layer over an intended location of the doped isolation region. An opening is etched in the hardmask layer by exposing the hardmask layer to one or more etchants through the opening. The opening in the hardmask layer may have a width of less than 0.4 micrometers. The doped isolation region may be formed in the substrate beneath the opening in the hardmask layer by performing a dopant implantation that introduces dopant through the opening in the hardmask layer. The method of an aspect may include forming sidewall spacers on sidewalls of the opening in the hardmask layer and using the sidewall spacers as a dopant implantation mask.Type: ApplicationFiled: June 20, 2011Publication date: December 20, 2012Inventors: Duli Mao, Hsin-Chih Tai, Vincent Venezia, Keh-Chiang Ku, Yin Qian, Gang Chen, Rongsheng Yang, Howard Rhodes