Patents by Inventor Keisuke Nakazawa

Keisuke Nakazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150252806
    Abstract: A gas compressor comprises a rotor having vane grooves, a cylinder shaped to surround an outer circumference of the rotor, vanes plate-shaped, slidably inserted into the vane grooves, and abuttable at one ends on the inner circumference of the cylinder, upon receiving a back pressure from the vane grooves, two side blocks to enclose both ends of the rotor and the cylinder, respectively, compression chambers supplied with a medium to compress the medium to a high-pressure medium for discharge, an oil separator to separate, from the discharged high-pressure medium, oil to be used as the back pressure, an oil path through which the oil at a certain pressure is supplied to the vane grooves, and a high-pressure supply hole formed in at least one of the side blocks, including a small diameter portion and a large diameter portion integrally formed.
    Type: Application
    Filed: February 18, 2015
    Publication date: September 10, 2015
    Inventors: Keisuke Nakazawa, Eiki Yanagawa
  • Patent number: 8975196
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes providing a substrate, supplying a first liquid including a terpene to a surface of the substrate, supplying a second liquid including a silicon-containing compound to the surface of the substrate, and converting the silicon-containing compound to a silicon oxide compound.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: March 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Patent number: 8956132
    Abstract: A compressor includes a main body having in a housing a vane back-pressure space configured to project a vane forming a compression room for compressing gas, and a centrifugal oil separator. A discharge section to which the gas from the oil separator is ejected is formed in the housing, and the oil separator includes a pressure-adjusting valve configured to adjust pressure of the vane back-pressure space according to pressure of the discharge section. The pressure-adjusting valve is arranged in the oil separator without being affected by the gas ejected from the oil separator.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: February 17, 2015
    Assignee: Calsonic Kansei Corporation
    Inventors: Keita Satou, Makoto Kawamura, Hiroshi Iijima, Hiroyuki Sato, Keisuke Nakazawa, Yukihiko Ando, Tohru Kamiyama, Hiroyuki Seimiya, Hiroki Shinkawa, Fumiaki Maruoka, Katsumi Endou, Masanori Ogawa
  • Patent number: 8835279
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device is provided. In the method, a tunnel insulating film and a first conductive film are formed on a semiconductor layer. A trench is formed. A first sacrifice film is buried in the trench. A second sacrifice film having density higher than that of the first sacrifice film is formed on the first sacrifice film in the trench. An insulating film is formed on the first conductive film and the second sacrifice film. A second conductive film is formed on the insulating film. The second sacrifice film is exposed. The first sacrifice film and the second sacrifice film are removed.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: September 16, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Publication number: 20140213038
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes providing a substrate, supplying a first liquid including a terpene to a surface of the substrate, supplying a second liquid including a silicon-containing compound to the surface of the substrate, and converting the silicon-containing compound to a silicon oxide compound.
    Type: Application
    Filed: September 2, 2013
    Publication date: July 31, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Keisuke NAKAZAWA
  • Publication number: 20140137796
    Abstract: A spin coating apparatus that supplies a coating liquid to a substrate and rotating the substrate to form a coating film, has a holding part that holds the substrate mounted thereon in a horizontal position; a rotationally driving source that rotationally drives the holding part about a rotational axis parallel with the vertical direction, thereby rotating the substrate; and a coating liquid supplying part that supplies the coating liquid to the substrate held by the holding part.
    Type: Application
    Filed: January 24, 2014
    Publication date: May 22, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Publication number: 20140072709
    Abstract: In one embodiment, a spin coating apparatus includes a coating liquid feeding module to drop a coating liquid onto a substrate, and a motor to rotate the substrate. The module drops a first drop amount of the coating liquid onto the substrate at a first discharge rate, while the motor rotates the substrate at a first number of rotations. The module drops a second drop amount of the coating liquid onto the substrate at a second discharge rate larger than the first discharge rate, while the motor rotates the substrate at a second number of rotations smaller than the first number of rotations, after the first drop amount of the coating liquid is dropped. The module discharges the coating liquid onto the substrate at a third discharge rate smaller than the second discharge rate, after the coating liquid is discharged onto the substrate at the second discharge rate.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 13, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Keisuke NAKAZAWA
  • Patent number: 8659114
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate, a trench formed in an element isolating area of the semiconductor substrate, and a silicon oxide film that is embedded in the trench and contains an alkali metal element or alkali earth metal element.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: February 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Patent number: 8652571
    Abstract: A spin coating apparatus that supplies a coating liquid to a substrate and rotating the substrate to form a coating film, has a holding part that holds the substrate mounted thereon in a horizontal position; a rotationally driving source that rotationally drives the holding part about a rotational axis parallel with the vertical direction, thereby rotating the substrate; and a coating liquid supplying part that supplies the coating liquid to the substrate held by the holding part.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: February 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Patent number: 8642409
    Abstract: According to one embodiment, there is provided a method of manufacturing a semiconductor device. In the method, a substrate portion and a fin portion on the substrate portion are formed. A first silicon oxide film is formed on each side surface of the fin portion. A polysilazane film having an upper surface lower than the upper surface of the first silicon oxide film is formed on each side surface of the first silicon oxide film. The polysilazane film is converted into a silicon oxynitride film. The first silicon oxide film is etched to make the upper surface of the first silicon oxide film not higher than the upper surface of the silicon oxynitride film. A heavily doped semiconductor layer is formed in the fin portion.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: February 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Patent number: 8629035
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming an isolation trench in a substrate, and forming an amorphous layer on a sidewall surface of the isolation trench. The method further includes forming a sacrificial layer in the isolation trench via the amorphous layer, and forming an air gap layer on the sacrificial layer. The method further includes forming an air gap in the isolation trench under the air gap layer by removing the sacrificial layer after forming the air gap layer.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: January 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Patent number: 8592939
    Abstract: In accordance with an embodiment, a semiconductor device includes a functional film, first and second trenches, and first and second insulating films. The functional film comprises first and second areas. The first trench is provided in the first area of the functional film and has a first width. The second trench is provided in the second area of the functional film and has a second width larger than the first width. The first insulating film is formed from a polymeric material as a precursor to fill the first trench. The second insulating film has a diameter larger than the first width and is formed from particulates and the polymeric material as precursors. The particulates fill the second trench. The polymeric material fills spaces between the particulates in the second trench and also fills gaps between the particulates and the second trench.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: November 26, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Publication number: 20130115766
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device is provided. In the method, a tunnel insulating film and a first conductive film are formed on a semiconductor layer. A trench is formed. A first sacrifice film is buried in the trench. A second sacrifice film having density higher than that of the first sacrifice film is formed on the first sacrifice film in the trench. An insulating film is formed on the first conductive film and the second sacrifice film. A second conductive film is formed on the insulating film. The second sacrifice film is exposed. The first sacrifice film and the second sacrifice film are removed.
    Type: Application
    Filed: March 21, 2012
    Publication date: May 9, 2013
    Inventor: Keisuke NAKAZAWA
  • Publication number: 20130102124
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming an isolation trench in a substrate, and forming an amorphous layer on a sidewall surface of the isolation trench. The method further includes forming a sacrificial layer in the isolation trench via the amorphous layer, and forming an air gap layer on the sacrificial layer. The method further includes forming an air gap in the isolation trench under the air gap layer by removing the sacrificial layer after forming the air gap layer.
    Type: Application
    Filed: March 1, 2012
    Publication date: April 25, 2013
    Inventor: Keisuke NAKAZAWA
  • Publication number: 20130043563
    Abstract: According to one embodiment, there is provided a method of manufacturing a semiconductor device. In the method, a substrate portion and a fin portion on the substrate portion are formed. A first silicon oxide film is formed on each side surface of the fin portion. A polysilazane film having an upper surface lower than the upper surface of the first silicon oxide film is formed on each side surface of the first silicon oxide film. The polysilazane film is converted into a silicon oxynitride film. The first silicon oxide film is etched to make the upper surface of the first silicon oxide film not higher than the upper surface of the silicon oxynitride film. A heavily doped semiconductor layer is formed in the fin portion.
    Type: Application
    Filed: March 19, 2012
    Publication date: February 21, 2013
    Inventor: Keisuke NAKAZAWA
  • Patent number: 8329553
    Abstract: A method for manufacturing semiconductor device has forming a plurality of trenches having at least two kinds of aspect ratios on a semiconductor substrate, filling the plurality of trenches with a coating material containing silicon, forming a mask on the coating material in a part of the trenches among the plurality of trenches filled with the coating material, implanting an ion for accelerating oxidation of the coating material into the coating material in the trenches on which the mask is not formed, forming a first insulating film by oxidizing the coating materials into which the ion is implanted, removing the coating material from the part of the trenches after removing the mask and forming a second insulating film in the part of the trenches from which the coating material is removed.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: December 11, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Matsuo, Takeshi Hoshi, Keisuke Nakazawa, Kazuaki Iwasawa
  • Publication number: 20120301343
    Abstract: A compressor includes a main body having in a housing a vane back-pressure space configured to project a vane forming a compression room for compressing gas, and a centrifugal oil separator, wherein a discharge section to which the gas from the oil separator is ejected is formed in the housing, the oil separator includes a pressure-adjusting valve configured to adjust pressure of the vane back-pressure space according to pressure of the discharge section, and the pressure-adjusting valve is provided in the oil separator without being affected by the gas ejected from the oil separator.
    Type: Application
    Filed: May 24, 2012
    Publication date: November 29, 2012
    Inventors: Keita SATOU, Makoto Kawamura, Hiroshi lijima, Hiroyuki Sato, Keisuke Nakazawa, Yukihiko Ando, Tohru Kamiyama, Hiroyuki Seimiya, Hiroki Shinkawa, Fumiaki Maruoka, Katsumi Endou, Masanori Ogawa
  • Publication number: 20120286346
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate, a trench formed in an element isolating area of the semiconductor substrate, and a silicon oxide film that is embedded in the trench and contains an alkali metal element or alkali earth metal element.
    Type: Application
    Filed: December 2, 2011
    Publication date: November 15, 2012
    Inventor: Keisuke NAKAZAWA
  • Publication number: 20120193596
    Abstract: In accordance with an embodiment, a semiconductor device includes a functional film, first and second trenches, and first and second insulating films. The functional film comprises first and second areas. The first trench is provided in the first area of the functional film and has a first width. The second trench is provided in the second area of the functional film and has a second width larger than the first width. The first insulating film is formed from a polymeric material as a precursor to fill the first trench. The second insulating film has a diameter larger than the first width and is formed from particulates and the polymeric material as precursors. The particulates fill the second trench. The polymeric material fills spaces between the particulates in the second trench and also fills gaps between the particulates and the second trench.
    Type: Application
    Filed: September 15, 2011
    Publication date: August 2, 2012
    Inventor: Keisuke NAKAZAWA
  • Publication number: 20120034754
    Abstract: A semiconductor device manufacturing method has forming element isolation trenches in a semiconductor substrate, forming a silicon compound film in insides of the element isolation trenches in order to embed the element isolation trenches, conducting a first oxidation processing at a first temperature to reform a surface of the silicon compound film to a volatile matter emission preventing layer which permits passage of an oxidizing agent and impurities and which does not permit passage of a volatile matter containing silicon atoms, and conducting a second oxidation processing at a second temperature which is higher than the first temperature to form a coated silicon oxide film inside the element isolation trenches.
    Type: Application
    Filed: October 13, 2011
    Publication date: February 9, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazuaki Iwasawa, Takeshi Hoshi, Keisuke Nakazawa, Shogo Matsuo, Takashi Nakao, Ryu Kato, Tetsuya Kai, Katsuyuki Sekine