Patents by Inventor Keitaro Imai

Keitaro Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7374977
    Abstract: It is an object of the present invention to improve the usability of a material, and to provide a display device which can be manufactured by simplifying the manufacturing process and a manufacturing technique thereof. It is also an object of the invention to provide a technique in which a pattern of a wiring or the like constituting these display devices can be formed to have a desired shape with favorable controllability. One feature of a droplet discharge device of the invention comprises: a discharge means for discharging a composition including a pattern forming material; and a shape means for shaping the shape of the composition before the composition is attached to a formation region, in which the shape means is provided between the discharge means and the formation region.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: May 20, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Keitaro Imai
  • Patent number: 7354808
    Abstract: An object of the invention is to provide a resist composition which is possible to form a film by using a drawing means and which functions as a protective film used at the time of etching, adding impurities, or the like. In addition, an object is also to provide a manufacturing step of a semiconductor device in which a substance with high safety and that is easily treated can be used as a peeling solution, and which pays attention to an environment. A resist composition of the invention contains water-soluble homopolymer, water, or a solvent that has compatibility with water and can dissolve the water-soluble homopolymer. In addition, a method for manufacturing the semiconductor device of the invention has a step of removing the protective film formed by discharging the resist composition of the invention by using a drawing means with water after using it.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: April 8, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Muranaka, Ryoji Nomura, Keitaro Imai, Shinji Maekawa
  • Publication number: 20070272149
    Abstract: The invention drastically improves the accuracy of adhesion position of a liquid drop discharged by a liquid drop discharge method and makes it possible to form a fine and highly accurate pattern directly on a substrate. Therefore, one object of the invention is to provide a method for manufacturing a wiring, a conductive layer and a display device that can respond to upsizing of a substrate. Moreover, another object of the invention is to provide a method for manufacturing a wiring, a conductive layer and a display device that can improve throughput and the efficiency of use of material. The invention can improve the accuracy of adhesion position of a liquid drop drastically at the time of patterning a resist material, a wiring material, or the like directly by the liquid drop discharge method mainly on a substrate having an insulating surface.
    Type: Application
    Filed: June 14, 2007
    Publication date: November 29, 2007
    Inventors: Keitaro Imai, Shunpei Yamazaki
  • Publication number: 20070212828
    Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device of which manufacturing process is simplified by improving usage rate of a material.
    Type: Application
    Filed: May 4, 2007
    Publication date: September 13, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Keitaro Imai, Shinji Maekawa, Makoto Furuno, Osamu Nakamura
  • Patent number: 7232773
    Abstract: The invention drastically improves the accuracy of adhesion position of a liquid drop discharged by a liquid drop discharge method and makes it possible to form a fine and highly accurate pattern directly on a substrate. Therefore, one object of the invention is to provide a method for manufacturing a wiring, a conductive layer and a display device that can respond to upsizing of a substrate. Moreover, another object of the invention is to provide a method for manufacturing a wiring, a conductive layer and a display device that can improve throughput and the efficiency of use of material. The invention can improve the accuracy of adhesion position of a liquid drop drastically at the time of patterning a resist material, a wiring material, or the like directly by the liquid drop discharge method mainly on a substrate having an insulating surface.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: June 19, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Keitaro Imai, Shunpei Yamazaki
  • Patent number: 7229862
    Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device of which manufacturing process is simplified by improving usage rate of a material.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: June 12, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Keitaro Imai, Shinji Maekawa, Makoto Furuno, Osamu Nakamura
  • Patent number: 7211454
    Abstract: The present invention provides an active matrix substrate which can be fabricated at a lower cost and a light emitting device having a large display area fabricated by a vapor deposition system which makes a film with uniform thickness for a large substrate. According to the invention, an organic light-emitting device can be fabricated by performing vapor deposition toward a large substrate provided with a pixel portion (and a driver circuit) including an n-channel TFT having a amorphous silicon film, semi-amorphous semiconductor film or an organic semiconductor film as an active layer.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: May 1, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Keitaro Imai, Shinji Maekawa, Makoto Furuno, Osamu Nakamura, Masakazu Murakami
  • Publication number: 20070051958
    Abstract: According to the present invention, which is a display device in which a light-emitting element where an organic substance generating luminescence referred to as electroluminescence or a medium including a mixture of an organic substance and an inorganic substance is sandwiched between electrodes is connected to a TFT, the invention is to manufacture a display panel by forming at least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask layer for forming a predetermined pattern is formed by a method capable of selectively forming a pattern. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object and by forming a conductive layer or an insulating layer is used as a method capable of selectively forming a pattern.
    Type: Application
    Filed: October 25, 2004
    Publication date: March 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Maekawa, Makoto Furuno, Osamu Nakamura, Keitaro Imai
  • Publication number: 20070051952
    Abstract: At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.
    Type: Application
    Filed: October 25, 2004
    Publication date: March 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Maekawa, Makoto Furuno, Osamu Nakamura, Keitaro Imai
  • Publication number: 20070046178
    Abstract: It is an object of the present invention to provide a display device preventing the external invasion of water and/or oxygen and preventing the deterioration of a luminous element due to these invading substances and to provide a production method including simple production steps for producing the display device. The invention provides a display device having a sealing material on the rim of an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Further, the invention provides a display device having a barrier body on an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Furthermore, the application of droplet discharge technique in production steps for producing the display device can eliminate a photolithography step such as exposing and developing. Thus, a method of producing a display device having an improved yield is provided.
    Type: Application
    Filed: August 25, 2004
    Publication date: March 1, 2007
    Inventors: Keitaro Imai, Aya Anzai, Yasuko Watanabe
  • Publication number: 20070046196
    Abstract: Provided is a means for improving the capability of injecting electrons from a cathode in a luminous element and solving problems about the production process thereof. In the present invention, a material having a smaller work function than a cathode material is used to form an inorganic conductive layer between the cathode and an organic compound layer. In this way, the capability of injecting electrons from the cathode can be improved. Furthermore, the film thereof can be thicker than that of a conventional cathode buffer layer formed by using an insulating material. Therefore, the film thickness can easily be controlled, and a decrease in production costs and an improvement in yield can be achieved.
    Type: Application
    Filed: November 3, 2006
    Publication date: March 1, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Keitaro Imai
  • Patent number: 7151288
    Abstract: A semiconductor device comprises a semiconductor substrate, a conductive plug electrically connected to the semiconductor substrate, a silicon carbide film provided on the conductive plug, a metal compound film provided on the silicon carbide film and containing a metal carbide, and an electrode provided on the metal compound film.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: December 19, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keitaro Imai, Koji Yamakawa
  • Patent number: 7132790
    Abstract: Provided is a means for improving the capability of injecting electrons from a cathode in a luminous element and solving problems about the production process thereof. In the present invention, a material having a smaller work function than a cathode material is used to form an inorganic conductive layer between the cathode and an organic compound layer. In this way, the capability of injecting electrons from the cathode can be improved. Furthermore, the film thereof can be thicker than that of a conventional cathode buffer layer formed by using an insulating material. Therefore, the film thickness can easily be controlled, and a decrease in production costs and an improvement in yield can be achieved.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: November 7, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Keitaro Imai
  • Publication number: 20060246636
    Abstract: To provide a method for manufacturing a semiconductor device including a transfer step that is capable of controlling the adhesiveness of a substrate and an element-formed layer in the case of separating the element-formed layer including a semiconductor element or an integrated circuit formed over the substrate from the substrate and bonding it to another substrate. An adhesive agent made of a good adhesiveness material is formed between the semiconductor element or the integrated circuit comprising plural semiconductor elements formed over the substrate (a first substrate) and the substrate, and thus it is possible to prevent a semiconductor element from peeling off a substrate in manufacturing the semiconductor element, and further, to make it easier to separate the semiconductor element from the substrate by removing the adhesive agent after forming the semiconductor element.
    Type: Application
    Filed: June 30, 2006
    Publication date: November 2, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Keitaro Imai, Toru Takayama, Yuugo Goto, Junya Maruyama, Yumiko Ohno
  • Publication number: 20060228838
    Abstract: Conventionally, photolithography and anisotropic etching are performed to form a plug between an electrode and a wiring, etc., thereby increasing the number of steps, getting the throughput worse, and producing unnecessary materials. To solve the problems, the present invention provides a method for manufacturing a display device, including the formation steps of a conductive layer or wirings, and a contact plug that can treat a larger substrate. In the case of forming a plug for electrically connecting conductive patterns comprising plural layers, a pillar made of a conductor is formed over a base conductive layer pattern, and then, after an insulating film is formed over the entire surface, the insulating film is etched back to expose the conductor pillar, and a conductive pattern in an upper layer is formed by ink jetting. In this case, when the conductor pillar is processed, a resist to be a mask can be formed in itself by ink jetting.
    Type: Application
    Filed: June 12, 2006
    Publication date: October 12, 2006
    Inventor: Keitaro Imai
  • Publication number: 20060214210
    Abstract: A semiconductor device according to an aspect of the invention comprises a semiconductor substrate, a conductive plug which is connected to an active region of a transistor formed on the semiconductor substrate, a metal silicide film which covers a bottom surface portion and side surface portion of the conductive plug, and an electrode structure which is formed on the conductive plug.
    Type: Application
    Filed: April 4, 2005
    Publication date: September 28, 2006
    Inventors: Hiroshi Itokawa, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Patent number: 7105400
    Abstract: There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a semiconductor substrate, forming an alumina film on the underlying region, forming a hole in the alumina film, filling the hole with a bottom electrode film, forming a dielectric film on the bottom electrode film, and forming a top electrode film on the dielectric film.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: September 12, 2006
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies, AG
    Inventors: Keitaro Imai, Koji Yamakawa, Hiroshi Itokawa, Katsuaki Natori, Osamu Arisumi, Keisuke Nakazawa, Bum-ki Moon
  • Patent number: 7091070
    Abstract: To provide a method for manufacturing a semiconductor device including a transfer step that is capable of controlling the adhesiveness of a substrate and an element-formed layer in the case of separating the element-formed layer including a semiconductor element or an integrated circuit formed over the substrate from the substrate and bonding it to another substrate. An adhesive agent made of a good adhesiveness material is formed between the semiconductor element or the integrated circuit comprising plural semiconductor elements formed over the substrate (a first substrate) and the substrate, and thus it is possible to prevent a semiconductor element from peeling off a substrate in manufacturing the semiconductor element, and further, to make it easier to separate the semiconductor element from the substrate by removing the adhesive agent after forming the semiconductor element.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: August 15, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Keitaro Imai, Toru Takayama, Yuugo Goto, Junya Maruyama, Yumiko Ohno
  • Patent number: 7061570
    Abstract: Conventionally, photolithography and anisotropic etching are performed to form a plug between an electrode and a wiring, etc., thereby increasing the number of steps, getting the throughput worse, and producing unnecessary materials. To solve the problems, the present invention provides a method for manufacturing a display device, including the formation steps of a conductive layer or wirings, and a contact plug that can treat a larger substrate. In the case of forming a plug for electrically connecting conductive patterns comprising plural layers, a pillar made of a conductor is formed over a base conductive layer pattern, and then, after an insulating film is formed over the entire surface, the insulating film is etched back to expose the conductor pillar, and a conductive pattern in an upper layer is formed by ink jetting. In this case, when the conductor pillar is processed, a resist to be a mask can be formed in itself by ink jetting.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: June 13, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Keitaro Imai
  • Patent number: 7009230
    Abstract: An improved barrier stack for inhibiting diffusion of atoms or molecules, such as O2 is disclosed. The barrier stack is particularly useful in capacitor over plug structures to prevent plug oxidation which can adversely impact the reliability of the structures. The barrier stack includes first and second barrier layers. In one embodiment, the first barrier layer comprises first and second sub-barrier layers having mismatched grain boundaries. The sub-barrier layers are selected from, for example, Ir, Ru, Pd, Rh, or alloys thereof. By providing mismatched grain boundaries, the interface of the sub-barrier layers block the diffusion path of oxygen. To further enhance the barrier properties, the first barrier layer is passivated with O2 using, for example, a rapid thermal oxidation. The RTO forms a thin oxide layer on the surface of the first barrier layer. The oxide layer can advantageously promote mismatching of the grain boundaries of the first and second sub-barrier layer.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: March 7, 2006
    Assignees: Infineon Technologies Aktiengesellschaft, Kabushiki Kaisha Toshiba
    Inventors: Bum Ki Moon, Gerhard Beitel, Nicolas Nagel, Andreas Hilliger, Koji Yamakawa, Keitaro Imai