Patents by Inventor Keitaro Imai

Keitaro Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050245023
    Abstract: A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
    Type: Application
    Filed: July 11, 2005
    Publication date: November 3, 2005
    Inventors: Osamu Arisumi, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Publication number: 20050212416
    Abstract: Provided is a means for improving the capability of injecting electrons from a cathode in a luminous element and solving problems about the production process thereof. In the present invention, a material having a smaller work function than a cathode material is used to form an inorganic conductive layer between the cathode and an organic compound layer. In this way, the capability of injecting electrons from the cathode can be improved. Furthermore, the film thereof can be thicker than that of a conventional cathode buffer layer formed by using an insulating material. Therefore, the film thickness can easily be controlled, and a decrease in production costs and an improvement in yield can be achieved.
    Type: Application
    Filed: May 26, 2005
    Publication date: September 29, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Keitaro Imai
  • Publication number: 20050174845
    Abstract: A semiconductor device which is used as an ID chip and capable of being rewritten data only one time. In addition, a semiconductor device used as an ID chip which is capable of being written data except when manufacturing the chip. The invention comprises a modulating circuit, a demodulating circuit, a logic circuit, a memory circuit, and an antenna circuit over an insulating substrate. The modulating circuit and the demodulating circuit are electrically connected to an antenna circuit, the demodulating circuit is connected to the logic circuit, the memory circuit stores an output signal of the logic circuit, and the memory circuit is a fuse memory circuit using a fuse element.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 11, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Keitaro Imai
  • Patent number: 6924521
    Abstract: A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: August 2, 2005
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies AG
    Inventors: Osamu Arisumi, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Patent number: 6924519
    Abstract: There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and comprising a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, at least one of the bottom electrode and the top electrode comprising a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, represented by ABO3, and containing a first metal element as a B site element, and a metal film provided between the conductive film and the metal oxide film, and containing a second metal element which is a B site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy at a time when the second metal element forms an oxide being larger than that at a time when the first metal element forms an oxide.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: August 2, 2005
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies, AG
    Inventors: Hiroshi Itokawa, Koji Yamakawa, Keitaro Imai, Katsuaki Natori, Bum-ki Moon
  • Publication number: 20050146551
    Abstract: It is an object of the present invention to improve the usability of a material, and to provide a display device which can be manufactured by simplifying the manufacturing process and a manufacturing technique thereof. It is also an object of the invention to provide a technique in which a pattern of a wiring or the like constituting these display devices can be formed to have a desired shape with favorable controllability. One feature of a droplet discharge device of the invention comprises: a discharge means for discharging a composition including a pattern forming material; and a shape means for shaping the shape of the composition before the composition is attached to a formation region, in which the shape means is provided between the discharge means and the formation region.
    Type: Application
    Filed: December 13, 2004
    Publication date: July 7, 2005
    Inventors: Shunpei Yamazaki, Keitaro Imai
  • Publication number: 20050142896
    Abstract: The invention drastically improves the accuracy of adhesion position of a liquid drop discharged by a liquid drop discharge method and makes it possible to form a fine and highly accurate pattern directly on a substrate. Therefore, one object of the invention is to provide a method for manufacturing a wiring, a conductive layer and a display device that can respond to upsizing of a substrate. Moreover, another object of the invention is to provide a method for manufacturing a wiring, a conductive layer and a display device that can improve throughput and the efficiency of use of material. The invention can improve the accuracy of adhesion position of a liquid drop drastically at the time of patterning a resist material, a wiring material, or the like directly by the liquid drop discharge method mainly on a substrate having an insulating surface.
    Type: Application
    Filed: April 20, 2004
    Publication date: June 30, 2005
    Inventors: Keitaro Imai, Shunpei Yamazaki
  • Publication number: 20050070031
    Abstract: There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a semiconductor substrate, forming an alumina film on the underlying region, forming a hole in the alumina film, filling the hole with a bottom electrode film, forming a dielectric film on the bottom electrode film, and forming a top electrode film on the dielectric film.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Inventors: Keitaro Imai, Koji Yamakawa, Hiroshi Itokawa, Katsuaki Natori, Osamu Arisumi, Keisuke Nakazawa, Bum-ki Moon
  • Publication number: 20050053720
    Abstract: The present invention provides an active matrix substrate which can be fabricated at a lower cost and a light emitting device having a large display area fabricated by a vapor deposition system which makes a film with uniform thickness for a large substrate. According to the invention, an organic light-emitting device can be fabricated by performing vapor deposition toward a large substrate provided with a pixel portion (and a driver circuit) including an n-channel TFT having a amorphous silicon film, semi-amorphous semiconductor film or an organic semiconductor film as an active layer.
    Type: Application
    Filed: July 20, 2004
    Publication date: March 10, 2005
    Inventors: Shunpei Yamazaki, Keitaro Imai, Shinji Maekawa, Makoto Furuno, Osamu Nakamura, Masakazu Murakami
  • Publication number: 20050048289
    Abstract: An object of the invention is to provide a resist composition which is possible to form a film by using a drawing means and which functions as a protective film used at the time of etching, adding impurities, or the like. In addition, an object is also to provide a manufacturing step of a semiconductor device in which a substance with high safety and that is easily treated can be used as a peeling solution, and which pays attention to an environment. A resist composition of the invention contains water-soluble homopolymer, water, or a solvent that has compatibility with water and can dissolve the water-soluble homopolymer. In addition, a method for manufacturing the semiconductor device of the invention has a step of removing the protective film formed by discharging the resist composition of the invention by using a drawing means with water after using it.
    Type: Application
    Filed: August 11, 2004
    Publication date: March 3, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Muranaka, Ryoji Nomura, Keitaro Imai, Shinji Maekawa
  • Publication number: 20050014319
    Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device of which manufacturing process is simplified by improving usage rate of a material.
    Type: Application
    Filed: July 8, 2004
    Publication date: January 20, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Keitaro Imai, Shinji Maekawa, Makoto Furuno, Osamu Nakamura
  • Publication number: 20050012732
    Abstract: When a pixel and a signal line driver circuit are made up of semi-amorphous TFTs, an amplitude for driving the pixel has to be made larger, and a high power supply voltage is needed. The high power supply voltage increases power consumption in the case of partial drive. According to the invention, in order to reduce power consumption, a gate signal line driver circuit stores data of whether each gate signal line is used for displaying an image or not, thereby stopping driving of a gate signal line which is not required to be driven.
    Type: Application
    Filed: July 7, 2004
    Publication date: January 20, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Keitaro Imai, Shinji Maekawa, Makoto Furuno, Osamu Nakamura, Shunpei Yamazaki
  • Publication number: 20050012887
    Abstract: When semi-amorphous TFTs are used for forming a signal line driver circuit and a pixel, a large amplitude is required for driving the pixel, and a large power supply voltage is thus needed. On the other hand, when a shift register is made up of transistors having a single conductivity, a bootstrap circuit is required, and a voltage over a power supply is applied to a specific element. Therefore, not both the driving amplitude and the reliability can be achieved with a single power supply. According to the invention, a level shifter having a single conductivity is provided to solve such a problem.
    Type: Application
    Filed: July 7, 2004
    Publication date: January 20, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Keitaro Imai, Shinji Maekawa, Makoto Furuno, Osamu Nakamura, Shunpei Yamazaki
  • Publication number: 20040263564
    Abstract: The present invention provides a method of manufacturing a pattern with a flattened surface and a droplet jetting device which can provides the pattern with a flattened surface. A droplet jetting means of the present invention comprises a droplet jetting means having a plurality of nozzles arranged in each row, each of the plurality of nozzles has a plurality of discharge ports aligned in an axial direction, and diameters of the discharge ports for the plurality of nozzles differ from row to row.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 30, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Osamu Nakamura, Keitaro Imai
  • Publication number: 20040256618
    Abstract: To provide a method for manufacturing a semiconductor device including a transfer step that is capable of controlling the adhesiveness of a substrate and an element-formed layer in the case of separating the element-formed layer including a semiconductor element or an integrated circuit formed over the substrate from the substrate and bonding it to another substrate. An adhesive agent made of a good adhesiveness material is formed between the semiconductor element or the integrated circuit comprising plural semiconductor elements formed over the substrate (a first substrate) and the substrate, and thus it is possible to prevent a semiconductor element from peeling off a substrate in manufacturing the semiconductor element, and further, to make it easier to separate the semiconductor element from the substrate by removing the adhesive agent after forming the semiconductor element.
    Type: Application
    Filed: February 27, 2004
    Publication date: December 23, 2004
    Inventors: Keitaro Imai, Toru Takayama, Yuugo Goto, Junya Maruyama, Yumiko Ohno
  • Publication number: 20040217404
    Abstract: There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and comprising a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, at least one of the bottom electrode and the top electrode comprising a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, represented by ABO3, and containing a first metal element as a B site element, and a metal film provided between the conductive film and the metal oxide film, and containing a second metal element which is a B site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy at a time when the second metal element forms an oxide being larger than that at a time when the first metal element forms an oxide.
    Type: Application
    Filed: May 2, 2003
    Publication date: November 4, 2004
    Inventors: Hiroshi Itokawa, Koji Yamakawa, Keitaro Imai, Katsuaki Natori, Bum-ki Moon
  • Publication number: 20040218136
    Abstract: Conventionally, photolithography and anisotropic etching are performed to form a plug between an electrode and a wiring, etc., thereby increasing the number of steps, getting the throughput worse, and producing unnecessary materials. To solve the problems, the present invention provides a method for manufacturing a display device, including the formation steps of a conductive layer or wirings, and a contact plug that can treat a larger substrate. In the case of forming a plug for electrically connecting conductive patterns comprising plural layers, a pillar made of a conductor is formed over a base conductive layer pattern, and then, after an insulating film is formed over the entire surface, the insulating film is etched back to expose the conductor pillar, and a conductive pattern in an upper layer is formed by ink jetting. In this case, when the conductor pillar is processed, a resist to be a mask can be formed in itself by ink jetting.
    Type: Application
    Filed: March 25, 2004
    Publication date: November 4, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Keitaro Imai
  • Publication number: 20040206995
    Abstract: A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
    Type: Application
    Filed: January 21, 2004
    Publication date: October 21, 2004
    Inventors: Osamu Arisumi, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Publication number: 20040178431
    Abstract: An improved barrier stack for inhibiting diffusion of atoms or molecules, such as O2 is disclosed. The barrier stack is particularly useful in capacitor over plug structures to prevent plug oxidation which can adversely impact the reliability of the structures. The barrier stack includes first and second barrier layers. In one embodiment, the first barrier layer comprises first and second sub-barrier layers having mismatched grain boundaries. The sub-barrier layers are selected from, for example, Ir, Ru, Pd, Rh, or alloys thereof. By providing mismatched grain boundaries, the interface of the sub-barrier layers block the diffusion path of oxygen. To further enhance the barrier properties, the first barrier layer is passivated with O2 using, for example, a rapid thermal oxidation. The RTO forms a thin oxide layer on the surface of the first barrier layer. The oxide layer can advantageously promote mismatching of the grain boundaries of the first and second sub-barrier layer.
    Type: Application
    Filed: July 10, 2003
    Publication date: September 16, 2004
    Inventors: Bum Ki Moon, Gerhard Beitel, Nicolas Nagel, Andreas Hilliger, Koji Yamakawa, Keitaro Imai
  • Patent number: 6787831
    Abstract: An barrier stack for inhibiting diffusion of atoms or molecules, such as O2 is disclosed. The barrier slack includes first and second barrier layers formed from, for example, Ir, Ru, Pd, Rh, or alloys thereof. The first barrier layer is passivated with O2 using, for example, a rapid thermal oxidation (RTO) prior to formation of the second barrier layer. The RTO forms a thin oxide layer on the surface of the first barrier layer. The thin oxide layer passivates the grain boundaries of the first barrier layer as well as promoting mismatching of the grain boundaries of the first and second barrier layer.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: September 7, 2004
    Assignees: Infineon Technologies Aktiengesellschaft, Kabushiki Kaisha Toshiba
    Inventors: Bum Ki Moon, Gerhard Adolf Beitel, Nicolas Nagel, Andreas Hilliger, Koji Yamakawa, Keitaro Imai