Abstract: The present invention provides a low cost device that has a true die to external fiber optic connection. Specifically, the present invention relates to an optical device package joined to a semiconductor device package. In some cases, the combination is joined using wirebond studs and an adhesive material. In other cases, the combination is joined using an anisotropic conductive film. Yet, in other cases, the combination is joined using solder material. Each of these joining mechanisms provides high levels of thermal, electrical and optical performance. The joining mechanisms can apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

Abstract: The present invention provides a low cost device that has a true die to external fiber optic connection. Specifically, the present invention relates to an optical device package joined to a semiconductor device package. In some cases, the combination is joined using wirebond studs and an adhesive material. In other cases, the combination is joined using an anisotropic conductive film. Yet, in other cases, the combination is joined using solder material. Each of these joining mechanisms provides high levels of thermal, electrical and optical performance. The joining mechanisms can apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

Abstract: The invention comprises a connector apparatus for electrically interconnecting a chip sub-assembly to an optical sub-assembly. The apparatus includes a connector sleeve with a chip sub-assembly having at least one electrical connection arranged thereon. The connector sleeve is suitable for receiving a connector plug that includes an optical fiber optically coupled to the photonic devices of an optical sub-assembly that includes electrical connectors. The connector plug is engaged with the connector sleeve, thereby electrically interconnecting the electrical connections of the chip sub-assembly to the electrical connectors of the optical sub-assembly such that electrical signals can pass between the chip sub-assembly and a photonic device of the optical sub-assembly.

Abstract: Electro-optical packages that embed the electronics of the packages directly to the optical cabling, provide short electrical connection paths for high performance, and that provide a robust interconnects. A first electro-optical package includes an integrated circuit and a connector sleeve configured to receive a plug-in optical assembly from the underside of the PC board. The plug-in optical assembly includes a backing piece and an opto-electric device mounted onto the backing piece. An electrical connection is provided between the opto-electric device and a contact location on the backing piece and a contact is provided between the contact location on the backing piece and the integrated circuit. With a second electro-optical package, an integrated circuit having an active surface facing in a first direction and an opto-electric device having contact points facing a second direction are provided.

Abstract: An encapsulant applicator comprising a flexor formed of a resilient material and a substantially rigid blade is described. The blade is attached to the flexor in a way that during a smoothing process, a force applied through the flexor is distributed across the second edge of the blade. Another aspect of the invention pertains to a system for forming a substantially uniform layer of material on a surface of a semiconductor wafer. The system of the present invention includes a stencil, an applicator and a conveyor device. The stencil is placed over the surface of the wafer so that an opening in the stencil exposes a portion of the surface of the wafer. The conveyor device is connected to the flexor so that during the smoothing process, the conveyor device moves the applicator across the opening of the stencil. Yet another aspect of the invention pertains to a method for applying a substantially uniform layer of flowable material to a surface of a semiconductor wafer using the applicator as described.

Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

Abstract: An optoelectronic component is described that includes a photonic device carried by a base substrate. A dam structure is formed on the base substrate by dispensing and hardening a precise amount of a flowable material. The dam structure is sized to define a desired standoff between an optical fiber and an active facet on the photonic device. In embodiments where the photonic device is wire bonded to the base substrate, it may be desirable to provide a reverse wire bond in order to permit the optical fiber to be placed closer to the photonic device. In some embodiments, the base substrate takes the form of a flexible material having electrically conductive traces thereon that are electrically connected to the photonic device. An optical component support block may be provided to support the flex material. In some implementations, a semiconductor die may be directly soldered to the traces on the flexible material.

Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

Abstract: Techniques for maintaining the optical coupling efficiency between photonic devices of an optoelectronic module and its interconnecting optical fibers are described. The techniques ensure that the mating surfaces of an optical sub-assembly and a chip sub-assembly remain planar to each other throughout and after the soldering process of the optoelectronic manufacturing process. These techniques include the use of a ceramic fixture made of a stack of plates having openings that secure the orientation of the optical and chip sub-assemblies. The fixture can have one or more openings to secure a respective one or more combination of optical and chip sub-assemblies. A high temperature tape can also be used to maintain the parallelism between the optical and chip sub-assemblies. An optical sub-assembly having pedestals on its bottom surface can also be use to maintain parallelism of the optical and chip sub-assemblies. Methods of using each technique is also described.

Abstract: The present invention pertains to using a leadless leadframe package as the semiconductor device package component of an opto-electronic combinational device. Leadless leadframe packages (LLPs) have very small form factors that allow an opto-electronic device to also have a small overall form factor.

Abstract: An optoelectronic component is described that includes a photonic device carried by a substrate. A support structure having a relatively higher portion and a relatively lower portion is formed on or attached to the substrate. In a preferred embodiment, the support structure is a dam structure formed by dispensing a flowable material onto the substrate and hardening the dispensed material. The optoelectronic component further includes one or more optical fibers, with each optical fiber being in optical communication with an active facet on the photonic device. The relatively higher and lower portions of the support structure are arranged to position the optical fiber(s) at a desired standoff distance from the photonic device and to slightly incline the distal tip of each optical fiber relative to the top surface of the photonic device. The described packaging approach can be used in both single fiber and multi-channel devices.

Abstract: The techniques of the present invention are directed towards setting a photonic device into a groove of a substrate, which is then attached to the chip sub-assembly in a way that the resulting optoelectronic package has a low profile and the interconnects between the photonic device and the semiconductor chip are short. The technique involves partially etching a groove in a substrate to allow for positioning of a photonic device within the groove. The photonic device is connected to the chip sub-assembly through interconnects that extend through the thickness of the substrate. The photonic devices are placed on their sides so that the active facets are perpendicular to the main axis of the chip sub-assembly. In this configuration, the optical fibers can be positioned parallel to the CSA top surface, ensuring a low module profile in the process.

Abstract: Optoelectronic components, specifically, ceramic optical sub-assemblies are described. In one aspect, the optoelectronic component includes a ceramic base substrate having a pair of angled (or substantially perpendicular) faces. The electrical traces are formed directly on the ceramic surfaces and extend between the pair of faces. A semiconductor chip assembly is mounted on the first face of the ceramic base substrate and a photonic device is mounted on the second face. Both the semiconductor chip assembly and the photonic device are electrically connected to traces on the ceramic base substrate. The semiconductor chip assembly is generally arranged to be electrically connected to external devices. The photonic devices are generally arranged to optically communicate with one or more optical fibers. The described structure may be used with a wide variety of photonic devices.

Abstract: Concepts for conveniently arranging devices for the transduction of signals to and from voltage and current domains to infrared radiation domains is described. Specifically, optoelectronic components and methods of making the same are described. In one aspect, the optoelectronic component includes a base substrate having a pair of angled (or substantially perpendicular) faces with electrical traces extending therebetween. A semiconductor chip assembly is mounted on the first face of the base substrate and a photonic device is mounted on the second face. Both the semiconductor chip assembly and the photonic device are electrically connected to traces on the base substrate. The semiconductor chip assembly is generally arranged to be electrically connected to external devices. The photonic devices are generally arranged to optically communicate with one or more optical fibers. The described structure may be used with a wide variety of photonic devices.

Abstract: A semiconductor device comprising a mark located on a surface of the semiconductor device and a metal layer covering the marked surface and the mark. The metal layer functions to protect the semiconductor device from exposure to electromagnetic radiation and allows the mark to be visible for identification purposes. The present invention also pertains a method of manufacturing the semiconductor device as described. The method involves forming a mark on a semiconductor substrate surface of the device and covering the semiconductor substrate surface and the mark with a layer of metal so that the device is protected from exposure to electromagnetic radiation and allows the mark to be visible for identification purposes.