Abstract: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

Abstract: Magnetic memory devices and methods of manufacturing the same are disclosed. A method may include forming a magnetic tunnel junction layer on a substrate, forming mask patterns on the magnetic tunnel junction layer, and sequentially performing a plurality of ion implantation processes using the mask patterns as ion implantation masks to form an isolation region in the magnetic tunnel junction layer. The isolation region may thereby define magnetic tunnel junction parts that are disposed under corresponding ones of the mask patterns. A magnetic memory device may include a plurality of magnetic tunnel junction parts electrically and magnetically isolated from each other through the isolation region.

Abstract: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

Abstract: The disclosure provides a semiconductor fabricating apparatus and a method of fabricating a semiconductor device using the same. In some embodiments, the apparatus may synchronize low-frequency, high-frequency and direct current (DC) powers that are applied to an electrode. The low-frequency power may have a non-sinusoidal waveform. Thus, reliability and reproducibility of a semiconductor fabrication process may be improved. In other embodiments, the apparatus may include a first low-frequency power generator generating a first low-frequency power having a sinusoidal waveform and a second low-frequency power generator generating a second low-frequency power having a non-sinusoidal waveform.

Abstract: Provided is a method of forming a magnetic memory device. A first magnetic layer, a tunnel barrier, and a second magnetic layer are deposited on a substrate. The second magnetic layer, the tunnel barrier, and the first magnetic layer are etched to form magnetic tunnel junction structures. An ion beam etching process is performed using an oxygen-containing source gas to remove etching by-products on sidewalls of the magnetic tunnel junction structure and to oxidize the sidewalls of the magnetic tunnel junction structures.

Abstract: In a method of manufacturing a MRAM device, a lower electrode is formed on a substrate. A first magnetic layer, a tunnel barrier layer, and a second magnetic layer are sequentially formed on the lower electrode layer. An etching mask is formed on the second magnetic layer. An ion beam etching process in which a first ion beam and a second ion beam are simultaneously emitted onto the substrate is performed to form a MTJ structure including a first magnetic layer pattern, a tunnel layer pattern, and a second magnetic layer pattern from the first magnetic layer, the tunnel barrier layer, and the second magnetic layer, respectively, the MTJ structure has no by-products remaining after the ion beam etching process is performed.

Abstract: Magnetic memory devices and methods of manufacturing the same are disclosed. A method may include forming a magnetic tunnel junction layer on a substrate, forming mask patterns on the magnetic tunnel junction layer, and sequentially performing a plurality of ion implantation processes using the mask patterns as ion implantation masks to form an isolation region in the magnetic tunnel junction layer. The isolation region may thereby define magnetic tunnel junction parts that are disposed under corresponding ones of the mask patterns. A magnetic memory device may include a plurality of magnetic tunnel junction parts electrically and magnetically isolated from each other through the isolation region.

Abstract: Provided is a method of forming a magnetic memory device. A first magnetic layer, a tunnel barrier, and a second magnetic layer are deposited on a substrate. The second magnetic layer, the tunnel barrier, and the first magnetic layer are etched to form magnetic tunnel junction structures. An ion beam etching process is performed using an oxygen-containing source gas to remove etching by-products on sidewalls of the magnetic tunnel junction structure and to oxidize the sidewalls of the magnetic tunnel junction structures.

Abstract: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

Abstract: The inventive concepts disclosed herein include, for instance, methods for etching a metal layer and methods for manufacturing a semiconductor device using the etched metal layer. A wafer including a metal layer and a mask layer on the metal layer may be loaded into a process chamber. An etching gas may be supplied into the process chamber to etch the metal layer exposed by the mask layer. After the etching process, the mask layer may be removed. The etching gas can include phosphorus (P) and fluorine (F). An RF power may be constantly or selectively supplied to the process chamber, or different levels of RF power can be selectively supplied. An etching gas can be supplied to the process chamber when the RF power is off or at a lower level. A surface activation gas can be supplied when the RF power is on or at a higher level.

Abstract: Provided is a device for analyzing at least one of a generated amount of positive charges, a generated amount of negative charges, and a generated amount of ultraviolet (UV) light. The device includes a substrate on which at least one of a first device configured to detect a variation in threshold voltage relative to the generated amount of positive charges, a second device configured to detect a variation in threshold voltage relative to the generated amount of negative charges, and a third device configured to detect a variation in threshold voltage relative to the generated amount of UV light is formed.

Abstract: Synchronous pulse plasma etching equipment includes a first electrode and one or more second electrodes configured to generate plasma in a plasma etching chamber. A first radio frequency power output unit is configured to apply a first radio frequency power having a first frequency and a first duty ratio to the first electrode, and to output a control signal including information about a phase of the first radio frequency power. At least one second radio frequency power output unit is configured to apply a second radio frequency power having a second frequency and a second duty ratio to a corresponding second electrode among the second electrodes. The second radio frequency power output unit is configured to control the second radio frequency power to be synchronized with the first radio frequency power or to have a phase difference from the first radio frequency power in response to the control signal.

Abstract: Methods for manufacturing a magnetic tunnel junction structure include forming a magnetic tunnel junction (MTJ) layer by sequentially stacking a first ferromagnetic layer, a tunnel insulation layer, and a second ferromagnetic layer on a substrate, forming a mask pattern on the MTJ layer, and etching at least a portion of the MTJ layer in an etching chamber using the mask pattern as an etch mask, wherein the etching of the at least a portion of the MTJ layer includes applying a RF source power to a first electrode of the etching chamber as first RF power in a first pulselike mode, and applying a RF bias power to a second electrode of the etching chamber as second RF power in a second pulselike mode. The second pulselike mode of the RF bias power has a different phase from the first pulselike mode of the RF source power.

Abstract: A method of processing a substrate using plasma includes loading a substrate into a chamber, processing the substrate with a first plasma mode and then processing the substrate with a second plasma mode, wherein at least one of the first plasma mode and the second plasma mode is a time-modulation mode in which a plasma induced in the chamber is periodically turned on and off to reduce plasma-induced damage in the substrate.

Abstract: A method of etching a substrate includes positioning the substrate on a substrate support within a chamber, etching a formation in the substrate in the presence of plasma within the chamber, decreasing a positive charge within the formation, and further etching the formation in the substrate in the presence of plasma after decreasing the positive charge within the formation.

Abstract: Provided are a method of fabricating a semiconductor device and synchronous pulse plasma etching equipment for the same. The method includes outputting a first radio frequency (RF) power and a control signal and outputting a second RF power. The first RF power is pulse-width modulated to have a first frequency and a first duty ratio, and is applied to a first electrode in a plasma etching chamber. The control signal includes information on a phase of the first RF power. The second RF power is pulse-width modulated to have the first frequency and a second duty ratio smaller than the first duty ratio, is applied to a corresponding second electrode among second electrodes in the plasma etching chamber, and is supplied for a time section in which the first RF power is supplied.

Abstract: Provided are a method of fabricating a semiconductor device and synchronous pulse plasma etching equipment for the same. The method includes outputting a first radio frequency (RF) power and a control signal and outputting a second RF power. The first RF power is pulse-width modulated to have a first frequency and a first duty ratio, and is applied to a first electrode in a plasma etching chamber. The control signal includes information on a phase of the first RF power. The second RF power is pulse-width modulated to have the first frequency and a second duty ratio smaller than the first duty ratio, is applied to a corresponding second electrode among second electrodes in the plasma etching chamber, and is supplied for a time section in which the first RF power is supplied.

Abstract: Provided is a device for analyzing at least one of a generated amount of positive charges, a generated amount of negative charges, and a generated amount of ultraviolet (UV) light. The device includes a substrate on which at least one of a first device configured to detect a variation in threshold voltage relative to the generated amount of positive charges, a second device configured to detect a variation in threshold voltage relative to the generated amount of negative charges, and a third device configured to detect a variation in threshold voltage relative to the generated amount of UV light is formed.

Abstract: Provided may be a method of forming a semiconductor device. The method may include performing a pre-anisotropic etching process on a dielectric layer exposed by a guide opening, performing an etch-back process on a mask layer and performing a post anisotropic etching process through a guide opening using the etched mask layer as an etching mask.

Abstract: Synchronous pulse plasma etching equipment includes a first electrode and one or more second electrodes configured to generate plasma in a plasma etching chamber. A first radio frequency power output unit is configured to apply a first radio frequency power having a first frequency and a first duty ratio to the first electrode, and to output a control signal including information about a phase of the first radio frequency power. At least one second radio frequency power output unit is configured to apply a second radio frequency power having a second frequency and a second duty ratio to a corresponding second electrode among the second electrodes. The second radio frequency power output unit is configured to control the second radio frequency power to be synchronized with the first radio frequency power or to have a phase difference from the first radio frequency power in response to the control signal.